drm/i915: pdev cleanup
In an effort to simplify things for a future push of dev_priv instead of dev wherever possible, always take pdev via dev_priv where feasible, eliminating the direct access from dev. Right now this only eliminates a few cases of dev, but it also obviates that we pass dev into a lot of functions where dev_priv would be the more obvious choice. v2: Fixed one more place missing in the previous patch set Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160822103245.24069-5-david.weinehall@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
694c282845
commit
52a05c302b
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@ -2739,6 +2739,7 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused)
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struct drm_info_node *node = m->private;
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struct drm_device *dev = node->minor->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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if (!HAS_RUNTIME_PM(dev_priv))
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seq_puts(m, "Runtime power management not supported\n");
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@ -2753,8 +2754,8 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused)
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seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n");
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#endif
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seq_printf(m, "PCI device power state: %s [%d]\n",
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pci_power_name(dev_priv->drm.pdev->current_state),
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dev_priv->drm.pdev->current_state);
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pci_power_name(pdev->current_state),
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pdev->current_state);
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return 0;
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}
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@ -232,6 +232,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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drm_i915_getparam_t *param = data;
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int value;
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@ -242,10 +243,10 @@ static int i915_getparam(struct drm_device *dev, void *data,
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/* Reject all old ums/dri params. */
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return -ENODEV;
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case I915_PARAM_CHIPSET_ID:
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value = dev->pdev->device;
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value = pdev->device;
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break;
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case I915_PARAM_REVISION:
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value = dev->pdev->revision;
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value = pdev->revision;
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break;
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case I915_PARAM_HAS_GEM:
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value = 1;
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@ -516,7 +517,7 @@ static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_
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pr_info("switched on\n");
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dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
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/* i915 resume handler doesn't set to D0 */
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pci_set_power_state(dev->pdev, PCI_D0);
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pci_set_power_state(pdev, PCI_D0);
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i915_resume_switcheroo(dev);
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dev->switch_power_state = DRM_SWITCH_POWER_ON;
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} else {
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@ -585,6 +586,7 @@ static void i915_gem_fini(struct drm_device *dev)
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static int i915_load_modeset_init(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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int ret;
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if (i915_inject_load_failure())
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@ -601,13 +603,13 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* then we do not take part in VGA arbitration and the
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* vga_client_register() fails with -ENODEV.
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*/
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ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
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ret = vga_client_register(pdev, dev, NULL, i915_vga_set_decode);
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if (ret && ret != -ENODEV)
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goto out;
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intel_register_dsm_handler();
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ret = vga_switcheroo_register_client(dev->pdev, &i915_switcheroo_ops, false);
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ret = vga_switcheroo_register_client(pdev, &i915_switcheroo_ops, false);
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if (ret)
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goto cleanup_vga_client;
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@ -659,9 +661,9 @@ cleanup_irq:
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cleanup_csr:
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intel_csr_ucode_fini(dev_priv);
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intel_power_domains_fini(dev_priv);
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vga_switcheroo_unregister_client(dev->pdev);
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vga_switcheroo_unregister_client(pdev);
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cleanup_vga_client:
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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vga_client_register(pdev, NULL, NULL, NULL);
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out:
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return ret;
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}
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@ -881,6 +883,7 @@ static void i915_driver_cleanup_early(struct drm_i915_private *dev_priv)
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static int i915_mmio_setup(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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int mmio_bar;
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int mmio_size;
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@ -897,7 +900,7 @@ static int i915_mmio_setup(struct drm_device *dev)
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mmio_size = 512 * 1024;
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else
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mmio_size = 2 * 1024 * 1024;
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dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, mmio_size);
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dev_priv->regs = pci_iomap(pdev, mmio_bar, mmio_size);
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if (dev_priv->regs == NULL) {
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DRM_ERROR("failed to map registers\n");
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@ -913,9 +916,10 @@ static int i915_mmio_setup(struct drm_device *dev)
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static void i915_mmio_cleanup(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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intel_teardown_mchbar(dev);
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pci_iounmap(dev->pdev, dev_priv->regs);
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pci_iounmap(pdev, dev_priv->regs);
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}
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/**
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@ -994,6 +998,7 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
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*/
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static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
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{
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struct pci_dev *pdev = dev_priv->drm.pdev;
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struct drm_device *dev = &dev_priv->drm;
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int ret;
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@ -1032,11 +1037,11 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
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goto out_ggtt;
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}
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pci_set_master(dev->pdev);
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pci_set_master(pdev);
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/* overlay on gen2 is broken and can't address above 1G */
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if (IS_GEN2(dev)) {
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ret = dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
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ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(30));
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if (ret) {
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DRM_ERROR("failed to set DMA mask\n");
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@ -1053,7 +1058,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
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* which also needs to be handled carefully.
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*/
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if (IS_BROADWATER(dev) || IS_CRESTLINE(dev)) {
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ret = dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
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ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (ret) {
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DRM_ERROR("failed to set DMA mask\n");
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@ -1083,7 +1088,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv)
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* stuck interrupts on some machines.
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*/
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if (!IS_I945G(dev) && !IS_I945GM(dev)) {
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if (pci_enable_msi(dev->pdev) < 0)
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if (pci_enable_msi(pdev) < 0)
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DRM_DEBUG_DRIVER("can't enable MSI");
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}
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@ -1101,10 +1106,10 @@ out_ggtt:
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*/
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static void i915_driver_cleanup_hw(struct drm_i915_private *dev_priv)
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{
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struct drm_device *dev = &dev_priv->drm;
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struct pci_dev *pdev = dev_priv->drm.pdev;
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if (dev->pdev->msi_enabled)
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pci_disable_msi(dev->pdev);
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if (pdev->msi_enabled)
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pci_disable_msi(pdev);
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pm_qos_remove_request(&dev_priv->pm_qos);
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i915_ggtt_cleanup_hw(dev_priv);
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@ -1274,6 +1279,7 @@ out_free_priv:
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void i915_driver_unload(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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intel_fbdev_fini(dev);
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@ -1302,8 +1308,8 @@ void i915_driver_unload(struct drm_device *dev)
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kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
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dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
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vga_switcheroo_unregister_client(dev->pdev);
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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vga_switcheroo_unregister_client(pdev);
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vga_client_register(pdev, NULL, NULL, NULL);
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intel_csr_ucode_fini(dev_priv);
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@ -1400,6 +1406,7 @@ static bool suspend_to_idle(struct drm_i915_private *dev_priv)
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static int i915_drm_suspend(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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pci_power_t opregion_target_state;
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int error;
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@ -1416,11 +1423,11 @@ static int i915_drm_suspend(struct drm_device *dev)
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drm_kms_helper_poll_disable(dev);
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pci_save_state(dev->pdev);
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pci_save_state(pdev);
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error = i915_gem_suspend(dev);
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if (error) {
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dev_err(&dev->pdev->dev,
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dev_err(&pdev->dev,
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"GEM idle failed, resume might fail\n");
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goto out;
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}
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@ -1465,6 +1472,7 @@ out:
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static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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bool fw_csr;
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int ret;
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@ -1498,7 +1506,7 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
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goto out;
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}
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pci_disable_device(dev->pdev);
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pci_disable_device(pdev);
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/*
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* During hibernation on some platforms the BIOS may try to access
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* the device even though it's already in D3 and hang the machine. So
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* Acer Aspire 1830T
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*/
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if (!(hibernation && INTEL_INFO(dev_priv)->gen < 6))
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pci_set_power_state(dev->pdev, PCI_D3hot);
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pci_set_power_state(pdev, PCI_D3hot);
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dev_priv->suspended_to_idle = suspend_to_idle(dev_priv);
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@ -1629,6 +1637,7 @@ static int i915_drm_resume(struct drm_device *dev)
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static int i915_drm_resume_early(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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int ret;
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/*
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@ -1651,7 +1660,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
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* the device powered we can also remove the following set power state
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* call.
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*/
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ret = pci_set_power_state(dev->pdev, PCI_D0);
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ret = pci_set_power_state(pdev, PCI_D0);
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if (ret) {
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DRM_ERROR("failed to set PCI D0 power state (%d)\n", ret);
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goto out;
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@ -1670,12 +1679,12 @@ static int i915_drm_resume_early(struct drm_device *dev)
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* depend on the device enable refcount we can't anyway depend on them
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* disabling/enabling the device.
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*/
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if (pci_enable_device(dev->pdev)) {
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if (pci_enable_device(pdev)) {
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ret = -EIO;
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goto out;
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}
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pci_set_master(dev->pdev);
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pci_set_master(pdev);
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disable_rpm_wakeref_asserts(dev_priv);
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@ -350,10 +350,12 @@ static int setup_page_dma(struct drm_device *dev, struct i915_page_dma *p)
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static void cleanup_page_dma(struct drm_device *dev, struct i915_page_dma *p)
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{
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struct pci_dev *pdev = dev->pdev;
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if (WARN_ON(!p->page))
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return;
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dma_unmap_page(&dev->pdev->dev, p->daddr, 4096, PCI_DMA_BIDIRECTIONAL);
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dma_unmap_page(&pdev->dev, p->daddr, 4096, PCI_DMA_BIDIRECTIONAL);
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__free_page(p->page);
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memset(p, 0, sizeof(*p));
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}
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@ -2681,8 +2683,8 @@ static void ggtt_unbind_vma(struct i915_vma *vma)
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void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
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{
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struct drm_device *dev = obj->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct device *kdev = &dev_priv->drm.pdev->dev;
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struct i915_ggtt *ggtt = &dev_priv->ggtt;
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if (unlikely(ggtt->do_idle_maps)) {
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@ -2693,7 +2695,7 @@ void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
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}
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}
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dma_unmap_sg(&dev->pdev->dev, obj->pages->sgl, obj->pages->nents,
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dma_unmap_sg(kdev, obj->pages->sgl, obj->pages->nents,
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PCI_DMA_BIDIRECTIONAL);
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}
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@ -92,6 +92,7 @@ void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,
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static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct pci_dev *pdev = dev_priv->drm.pdev;
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struct i915_ggtt *ggtt = &dev_priv->ggtt;
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struct resource *r;
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u32 base;
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@ -111,7 +112,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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if (INTEL_INFO(dev)->gen >= 3) {
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u32 bsm;
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pci_read_config_dword(dev->pdev, INTEL_BSM, &bsm);
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pci_read_config_dword(pdev, INTEL_BSM, &bsm);
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base = bsm & INTEL_BSM_MASK;
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} else if (IS_I865G(dev)) {
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@ -119,7 +120,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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u16 toud = 0;
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u8 tmp;
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
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I845_ESMRAMC, &tmp);
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if (tmp & TSEG_ENABLE) {
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@ -133,7 +134,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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}
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}
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pci_bus_read_config_word(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0),
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I865_TOUD, &toud);
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base = (toud << 16) + tseg_size;
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@ -142,13 +143,13 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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u32 tom;
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u8 tmp;
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
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I85X_ESMRAMC, &tmp);
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if (tmp & TSEG_ENABLE)
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tseg_size = MB(1);
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 1),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 1),
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I85X_DRB3, &tmp);
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tom = tmp * MB(32);
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@ -158,7 +159,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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u32 tom;
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u8 tmp;
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
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I845_ESMRAMC, &tmp);
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if (tmp & TSEG_ENABLE) {
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@ -172,7 +173,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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}
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}
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
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I830_DRB3, &tmp);
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tom = tmp * MB(32);
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@ -182,7 +183,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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u32 tom;
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u8 tmp;
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pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
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pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
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I830_ESMRAMC, &tmp);
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if (tmp & TSEG_ENABLE) {
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@ -192,7 +193,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
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|||
tseg_size = KB(512);
|
||||
}
|
||||
|
||||
pci_bus_read_config_byte(dev->pdev->bus, PCI_DEVFN(0, 0),
|
||||
pci_bus_read_config_byte(pdev->bus, PCI_DEVFN(0, 0),
|
||||
I830_DRB3, &tmp);
|
||||
tom = tmp * MB(32);
|
||||
|
||||
|
|
|
@ -336,6 +336,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
|
|||
{
|
||||
struct drm_device *dev = error_priv->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct drm_i915_error_state *error = error_priv->error;
|
||||
struct drm_i915_error_object *obj;
|
||||
int i, j, offset, elt;
|
||||
|
@ -367,11 +368,11 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
|
|||
}
|
||||
err_printf(m, "Reset count: %u\n", error->reset_count);
|
||||
err_printf(m, "Suspend count: %u\n", error->suspend_count);
|
||||
err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
|
||||
err_printf(m, "PCI Revision: 0x%02x\n", dev->pdev->revision);
|
||||
err_printf(m, "PCI ID: 0x%04x\n", pdev->device);
|
||||
err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision);
|
||||
err_printf(m, "PCI Subsystem: %04x:%04x\n",
|
||||
dev->pdev->subsystem_vendor,
|
||||
dev->pdev->subsystem_device);
|
||||
pdev->subsystem_vendor,
|
||||
pdev->subsystem_device);
|
||||
err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
|
||||
|
||||
if (HAS_CSR(dev)) {
|
||||
|
|
|
@ -63,6 +63,7 @@ static void i915_restore_display(struct drm_device *dev)
|
|||
int i915_save_state(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
int i;
|
||||
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
|
@ -70,7 +71,7 @@ int i915_save_state(struct drm_device *dev)
|
|||
i915_save_display(dev);
|
||||
|
||||
if (IS_GEN4(dev))
|
||||
pci_read_config_word(dev->pdev, GCDGMBUS,
|
||||
pci_read_config_word(pdev, GCDGMBUS,
|
||||
&dev_priv->regfile.saveGCDGMBUS);
|
||||
|
||||
/* Cache mode state */
|
||||
|
@ -108,6 +109,7 @@ int i915_save_state(struct drm_device *dev)
|
|||
int i915_restore_state(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
int i;
|
||||
|
||||
mutex_lock(&dev->struct_mutex);
|
||||
|
@ -115,7 +117,7 @@ int i915_restore_state(struct drm_device *dev)
|
|||
i915_gem_restore_fences(dev);
|
||||
|
||||
if (IS_GEN4(dev))
|
||||
pci_write_config_word(dev->pdev, GCDGMBUS,
|
||||
pci_write_config_word(pdev, GCDGMBUS,
|
||||
dev_priv->regfile.saveGCDGMBUS);
|
||||
i915_restore_display(dev);
|
||||
|
||||
|
|
|
@ -7273,9 +7273,10 @@ static int i9xx_misc_get_display_clock_speed(struct drm_device *dev)
|
|||
|
||||
static int pnv_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
u16 gcfgc = 0;
|
||||
|
||||
pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
|
||||
pci_read_config_word(pdev, GCFGC, &gcfgc);
|
||||
|
||||
switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
|
||||
case GC_DISPLAY_CLOCK_267_MHZ_PNV:
|
||||
|
@ -7297,9 +7298,10 @@ static int pnv_get_display_clock_speed(struct drm_device *dev)
|
|||
|
||||
static int i915gm_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
u16 gcfgc = 0;
|
||||
|
||||
pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
|
||||
pci_read_config_word(pdev, GCFGC, &gcfgc);
|
||||
|
||||
if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
|
||||
return 133333;
|
||||
|
@ -7321,6 +7323,7 @@ static int i865_get_display_clock_speed(struct drm_device *dev)
|
|||
|
||||
static int i85x_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
u16 hpllcc = 0;
|
||||
|
||||
/*
|
||||
|
@ -7328,10 +7331,10 @@ static int i85x_get_display_clock_speed(struct drm_device *dev)
|
|||
* encoding is different :(
|
||||
* FIXME is this the right way to detect 852GM/852GMV?
|
||||
*/
|
||||
if (dev->pdev->revision == 0x1)
|
||||
if (pdev->revision == 0x1)
|
||||
return 133333;
|
||||
|
||||
pci_bus_read_config_word(dev->pdev->bus,
|
||||
pci_bus_read_config_word(pdev->bus,
|
||||
PCI_DEVFN(0, 3), HPLLCC, &hpllcc);
|
||||
|
||||
/* Assume that the hardware is in the high speed state. This
|
||||
|
@ -7432,10 +7435,11 @@ static unsigned int intel_hpll_vco(struct drm_device *dev)
|
|||
|
||||
static int gm45_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
unsigned int cdclk_sel, vco = intel_hpll_vco(dev);
|
||||
uint16_t tmp = 0;
|
||||
|
||||
pci_read_config_word(dev->pdev, GCFGC, &tmp);
|
||||
pci_read_config_word(pdev, GCFGC, &tmp);
|
||||
|
||||
cdclk_sel = (tmp >> 12) & 0x1;
|
||||
|
||||
|
@ -7454,6 +7458,7 @@ static int gm45_get_display_clock_speed(struct drm_device *dev)
|
|||
|
||||
static int i965gm_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
static const uint8_t div_3200[] = { 16, 10, 8 };
|
||||
static const uint8_t div_4000[] = { 20, 12, 10 };
|
||||
static const uint8_t div_5333[] = { 24, 16, 14 };
|
||||
|
@ -7461,7 +7466,7 @@ static int i965gm_get_display_clock_speed(struct drm_device *dev)
|
|||
unsigned int cdclk_sel, vco = intel_hpll_vco(dev);
|
||||
uint16_t tmp = 0;
|
||||
|
||||
pci_read_config_word(dev->pdev, GCFGC, &tmp);
|
||||
pci_read_config_word(pdev, GCFGC, &tmp);
|
||||
|
||||
cdclk_sel = ((tmp >> 8) & 0x1f) - 1;
|
||||
|
||||
|
@ -7491,6 +7496,7 @@ fail:
|
|||
|
||||
static int g33_get_display_clock_speed(struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
static const uint8_t div_3200[] = { 12, 10, 8, 7, 5, 16 };
|
||||
static const uint8_t div_4000[] = { 14, 12, 10, 8, 6, 20 };
|
||||
static const uint8_t div_4800[] = { 20, 14, 12, 10, 8, 24 };
|
||||
|
@ -7499,7 +7505,7 @@ static int g33_get_display_clock_speed(struct drm_device *dev)
|
|||
unsigned int cdclk_sel, vco = intel_hpll_vco(dev);
|
||||
uint16_t tmp = 0;
|
||||
|
||||
pci_read_config_word(dev->pdev, GCFGC, &tmp);
|
||||
pci_read_config_word(pdev, GCFGC, &tmp);
|
||||
|
||||
cdclk_sel = (tmp >> 4) & 0x7;
|
||||
|
||||
|
@ -15991,15 +15997,16 @@ static void intel_init_quirks(struct drm_device *dev)
|
|||
static void i915_disable_vga(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
u8 sr1;
|
||||
i915_reg_t vga_reg = i915_vgacntrl_reg(dev);
|
||||
|
||||
/* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
|
||||
vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
|
||||
outb(SR01, VGA_SR_INDEX);
|
||||
sr1 = inb(VGA_SR_DATA);
|
||||
outb(sr1 | 1<<5, VGA_SR_DATA);
|
||||
vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_put(pdev, VGA_RSRC_LEGACY_IO);
|
||||
udelay(300);
|
||||
|
||||
I915_WRITE(vga_reg, VGA_DISP_DISABLE);
|
||||
|
|
|
@ -183,6 +183,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
|
|||
struct intel_framebuffer *intel_fb = ifbdev->fb;
|
||||
struct drm_device *dev = helper->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct i915_ggtt *ggtt = &dev_priv->ggtt;
|
||||
struct fb_info *info;
|
||||
struct drm_framebuffer *fb;
|
||||
|
@ -280,7 +281,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
|
|||
ifbdev->vma = vma;
|
||||
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
vga_switcheroo_client_fb_set(dev->pdev, info);
|
||||
vga_switcheroo_client_fb_set(pdev, info);
|
||||
return 0;
|
||||
|
||||
out_destroy_fbi:
|
||||
|
|
|
@ -565,6 +565,7 @@ fail:
|
|||
|
||||
static void guc_fw_fetch(struct drm_device *dev, struct intel_guc_fw *guc_fw)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
struct drm_i915_gem_object *obj;
|
||||
const struct firmware *fw;
|
||||
struct guc_css_header *css;
|
||||
|
@ -574,7 +575,7 @@ static void guc_fw_fetch(struct drm_device *dev, struct intel_guc_fw *guc_fw)
|
|||
DRM_DEBUG_DRIVER("before requesting firmware: GuC fw fetch status %s\n",
|
||||
intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
|
||||
|
||||
err = request_firmware(&fw, guc_fw->guc_fw_path, &dev->pdev->dev);
|
||||
err = request_firmware(&fw, guc_fw->guc_fw_path, &pdev->dev);
|
||||
if (err)
|
||||
goto fail;
|
||||
if (!fw)
|
||||
|
|
|
@ -633,6 +633,7 @@ static const struct i2c_algorithm gmbus_algorithm = {
|
|||
int intel_setup_gmbus(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct intel_gmbus *bus;
|
||||
unsigned int pin;
|
||||
int ret;
|
||||
|
@ -663,7 +664,7 @@ int intel_setup_gmbus(struct drm_device *dev)
|
|||
"i915 gmbus %s",
|
||||
get_gmbus_pin(dev_priv, pin)->name);
|
||||
|
||||
bus->adapter.dev.parent = &dev->pdev->dev;
|
||||
bus->adapter.dev.parent = &pdev->dev;
|
||||
bus->dev_priv = dev_priv;
|
||||
|
||||
bus->adapter.algo = &gmbus_algorithm;
|
||||
|
|
|
@ -287,6 +287,7 @@ void intel_display_set_init_power(struct drm_i915_private *dev_priv,
|
|||
*/
|
||||
static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
|
||||
/*
|
||||
|
@ -299,9 +300,9 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
|
|||
* sure vgacon can keep working normally without triggering interrupts
|
||||
* and error messages.
|
||||
*/
|
||||
vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
|
||||
outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
|
||||
vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_put(pdev, VGA_RSRC_LEGACY_IO);
|
||||
|
||||
if (IS_BROADWELL(dev))
|
||||
gen8_irq_power_well_post_enable(dev_priv,
|
||||
|
@ -318,7 +319,7 @@ static void hsw_power_well_pre_disable(struct drm_i915_private *dev_priv)
|
|||
static void skl_power_well_post_enable(struct drm_i915_private *dev_priv,
|
||||
struct i915_power_well *power_well)
|
||||
{
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
|
||||
/*
|
||||
* After we re-enable the power well, if we touch VGA register 0x3d5
|
||||
|
@ -331,9 +332,9 @@ static void skl_power_well_post_enable(struct drm_i915_private *dev_priv,
|
|||
* and error messages.
|
||||
*/
|
||||
if (power_well->data == SKL_DISP_PW_2) {
|
||||
vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
|
||||
outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
|
||||
vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
vga_put(pdev, VGA_RSRC_LEGACY_IO);
|
||||
|
||||
gen8_irq_power_well_post_enable(dev_priv,
|
||||
1 << PIPE_C | 1 << PIPE_B);
|
||||
|
@ -2651,8 +2652,8 @@ void intel_power_domains_suspend(struct drm_i915_private *dev_priv)
|
|||
*/
|
||||
void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct device *kdev = &dev->pdev->dev;
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct device *kdev = &pdev->dev;
|
||||
|
||||
pm_runtime_get_sync(kdev);
|
||||
|
||||
|
@ -2672,8 +2673,8 @@ void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
|
|||
*/
|
||||
bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct device *kdev = &dev->pdev->dev;
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct device *kdev = &pdev->dev;
|
||||
|
||||
if (IS_ENABLED(CONFIG_PM)) {
|
||||
int ret = pm_runtime_get_if_in_use(kdev);
|
||||
|
@ -2714,8 +2715,8 @@ bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *dev_priv)
|
|||
*/
|
||||
void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct device *kdev = &dev->pdev->dev;
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct device *kdev = &pdev->dev;
|
||||
|
||||
assert_rpm_wakelock_held(dev_priv);
|
||||
pm_runtime_get_noresume(kdev);
|
||||
|
@ -2733,8 +2734,8 @@ void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv)
|
|||
*/
|
||||
void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct device *kdev = &dev->pdev->dev;
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct device *kdev = &pdev->dev;
|
||||
|
||||
assert_rpm_wakelock_held(dev_priv);
|
||||
if (atomic_dec_and_test(&dev_priv->pm.wakeref_count))
|
||||
|
@ -2756,8 +2757,9 @@ void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
|
|||
*/
|
||||
void intel_runtime_pm_enable(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct pci_dev *pdev = dev_priv->drm.pdev;
|
||||
struct drm_device *dev = &dev_priv->drm;
|
||||
struct device *kdev = &dev->pdev->dev;
|
||||
struct device *kdev = &pdev->dev;
|
||||
|
||||
pm_runtime_set_autosuspend_delay(kdev, 10000); /* 10s */
|
||||
pm_runtime_mark_last_busy(kdev);
|
||||
|
|
|
@ -2930,10 +2930,12 @@ static bool
|
|||
intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
|
||||
struct drm_device *dev)
|
||||
{
|
||||
struct pci_dev *pdev = dev->pdev;
|
||||
|
||||
sdvo->ddc.owner = THIS_MODULE;
|
||||
sdvo->ddc.class = I2C_CLASS_DDC;
|
||||
snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
|
||||
sdvo->ddc.dev.parent = &dev->pdev->dev;
|
||||
sdvo->ddc.dev.parent = &pdev->dev;
|
||||
sdvo->ddc.algo_data = sdvo;
|
||||
sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
|
||||
|
||||
|
|
Loading…
Reference in a new issue