switchtec: Add IOCTLs to the Switchtec driver
Add a couple of special IOCTLs to: * Inform userspace of firmware partition locations * Pass event counts and allow userspace to wait on events * Translate PFF numbers used by the switch to port numbers [Dan Carpenter <dan.carpenter@oracle.com>: fix off-by-one in ioctl_event_ctl()] Tested-by: Krishna Dhulipala <krishnad@fb.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Stephen Bates <stephen.bates@microsemi.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Wei Zhang <wzhang@fb.com> Reviewed-by: Jens Axboe <axboe@fb.com>zero-colors
Logan Gunthorpe
Bjorn Helgaas
parent
5d8e1881f4
commit
52eabba5bc
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@ -191,6 +191,7 @@ Code Seq#(hex) Include File Comments
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'W' 00-1F linux/watchdog.h conflict!
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'W' 00-1F linux/wanrouter.h conflict! (pre 3.9)
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'W' 00-3F sound/asound.h conflict!
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'W' 40-5F drivers/pci/switch/switchtec.c
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'X' all fs/xfs/xfs_fs.h conflict!
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and fs/xfs/linux-2.6/xfs_ioctl32.h
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and include/linux/falloc.h
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@ -51,3 +51,30 @@ The char device has the following semantics:
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* The poll call will also be supported for userspace applications that
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need to do other things while waiting for the command to complete.
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The following IOCTLs are also supported by the device:
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* SWITCHTEC_IOCTL_FLASH_INFO - Retrieve firmware length and number
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of partitions in the device.
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* SWITCHTEC_IOCTL_FLASH_PART_INFO - Retrieve address and lengeth for
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any specified partition in flash.
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* SWITCHTEC_IOCTL_EVENT_SUMMARY - Read a structure of bitmaps
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indicating all uncleared events.
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* SWITCHTEC_IOCTL_EVENT_CTL - Get the current count, clear and set flags
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for any event. This ioctl takes in a switchtec_ioctl_event_ctl struct
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with the event_id, index and flags set (index being the partition or PFF
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number for non-global events). It returns whether the event has
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occurred, the number of times and any event specific data. The flags
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can be used to clear the count or enable and disable actions to
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happen when the event occurs.
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By using the SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL flag,
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you can set an event to trigger a poll command to return with
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POLLPRI. In this way, userspace can wait for events to occur.
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* SWITCHTEC_IOCTL_PFF_TO_PORT and SWITCHTEC_IOCTL_PORT_TO_PFF convert
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between PCI Function Framework number (used by the event system)
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and Switchtec Logic Port ID and Partition number (which is more
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user friendly).
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@ -9664,6 +9664,7 @@ S: Maintained
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F: Documentation/switchtec.txt
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F: Documentation/ABI/testing/sysfs-class-switchtec
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F: drivers/pci/switch/switchtec*
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F: include/uapi/linux/switchtec_ioctl.h
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PCI DRIVER FOR NVIDIA TEGRA
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M: Thierry Reding <thierry.reding@gmail.com>
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@ -13,6 +13,8 @@
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*
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*/
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#include <linux/switchtec_ioctl.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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@ -778,6 +780,431 @@ static unsigned int switchtec_dev_poll(struct file *filp, poll_table *wait)
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return ret;
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}
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static int ioctl_flash_info(struct switchtec_dev *stdev,
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struct switchtec_ioctl_flash_info __user *uinfo)
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{
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struct switchtec_ioctl_flash_info info = {0};
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struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
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info.flash_length = ioread32(&fi->flash_length);
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info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS;
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if (copy_to_user(uinfo, &info, sizeof(info)))
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return -EFAULT;
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return 0;
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}
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static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
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struct partition_info __iomem *pi)
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{
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info->address = ioread32(&pi->address);
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info->length = ioread32(&pi->length);
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}
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static int ioctl_flash_part_info(struct switchtec_dev *stdev,
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struct switchtec_ioctl_flash_part_info __user *uinfo)
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{
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struct switchtec_ioctl_flash_part_info info = {0};
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struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
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u32 active_addr = -1;
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if (copy_from_user(&info, uinfo, sizeof(info)))
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return -EFAULT;
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switch (info.flash_partition) {
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case SWITCHTEC_IOCTL_PART_CFG0:
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active_addr = ioread32(&fi->active_cfg);
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set_fw_info_part(&info, &fi->cfg0);
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break;
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case SWITCHTEC_IOCTL_PART_CFG1:
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active_addr = ioread32(&fi->active_cfg);
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set_fw_info_part(&info, &fi->cfg1);
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break;
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case SWITCHTEC_IOCTL_PART_IMG0:
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active_addr = ioread32(&fi->active_img);
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set_fw_info_part(&info, &fi->img0);
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break;
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case SWITCHTEC_IOCTL_PART_IMG1:
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active_addr = ioread32(&fi->active_img);
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set_fw_info_part(&info, &fi->img1);
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break;
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case SWITCHTEC_IOCTL_PART_NVLOG:
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set_fw_info_part(&info, &fi->nvlog);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR0:
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set_fw_info_part(&info, &fi->vendor[0]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR1:
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set_fw_info_part(&info, &fi->vendor[1]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR2:
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set_fw_info_part(&info, &fi->vendor[2]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR3:
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set_fw_info_part(&info, &fi->vendor[3]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR4:
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set_fw_info_part(&info, &fi->vendor[4]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR5:
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set_fw_info_part(&info, &fi->vendor[5]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR6:
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set_fw_info_part(&info, &fi->vendor[6]);
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break;
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case SWITCHTEC_IOCTL_PART_VENDOR7:
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set_fw_info_part(&info, &fi->vendor[7]);
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break;
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default:
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return -EINVAL;
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}
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if (info.address == active_addr)
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info.active = 1;
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if (copy_to_user(uinfo, &info, sizeof(info)))
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return -EFAULT;
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return 0;
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}
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static int ioctl_event_summary(struct switchtec_dev *stdev,
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struct switchtec_user *stuser,
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struct switchtec_ioctl_event_summary __user *usum)
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{
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struct switchtec_ioctl_event_summary s = {0};
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int i;
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u32 reg;
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s.global = ioread32(&stdev->mmio_sw_event->global_summary);
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s.part_bitmap = ioread32(&stdev->mmio_sw_event->part_event_bitmap);
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s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
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for (i = 0; i < stdev->partition_count; i++) {
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reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
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s.part[i] = reg;
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}
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for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
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reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
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if (reg != MICROSEMI_VENDOR_ID)
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break;
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reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
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s.pff[i] = reg;
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}
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if (copy_to_user(usum, &s, sizeof(s)))
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return -EFAULT;
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stuser->event_cnt = atomic_read(&stdev->event_cnt);
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return 0;
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}
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static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
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size_t offset, int index)
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{
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return (void __iomem *)stdev->mmio_sw_event + offset;
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}
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static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
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size_t offset, int index)
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{
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return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
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}
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static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
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size_t offset, int index)
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{
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return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
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}
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#define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
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#define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
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#define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
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const struct event_reg {
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size_t offset;
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u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
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size_t offset, int index);
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} event_regs[] = {
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EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
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twi_mrpc_comp_async_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
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cli_mrpc_comp_async_hdr),
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EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
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EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
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EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
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EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
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EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
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EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
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};
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static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
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int event_id, int index)
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{
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size_t off;
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if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
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return ERR_PTR(-EINVAL);
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off = event_regs[event_id].offset;
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if (event_regs[event_id].map_reg == part_ev_reg) {
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if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
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index = stdev->partition;
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else if (index < 0 || index >= stdev->partition_count)
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return ERR_PTR(-EINVAL);
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} else if (event_regs[event_id].map_reg == pff_ev_reg) {
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if (index < 0 || index >= stdev->pff_csr_count)
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return ERR_PTR(-EINVAL);
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}
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return event_regs[event_id].map_reg(stdev, off, index);
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}
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static int event_ctl(struct switchtec_dev *stdev,
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struct switchtec_ioctl_event_ctl *ctl)
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{
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int i;
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u32 __iomem *reg;
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u32 hdr;
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reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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hdr = ioread32(reg);
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for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
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ctl->data[i] = ioread32(®[i + 1]);
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ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
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ctl->count = (hdr >> 5) & 0xFF;
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if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
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hdr &= ~SWITCHTEC_EVENT_CLEAR;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
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hdr |= SWITCHTEC_EVENT_EN_IRQ;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
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hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
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hdr |= SWITCHTEC_EVENT_EN_LOG;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
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hdr &= ~SWITCHTEC_EVENT_EN_LOG;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
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hdr |= SWITCHTEC_EVENT_EN_CLI;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
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hdr &= ~SWITCHTEC_EVENT_EN_CLI;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
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hdr |= SWITCHTEC_EVENT_FATAL;
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if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
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hdr &= ~SWITCHTEC_EVENT_FATAL;
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if (ctl->flags)
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iowrite32(hdr, reg);
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ctl->flags = 0;
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if (hdr & SWITCHTEC_EVENT_EN_IRQ)
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ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
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if (hdr & SWITCHTEC_EVENT_EN_LOG)
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ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
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if (hdr & SWITCHTEC_EVENT_EN_CLI)
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ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
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if (hdr & SWITCHTEC_EVENT_FATAL)
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ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
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return 0;
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}
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static int ioctl_event_ctl(struct switchtec_dev *stdev,
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struct switchtec_ioctl_event_ctl __user *uctl)
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{
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int ret;
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int nr_idxs;
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struct switchtec_ioctl_event_ctl ctl;
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if (copy_from_user(&ctl, uctl, sizeof(ctl)))
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return -EFAULT;
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if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
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return -EINVAL;
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if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
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return -EINVAL;
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if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
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if (event_regs[ctl.event_id].map_reg == global_ev_reg)
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nr_idxs = 1;
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else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
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nr_idxs = stdev->partition_count;
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else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
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nr_idxs = stdev->pff_csr_count;
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else
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return -EINVAL;
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for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
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ret = event_ctl(stdev, &ctl);
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if (ret < 0)
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return ret;
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}
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} else {
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ret = event_ctl(stdev, &ctl);
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if (ret < 0)
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return ret;
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}
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if (copy_to_user(uctl, &ctl, sizeof(ctl)))
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return -EFAULT;
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return 0;
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}
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static int ioctl_pff_to_port(struct switchtec_dev *stdev,
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struct switchtec_ioctl_pff_port *up)
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{
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int i, part;
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u32 reg;
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struct part_cfg_regs *pcfg;
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struct switchtec_ioctl_pff_port p;
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if (copy_from_user(&p, up, sizeof(p)))
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return -EFAULT;
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p.port = -1;
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for (part = 0; part < stdev->partition_count; part++) {
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pcfg = &stdev->mmio_part_cfg_all[part];
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p.partition = part;
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reg = ioread32(&pcfg->usp_pff_inst_id);
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if (reg == p.pff) {
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p.port = 0;
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break;
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}
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reg = ioread32(&pcfg->vep_pff_inst_id);
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if (reg == p.pff) {
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p.port = SWITCHTEC_IOCTL_PFF_VEP;
|
||||
break;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
|
||||
reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
|
||||
if (reg != p.pff)
|
||||
continue;
|
||||
|
||||
p.port = i + 1;
|
||||
break;
|
||||
}
|
||||
|
||||
if (p.port != -1)
|
||||
break;
|
||||
}
|
||||
|
||||
if (copy_to_user(up, &p, sizeof(p)))
|
||||
return -EFAULT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ioctl_port_to_pff(struct switchtec_dev *stdev,
|
||||
struct switchtec_ioctl_pff_port *up)
|
||||
{
|
||||
struct switchtec_ioctl_pff_port p;
|
||||
struct part_cfg_regs *pcfg;
|
||||
|
||||
if (copy_from_user(&p, up, sizeof(p)))
|
||||
return -EFAULT;
|
||||
|
||||
if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
|
||||
pcfg = stdev->mmio_part_cfg;
|
||||
else if (p.partition < stdev->partition_count)
|
||||
pcfg = &stdev->mmio_part_cfg_all[p.partition];
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
switch (p.port) {
|
||||
case 0:
|
||||
p.pff = ioread32(&pcfg->usp_pff_inst_id);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_PFF_VEP:
|
||||
p.pff = ioread32(&pcfg->vep_pff_inst_id);
|
||||
break;
|
||||
default:
|
||||
if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
|
||||
return -EINVAL;
|
||||
p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
|
||||
break;
|
||||
}
|
||||
|
||||
if (copy_to_user(up, &p, sizeof(p)))
|
||||
return -EFAULT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
struct switchtec_user *stuser = filp->private_data;
|
||||
struct switchtec_dev *stdev = stuser->stdev;
|
||||
int rc;
|
||||
void __user *argp = (void __user *)arg;
|
||||
|
||||
rc = lock_mutex_and_test_alive(stdev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
switch (cmd) {
|
||||
case SWITCHTEC_IOCTL_FLASH_INFO:
|
||||
rc = ioctl_flash_info(stdev, argp);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_FLASH_PART_INFO:
|
||||
rc = ioctl_flash_part_info(stdev, argp);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_EVENT_SUMMARY:
|
||||
rc = ioctl_event_summary(stdev, stuser, argp);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_EVENT_CTL:
|
||||
rc = ioctl_event_ctl(stdev, argp);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_PFF_TO_PORT:
|
||||
rc = ioctl_pff_to_port(stdev, argp);
|
||||
break;
|
||||
case SWITCHTEC_IOCTL_PORT_TO_PFF:
|
||||
rc = ioctl_port_to_pff(stdev, argp);
|
||||
break;
|
||||
default:
|
||||
rc = -ENOTTY;
|
||||
break;
|
||||
}
|
||||
|
||||
mutex_unlock(&stdev->mrpc_mutex);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static const struct file_operations switchtec_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = switchtec_dev_open,
|
||||
|
|
@ -785,6 +1212,8 @@ static const struct file_operations switchtec_fops = {
|
|||
.write = switchtec_dev_write,
|
||||
.read = switchtec_dev_read,
|
||||
.poll = switchtec_dev_poll,
|
||||
.unlocked_ioctl = switchtec_dev_ioctl,
|
||||
.compat_ioctl = switchtec_dev_ioctl,
|
||||
};
|
||||
|
||||
static void stdev_release(struct device *dev)
|
||||
|
|
@ -871,11 +1300,52 @@ err_put:
|
|||
return ERR_PTR(rc);
|
||||
}
|
||||
|
||||
static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
|
||||
{
|
||||
size_t off = event_regs[eid].offset;
|
||||
u32 __iomem *hdr_reg;
|
||||
u32 hdr;
|
||||
|
||||
hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
|
||||
hdr = ioread32(hdr_reg);
|
||||
|
||||
if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
|
||||
return 0;
|
||||
|
||||
dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
|
||||
hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
|
||||
iowrite32(hdr, hdr_reg);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int mask_all_events(struct switchtec_dev *stdev, int eid)
|
||||
{
|
||||
int idx;
|
||||
int count = 0;
|
||||
|
||||
if (event_regs[eid].map_reg == part_ev_reg) {
|
||||
for (idx = 0; idx < stdev->partition_count; idx++)
|
||||
count += mask_event(stdev, eid, idx);
|
||||
} else if (event_regs[eid].map_reg == pff_ev_reg) {
|
||||
for (idx = 0; idx < stdev->pff_csr_count; idx++) {
|
||||
if (!stdev->pff_local[idx])
|
||||
continue;
|
||||
count += mask_event(stdev, eid, idx);
|
||||
}
|
||||
} else {
|
||||
count += mask_event(stdev, eid, 0);
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static irqreturn_t switchtec_event_isr(int irq, void *dev)
|
||||
{
|
||||
struct switchtec_dev *stdev = dev;
|
||||
u32 reg;
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
int eid, event_count = 0;
|
||||
|
||||
reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
|
||||
if (reg & SWITCHTEC_EVENT_OCCURRED) {
|
||||
|
|
@ -885,6 +1355,17 @@ static irqreturn_t switchtec_event_isr(int irq, void *dev)
|
|||
iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
|
||||
}
|
||||
|
||||
for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++)
|
||||
event_count += mask_all_events(stdev, eid);
|
||||
|
||||
if (event_count) {
|
||||
atomic_inc(&stdev->event_cnt);
|
||||
wake_up_interruptible(&stdev->event_wq);
|
||||
dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
|
||||
event_count);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,132 @@
|
|||
/*
|
||||
* Microsemi Switchtec PCIe Driver
|
||||
* Copyright (c) 2017, Microsemi Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _UAPI_LINUX_SWITCHTEC_IOCTL_H
|
||||
#define _UAPI_LINUX_SWITCHTEC_IOCTL_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define SWITCHTEC_IOCTL_PART_CFG0 0
|
||||
#define SWITCHTEC_IOCTL_PART_CFG1 1
|
||||
#define SWITCHTEC_IOCTL_PART_IMG0 2
|
||||
#define SWITCHTEC_IOCTL_PART_IMG1 3
|
||||
#define SWITCHTEC_IOCTL_PART_NVLOG 4
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR0 5
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR1 6
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR2 7
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR3 8
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR4 9
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR5 10
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR6 11
|
||||
#define SWITCHTEC_IOCTL_PART_VENDOR7 12
|
||||
#define SWITCHTEC_IOCTL_NUM_PARTITIONS 13
|
||||
|
||||
struct switchtec_ioctl_flash_info {
|
||||
__u64 flash_length;
|
||||
__u32 num_partitions;
|
||||
__u32 padding;
|
||||
};
|
||||
|
||||
struct switchtec_ioctl_flash_part_info {
|
||||
__u32 flash_partition;
|
||||
__u32 address;
|
||||
__u32 length;
|
||||
__u32 active;
|
||||
};
|
||||
|
||||
struct switchtec_ioctl_event_summary {
|
||||
__u64 global;
|
||||
__u64 part_bitmap;
|
||||
__u32 local_part;
|
||||
__u32 padding;
|
||||
__u32 part[48];
|
||||
__u32 pff[48];
|
||||
};
|
||||
|
||||
#define SWITCHTEC_IOCTL_EVENT_STACK_ERROR 0
|
||||
#define SWITCHTEC_IOCTL_EVENT_PPU_ERROR 1
|
||||
#define SWITCHTEC_IOCTL_EVENT_ISP_ERROR 2
|
||||
#define SWITCHTEC_IOCTL_EVENT_SYS_RESET 3
|
||||
#define SWITCHTEC_IOCTL_EVENT_FW_EXC 4
|
||||
#define SWITCHTEC_IOCTL_EVENT_FW_NMI 5
|
||||
#define SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL 6
|
||||
#define SWITCHTEC_IOCTL_EVENT_FW_FATAL 7
|
||||
#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP 8
|
||||
#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC 9
|
||||
#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP 10
|
||||
#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC 11
|
||||
#define SWITCHTEC_IOCTL_EVENT_GPIO_INT 12
|
||||
#define SWITCHTEC_IOCTL_EVENT_PART_RESET 13
|
||||
#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP 14
|
||||
#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC 15
|
||||
#define SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP 16
|
||||
#define SWITCHTEC_IOCTL_EVENT_AER_IN_P2P 17
|
||||
#define SWITCHTEC_IOCTL_EVENT_AER_IN_VEP 18
|
||||
#define SWITCHTEC_IOCTL_EVENT_DPC 19
|
||||
#define SWITCHTEC_IOCTL_EVENT_CTS 20
|
||||
#define SWITCHTEC_IOCTL_EVENT_HOTPLUG 21
|
||||
#define SWITCHTEC_IOCTL_EVENT_IER 22
|
||||
#define SWITCHTEC_IOCTL_EVENT_THRESH 23
|
||||
#define SWITCHTEC_IOCTL_EVENT_POWER_MGMT 24
|
||||
#define SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING 25
|
||||
#define SWITCHTEC_IOCTL_EVENT_FORCE_SPEED 26
|
||||
#define SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT 27
|
||||
#define SWITCHTEC_IOCTL_EVENT_LINK_STATE 28
|
||||
#define SWITCHTEC_IOCTL_MAX_EVENTS 29
|
||||
|
||||
#define SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX -1
|
||||
#define SWITCHTEC_IOCTL_EVENT_IDX_ALL -2
|
||||
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR (1 << 0)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL (1 << 1)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG (1 << 2)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI (1 << 3)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL (1 << 4)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL (1 << 5)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG (1 << 6)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI (1 << 7)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL (1 << 8)
|
||||
#define SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED (~0x1ff)
|
||||
|
||||
struct switchtec_ioctl_event_ctl {
|
||||
__u32 event_id;
|
||||
__s32 index;
|
||||
__u32 flags;
|
||||
__u32 occurred;
|
||||
__u32 count;
|
||||
__u32 data[5];
|
||||
};
|
||||
|
||||
#define SWITCHTEC_IOCTL_PFF_VEP 100
|
||||
struct switchtec_ioctl_pff_port {
|
||||
__u32 pff;
|
||||
__u32 partition;
|
||||
__u32 port;
|
||||
};
|
||||
|
||||
#define SWITCHTEC_IOCTL_FLASH_INFO \
|
||||
_IOR('W', 0x40, struct switchtec_ioctl_flash_info)
|
||||
#define SWITCHTEC_IOCTL_FLASH_PART_INFO \
|
||||
_IOWR('W', 0x41, struct switchtec_ioctl_flash_part_info)
|
||||
#define SWITCHTEC_IOCTL_EVENT_SUMMARY \
|
||||
_IOR('W', 0x42, struct switchtec_ioctl_event_summary)
|
||||
#define SWITCHTEC_IOCTL_EVENT_CTL \
|
||||
_IOWR('W', 0x43, struct switchtec_ioctl_event_ctl)
|
||||
#define SWITCHTEC_IOCTL_PFF_TO_PORT \
|
||||
_IOWR('W', 0x44, struct switchtec_ioctl_pff_port)
|
||||
#define SWITCHTEC_IOCTL_PORT_TO_PFF \
|
||||
_IOWR('W', 0x45, struct switchtec_ioctl_pff_port)
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue