drm/etnaviv: add helper to extract bitfields
Add a helper to extract etnaviv bitfields from register values. Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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@ -120,6 +120,9 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
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return 0;
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}
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#define etnaviv_field(val, field) \
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(((val) & field##__MASK) >> field##__SHIFT)
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static void etnaviv_hw_specs(struct etnaviv_gpu *gpu)
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{
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if (gpu->identity.minor_features0 &
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@ -129,37 +132,28 @@ static void etnaviv_hw_specs(struct etnaviv_gpu *gpu)
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specs[0] = gpu_read(gpu, VIVS_HI_CHIP_SPECS);
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specs[1] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_2);
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gpu->identity.stream_count =
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(specs[0] & VIVS_HI_CHIP_SPECS_STREAM_COUNT__MASK)
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>> VIVS_HI_CHIP_SPECS_STREAM_COUNT__SHIFT;
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gpu->identity.register_max =
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(specs[0] & VIVS_HI_CHIP_SPECS_REGISTER_MAX__MASK)
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>> VIVS_HI_CHIP_SPECS_REGISTER_MAX__SHIFT;
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gpu->identity.thread_count =
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(specs[0] & VIVS_HI_CHIP_SPECS_THREAD_COUNT__MASK)
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>> VIVS_HI_CHIP_SPECS_THREAD_COUNT__SHIFT;
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gpu->identity.vertex_cache_size =
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(specs[0] & VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__MASK)
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>> VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__SHIFT;
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gpu->identity.shader_core_count =
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(specs[0] & VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__MASK)
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>> VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__SHIFT;
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gpu->identity.pixel_pipes =
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(specs[0] & VIVS_HI_CHIP_SPECS_PIXEL_PIPES__MASK)
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>> VIVS_HI_CHIP_SPECS_PIXEL_PIPES__SHIFT;
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gpu->identity.stream_count = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_STREAM_COUNT);
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gpu->identity.register_max = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_REGISTER_MAX);
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gpu->identity.thread_count = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_THREAD_COUNT);
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gpu->identity.vertex_cache_size = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE);
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gpu->identity.shader_core_count = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT);
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gpu->identity.pixel_pipes = etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_PIXEL_PIPES);
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gpu->identity.vertex_output_buffer_size =
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(specs[0] & VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__MASK)
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>> VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__SHIFT;
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etnaviv_field(specs[0],
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VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE);
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gpu->identity.buffer_size =
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(specs[1] & VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__MASK)
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>> VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__SHIFT;
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gpu->identity.instruction_count =
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(specs[1] & VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__MASK)
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>> VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__SHIFT;
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gpu->identity.num_constants =
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(specs[1] & VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__MASK)
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>> VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__SHIFT;
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gpu->identity.buffer_size = etnaviv_field(specs[1],
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VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE);
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gpu->identity.instruction_count = etnaviv_field(specs[1],
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VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT);
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gpu->identity.num_constants = etnaviv_field(specs[1],
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VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS);
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}
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/* Fill in the stream count if not specified */
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@ -251,12 +245,10 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu)
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chipIdentity = gpu_read(gpu, VIVS_HI_CHIP_IDENTITY);
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/* Special case for older graphic cores. */
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if (((chipIdentity & VIVS_HI_CHIP_IDENTITY_FAMILY__MASK)
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>> VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT) == 0x01) {
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if (etnaviv_field(chipIdentity, VIVS_HI_CHIP_IDENTITY_FAMILY) == 0x01) {
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gpu->identity.model = chipModel_GC500;
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gpu->identity.revision =
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(chipIdentity & VIVS_HI_CHIP_IDENTITY_REVISION__MASK)
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>> VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT;
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gpu->identity.revision = etnaviv_field(chipIdentity,
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VIVS_HI_CHIP_IDENTITY_REVISION);
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} else {
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gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL);
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