Add domain_flush_cache
Because virtual machine domain may have multiple devices from different iommus, it cannot use __iommu_flush_cache. In some common low level functions, use domain_flush_cache instead of __iommu_flush_cache. On the other hand, in some functions, iommu can is specified or domain cannot be got, still use __iommu_flush_cache Signed-off-by: Weidong Han <weidong.han@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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c7151a8dfe
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@ -445,6 +445,13 @@ static struct intel_iommu *device_to_iommu(u8 bus, u8 devfn)
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return NULL;
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}
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static void domain_flush_cache(struct dmar_domain *domain,
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void *addr, int size)
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{
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if (!domain->iommu_coherency)
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clflush_cache_range(addr, size);
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}
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/* Gets context entry for a given bus and devfn */
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static struct context_entry * device_to_context_entry(struct intel_iommu *iommu,
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u8 bus, u8 devfn)
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@ -585,7 +592,6 @@ static struct dma_pte * addr_to_dma_pte(struct dmar_domain *domain, u64 addr)
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int level = agaw_to_level(domain->agaw);
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int offset;
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unsigned long flags;
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struct intel_iommu *iommu = domain_get_iommu(domain);
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BUG_ON(!domain->pgd);
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@ -609,8 +615,7 @@ static struct dma_pte * addr_to_dma_pte(struct dmar_domain *domain, u64 addr)
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flags);
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return NULL;
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}
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__iommu_flush_cache(iommu, tmp_page,
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PAGE_SIZE);
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domain_flush_cache(domain, tmp_page, PAGE_SIZE);
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dma_set_pte_addr(pte, virt_to_phys(tmp_page));
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/*
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* high level table always sets r/w, last level page
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@ -618,7 +623,7 @@ static struct dma_pte * addr_to_dma_pte(struct dmar_domain *domain, u64 addr)
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*/
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dma_set_pte_readable(pte);
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dma_set_pte_writable(pte);
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__iommu_flush_cache(iommu, pte, sizeof(*pte));
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domain_flush_cache(domain, pte, sizeof(*pte));
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}
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parent = phys_to_virt(dma_pte_addr(pte));
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level--;
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@ -655,14 +660,13 @@ static struct dma_pte *dma_addr_level_pte(struct dmar_domain *domain, u64 addr,
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static void dma_pte_clear_one(struct dmar_domain *domain, u64 addr)
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{
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struct dma_pte *pte = NULL;
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struct intel_iommu *iommu = domain_get_iommu(domain);
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/* get last level pte */
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pte = dma_addr_level_pte(domain, addr, 1);
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if (pte) {
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dma_clear_pte(pte);
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__iommu_flush_cache(iommu, pte, sizeof(*pte));
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domain_flush_cache(domain, pte, sizeof(*pte));
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}
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}
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@ -693,7 +697,6 @@ static void dma_pte_free_pagetable(struct dmar_domain *domain,
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int total = agaw_to_level(domain->agaw);
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int level;
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u64 tmp;
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struct intel_iommu *iommu = domain_get_iommu(domain);
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start &= (((u64)1) << addr_width) - 1;
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end &= (((u64)1) << addr_width) - 1;
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@ -711,8 +714,7 @@ static void dma_pte_free_pagetable(struct dmar_domain *domain,
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free_pgtable_page(
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phys_to_virt(dma_pte_addr(pte)));
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dma_clear_pte(pte);
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__iommu_flush_cache(iommu,
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pte, sizeof(*pte));
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domain_flush_cache(domain, pte, sizeof(*pte));
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}
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tmp += level_size(level);
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}
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@ -1445,12 +1447,17 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
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u8 bus, u8 devfn)
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{
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struct context_entry *context;
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struct intel_iommu *iommu = domain_get_iommu(domain);
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unsigned long flags;
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struct intel_iommu *iommu;
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pr_debug("Set context mapping for %02x:%02x.%d\n",
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bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
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BUG_ON(!domain->pgd);
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iommu = device_to_iommu(bus, devfn);
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if (!iommu)
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return -ENODEV;
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context = device_to_context_entry(iommu, bus, devfn);
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if (!context)
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return -ENOMEM;
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@ -1466,7 +1473,7 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
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context_set_translation_type(context, CONTEXT_TT_MULTI_LEVEL);
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context_set_fault_enable(context);
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context_set_present(context);
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__iommu_flush_cache(iommu, context, sizeof(*context));
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domain_flush_cache(domain, context, sizeof(*context));
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/* it's a non-present to present mapping */
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if (iommu->flush.flush_context(iommu, domain->id,
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@ -1519,12 +1526,15 @@ domain_context_mapping(struct dmar_domain *domain, struct pci_dev *pdev)
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tmp->bus->number, tmp->devfn);
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}
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static int domain_context_mapped(struct dmar_domain *domain,
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struct pci_dev *pdev)
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static int domain_context_mapped(struct pci_dev *pdev)
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{
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int ret;
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struct pci_dev *tmp, *parent;
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struct intel_iommu *iommu = domain_get_iommu(domain);
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struct intel_iommu *iommu;
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iommu = device_to_iommu(pdev->bus->number, pdev->devfn);
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if (!iommu)
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return -ENODEV;
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ret = device_context_mapped(iommu,
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pdev->bus->number, pdev->devfn);
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@ -1559,7 +1569,6 @@ domain_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
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struct dma_pte *pte;
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int index;
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int addr_width = agaw_to_width(domain->agaw);
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struct intel_iommu *iommu = domain_get_iommu(domain);
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hpa &= (((u64)1) << addr_width) - 1;
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@ -1579,7 +1588,7 @@ domain_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
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BUG_ON(dma_pte_addr(pte));
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dma_set_pte_addr(pte, start_pfn << VTD_PAGE_SHIFT);
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dma_set_pte_prot(pte, prot);
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__iommu_flush_cache(iommu, pte, sizeof(*pte));
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domain_flush_cache(domain, pte, sizeof(*pte));
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start_pfn++;
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index++;
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}
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@ -2129,7 +2138,7 @@ get_valid_domain_for_dev(struct pci_dev *pdev)
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}
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/* make sure context mapping is ok */
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if (unlikely(!domain_context_mapped(domain, pdev))) {
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if (unlikely(!domain_context_mapped(pdev))) {
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ret = domain_context_mapping(domain, pdev);
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if (ret) {
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printk(KERN_ERR
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