ASoC: tegra: convert to standard DMA DT bindings
By passing no flags when calling snd_dmaengine_pcm_register() from tegra_pcm.c, we end up using dma_request_slave_channel() rather than dmaengine_pcm_compat_request_channel(), and hence rely on the standard DMA DT bindings and stashing the DMA slave ID away during channel allocation. This means there's no need to use a custom DT property to store the slave ID. So, remove all the code that parsed it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
parent
d59afb6a96
commit
5608bd3ed2
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@ -313,7 +313,6 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
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{
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{
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struct tegra20_ac97 *ac97;
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struct tegra20_ac97 *ac97;
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struct resource *mem;
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struct resource *mem;
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u32 of_dma[2];
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void __iomem *regs;
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void __iomem *regs;
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int ret = 0;
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int ret = 0;
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@ -348,14 +347,6 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
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goto err_clk_put;
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goto err_clk_put;
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}
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}
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if (of_property_read_u32_array(pdev->dev.of_node,
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"nvidia,dma-request-selector",
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of_dma, 2) < 0) {
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dev_err(&pdev->dev, "No DMA resource\n");
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ret = -ENODEV;
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goto err_clk_put;
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}
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ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node,
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ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node,
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"nvidia,codec-reset-gpio", 0);
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"nvidia,codec-reset-gpio", 0);
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if (gpio_is_valid(ac97->reset_gpio)) {
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if (gpio_is_valid(ac97->reset_gpio)) {
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@ -380,12 +371,10 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
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ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
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ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
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ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->capture_dma_data.maxburst = 4;
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ac97->capture_dma_data.maxburst = 4;
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ac97->capture_dma_data.slave_id = of_dma[1];
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ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
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ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
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ac97->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->playback_dma_data.maxburst = 4;
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ac97->playback_dma_data.maxburst = 4;
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ac97->playback_dma_data.slave_id = of_dma[1];
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ret = tegra_asoc_utils_init(&ac97->util_data, &pdev->dev);
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ret = tegra_asoc_utils_init(&ac97->util_data, &pdev->dev);
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if (ret)
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if (ret)
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@ -339,9 +339,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = {
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static int tegra20_i2s_platform_probe(struct platform_device *pdev)
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static int tegra20_i2s_platform_probe(struct platform_device *pdev)
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{
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{
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struct tegra20_i2s *i2s;
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struct tegra20_i2s *i2s;
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struct resource *mem, *memregion, *dmareq;
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struct resource *mem, *memregion;
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u32 of_dma[2];
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u32 dma_ch;
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void __iomem *regs;
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void __iomem *regs;
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int ret;
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int ret;
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@ -370,20 +368,6 @@ static int tegra20_i2s_platform_probe(struct platform_device *pdev)
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goto err_clk_put;
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goto err_clk_put;
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}
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}
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dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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if (!dmareq) {
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if (of_property_read_u32_array(pdev->dev.of_node,
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"nvidia,dma-request-selector",
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of_dma, 2) < 0) {
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dev_err(&pdev->dev, "No DMA resource\n");
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ret = -ENODEV;
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goto err_clk_put;
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}
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dma_ch = of_dma[1];
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} else {
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dma_ch = dmareq->start;
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}
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memregion = devm_request_mem_region(&pdev->dev, mem->start,
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memregion = devm_request_mem_region(&pdev->dev, mem->start,
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resource_size(mem), DRV_NAME);
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resource_size(mem), DRV_NAME);
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if (!memregion) {
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if (!memregion) {
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@ -410,12 +394,10 @@ static int tegra20_i2s_platform_probe(struct platform_device *pdev)
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i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
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i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.maxburst = 4;
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i2s->capture_dma_data.maxburst = 4;
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i2s->capture_dma_data.slave_id = dma_ch;
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i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
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i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.maxburst = 4;
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i2s->playback_dma_data.maxburst = 4;
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i2s->playback_dma_data.slave_id = dma_ch;
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pm_runtime_enable(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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if (!pm_runtime_enabled(&pdev->dev)) {
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@ -95,8 +95,8 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
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}
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}
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int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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dma_addr_t *fiforeg,
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char *dmachan, int dmachan_len,
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unsigned int *reqsel)
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dma_addr_t *fiforeg)
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{
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{
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int channel;
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int channel;
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u32 reg, val;
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u32 reg, val;
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@ -110,9 +110,9 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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__set_bit(channel, ahub->rx_usage);
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__set_bit(channel, ahub->rx_usage);
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*rxcif = TEGRA30_AHUB_RXCIF_APBIF_RX0 + channel;
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*rxcif = TEGRA30_AHUB_RXCIF_APBIF_RX0 + channel;
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snprintf(dmachan, dmachan_len, "rx%d", channel);
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*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_RXFIFO +
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*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_RXFIFO +
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(channel * TEGRA30_AHUB_CHANNEL_RXFIFO_STRIDE);
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(channel * TEGRA30_AHUB_CHANNEL_RXFIFO_STRIDE);
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*reqsel = ahub->dma_sel + channel;
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pm_runtime_get_sync(ahub->dev);
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pm_runtime_get_sync(ahub->dev);
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@ -197,8 +197,8 @@ int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif)
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EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
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EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
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int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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dma_addr_t *fiforeg,
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char *dmachan, int dmachan_len,
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unsigned int *reqsel)
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dma_addr_t *fiforeg)
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{
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{
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int channel;
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int channel;
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u32 reg, val;
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u32 reg, val;
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@ -212,9 +212,9 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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__set_bit(channel, ahub->tx_usage);
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__set_bit(channel, ahub->tx_usage);
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*txcif = TEGRA30_AHUB_TXCIF_APBIF_TX0 + channel;
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*txcif = TEGRA30_AHUB_TXCIF_APBIF_TX0 + channel;
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snprintf(dmachan, dmachan_len, "tx%d", channel);
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*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_TXFIFO +
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*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_TXFIFO +
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(channel * TEGRA30_AHUB_CHANNEL_TXFIFO_STRIDE);
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(channel * TEGRA30_AHUB_CHANNEL_TXFIFO_STRIDE);
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*reqsel = ahub->dma_sel + channel;
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pm_runtime_get_sync(ahub->dev);
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pm_runtime_get_sync(ahub->dev);
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@ -510,7 +510,6 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
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struct reset_control *rst;
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struct reset_control *rst;
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int i;
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int i;
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struct resource *res0, *res1, *region;
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struct resource *res0, *res1, *region;
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u32 of_dma[2];
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void __iomem *regs_apbif, *regs_ahub;
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void __iomem *regs_apbif, *regs_ahub;
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int ret = 0;
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int ret = 0;
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@ -573,16 +572,6 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
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goto err_clk_put_d_audio;
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goto err_clk_put_d_audio;
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}
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}
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if (of_property_read_u32_array(pdev->dev.of_node,
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"nvidia,dma-request-selector",
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of_dma, 2) < 0) {
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dev_err(&pdev->dev,
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"Missing property nvidia,dma-request-selector\n");
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ret = -ENODEV;
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goto err_clk_put_d_audio;
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}
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ahub->dma_sel = of_dma[1];
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res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res0) {
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if (!res0) {
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dev_err(&pdev->dev, "No apbif memory resource\n");
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dev_err(&pdev->dev, "No apbif memory resource\n");
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@ -465,15 +465,15 @@ enum tegra30_ahub_rxcif {
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};
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};
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extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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dma_addr_t *fiforeg,
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char *dmachan, int dmachan_len,
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unsigned int *reqsel);
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dma_addr_t *fiforeg);
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extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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dma_addr_t *fiforeg,
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char *dmachan, int dmachan_len,
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unsigned int *reqsel);
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dma_addr_t *fiforeg);
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extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
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@ -524,7 +524,6 @@ struct tegra30_ahub {
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struct device *dev;
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struct device *dev;
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struct clk *clk_d_audio;
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struct clk *clk_d_audio;
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struct clk *clk_apbif;
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struct clk *clk_apbif;
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int dma_sel;
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resource_size_t apbif_addr;
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resource_size_t apbif_addr;
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struct regmap *regmap_apbif;
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struct regmap *regmap_apbif;
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struct regmap *regmap_ahub;
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struct regmap *regmap_ahub;
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@ -459,8 +459,9 @@ static int tegra30_i2s_platform_probe(struct platform_device *pdev)
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.maxburst = 4;
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i2s->playback_dma_data.maxburst = 4;
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ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
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ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
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&i2s->playback_dma_data.addr,
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i2s->playback_dma_chan,
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&i2s->playback_dma_data.slave_id);
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sizeof(i2s->playback_dma_chan),
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&i2s->playback_dma_data.addr);
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if (ret) {
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if (ret) {
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dev_err(&pdev->dev, "Could not alloc TX FIFO: %d\n", ret);
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dev_err(&pdev->dev, "Could not alloc TX FIFO: %d\n", ret);
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goto err_suspend;
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goto err_suspend;
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@ -475,8 +476,9 @@ static int tegra30_i2s_platform_probe(struct platform_device *pdev)
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.maxburst = 4;
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i2s->capture_dma_data.maxburst = 4;
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ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
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ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
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&i2s->capture_dma_data.addr,
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i2s->capture_dma_chan,
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&i2s->capture_dma_data.slave_id);
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sizeof(i2s->capture_dma_chan),
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&i2s->capture_dma_data.addr);
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if (ret) {
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if (ret) {
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dev_err(&pdev->dev, "Could not alloc RX FIFO: %d\n", ret);
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dev_err(&pdev->dev, "Could not alloc RX FIFO: %d\n", ret);
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goto err_unroute_tx_fifo;
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goto err_unroute_tx_fifo;
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@ -496,7 +498,9 @@ static int tegra30_i2s_platform_probe(struct platform_device *pdev)
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goto err_unroute_rx_fifo;
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goto err_unroute_rx_fifo;
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}
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}
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ret = tegra_pcm_platform_register(&pdev->dev);
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ret = tegra_pcm_platform_register_with_chan_names(&pdev->dev,
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&i2s->dma_config, i2s->playback_dma_chan,
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i2s->capture_dma_chan);
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if (ret) {
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if (ret) {
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dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
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dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
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goto err_unregister_component;
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goto err_unregister_component;
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@ -238,11 +238,14 @@ struct tegra30_i2s {
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struct clk *clk_i2s;
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struct clk *clk_i2s;
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enum tegra30_ahub_txcif capture_i2s_cif;
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enum tegra30_ahub_txcif capture_i2s_cif;
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enum tegra30_ahub_rxcif capture_fifo_cif;
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enum tegra30_ahub_rxcif capture_fifo_cif;
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char capture_dma_chan[8];
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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enum tegra30_ahub_rxcif playback_i2s_cif;
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enum tegra30_ahub_rxcif playback_i2s_cif;
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enum tegra30_ahub_txcif playback_fifo_cif;
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enum tegra30_ahub_txcif playback_fifo_cif;
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char playback_dma_chan[8];
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct regmap *regmap;
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struct regmap *regmap;
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struct snd_dmaengine_pcm_config dma_config;
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};
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};
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#endif
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#endif
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@ -61,12 +61,23 @@ static const struct snd_dmaengine_pcm_config tegra_dmaengine_pcm_config = {
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int tegra_pcm_platform_register(struct device *dev)
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int tegra_pcm_platform_register(struct device *dev)
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{
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{
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return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config,
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return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
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SND_DMAENGINE_PCM_FLAG_NO_DT |
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SND_DMAENGINE_PCM_FLAG_COMPAT);
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}
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
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EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
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int tegra_pcm_platform_register_with_chan_names(struct device *dev,
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||||||
|
struct snd_dmaengine_pcm_config *config,
|
||||||
|
char *txdmachan, char *rxdmachan)
|
||||||
|
{
|
||||||
|
*config = tegra_dmaengine_pcm_config;
|
||||||
|
config->dma_dev = dev->parent;
|
||||||
|
config->chan_names[0] = txdmachan;
|
||||||
|
config->chan_names[1] = rxdmachan;
|
||||||
|
|
||||||
|
return snd_dmaengine_pcm_register(dev, config, 0);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL_GPL(tegra_pcm_platform_register_with_chan_names);
|
||||||
|
|
||||||
void tegra_pcm_platform_unregister(struct device *dev)
|
void tegra_pcm_platform_unregister(struct device *dev)
|
||||||
{
|
{
|
||||||
return snd_dmaengine_pcm_unregister(dev);
|
return snd_dmaengine_pcm_unregister(dev);
|
||||||
|
|
|
@ -31,7 +31,12 @@
|
||||||
#ifndef __TEGRA_PCM_H__
|
#ifndef __TEGRA_PCM_H__
|
||||||
#define __TEGRA_PCM_H__
|
#define __TEGRA_PCM_H__
|
||||||
|
|
||||||
|
struct snd_dmaengine_pcm_config;
|
||||||
|
|
||||||
int tegra_pcm_platform_register(struct device *dev);
|
int tegra_pcm_platform_register(struct device *dev);
|
||||||
|
int tegra_pcm_platform_register_with_chan_names(struct device *dev,
|
||||||
|
struct snd_dmaengine_pcm_config *config,
|
||||||
|
char *txdmachan, char *rxdmachan);
|
||||||
void tegra_pcm_platform_unregister(struct device *dev);
|
void tegra_pcm_platform_unregister(struct device *dev);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue