scsi: cxlflash: SISlite updates to support 4 ports
Update the SISlite header to support 4 ports as outlined in the SISlite specification. Address fallout from structure renames and refreshed organization throughout the driver. Determine the number of ports supported by a card from the global port selection mask register reset value. Signed-off-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com> Signed-off-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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0aa14887c6
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5651807232
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@ -26,8 +26,11 @@
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extern const struct file_operations cxlflash_cxl_fops;
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#define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
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#define NUM_FC_PORTS CXLFLASH_NUM_FC_PORTS /* ports per AFU */
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#define MAX_FC_PORTS CXLFLASH_MAX_FC_PORTS /* ports per AFU */
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#define MAX_FC_PORTS CXLFLASH_MAX_FC_PORTS /* max ports per AFU */
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#define LEGACY_FC_PORTS 2 /* legacy ports per AFU */
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#define CHAN2PORTBANK(_x) ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK))
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#define CHAN2BANKPORT(_x) ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1))
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#define CHAN2PORTMASK(_x) (1 << (_x)) /* channel to port mask */
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#define PORTMASK2CHAN(_x) (ilog2((_x))) /* port mask to channel */
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@ -67,7 +70,7 @@ extern const struct file_operations cxlflash_cxl_fops;
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static inline void check_sizes(void)
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{
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BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
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BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK);
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}
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/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
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@ -240,18 +243,26 @@ static inline u64 lun_to_lunid(u64 lun)
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return be64_to_cpu(lun_id);
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}
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static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i)
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static inline struct fc_port_bank __iomem *get_fc_port_bank(
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struct cxlflash_cfg *cfg, int i)
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{
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struct afu *afu = cfg->afu;
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return &afu->afu_map->global.fc_regs[i][0];
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return &afu->afu_map->global.bank[CHAN2PORTBANK(i)];
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}
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static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i)
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{
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struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
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return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0];
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}
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static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i)
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{
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struct afu *afu = cfg->afu;
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struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
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return &afu->afu_map->global.fc_port[i][0];
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return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0];
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}
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int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
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@ -1028,25 +1028,29 @@ static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
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/*
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* Asynchronous interrupt information table
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*
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* NOTE: The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro
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* as complex and complains because it is not wrapped with parentheses/braces.
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*/
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#define ASTATUS_FC(_a, _b, _c, _d) \
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{ SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) }
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#define BUILD_SISL_ASTATUS_FC_PORT(_a) \
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ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET), \
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ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \
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ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \
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ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \
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ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \
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ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \
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ASTATUS_FC(_a, LINK_DN, "link down", 0), \
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ASTATUS_FC(_a, LINK_UP, "link up", 0)
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static const struct asyc_intr_info ainfo[] = {
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{SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
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{SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
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{SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
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{SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET},
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{SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
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{SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST},
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{SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
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{SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
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{SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
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{SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
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{SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
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{SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET},
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{SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
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{SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST},
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{SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
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{SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
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{0x0, "", 0, 0} /* terminator */
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BUILD_SISL_ASTATUS_FC_PORT(2),
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BUILD_SISL_ASTATUS_FC_PORT(3),
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BUILD_SISL_ASTATUS_FC_PORT(0),
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BUILD_SISL_ASTATUS_FC_PORT(1),
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{ 0x0, "", 0, 0 }
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};
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/**
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@ -1059,6 +1063,8 @@ static const struct asyc_intr_info *find_ainfo(u64 status)
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{
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const struct asyc_intr_info *info;
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BUILD_BUG_ON(ainfo[ARRAY_SIZE(ainfo) - 1].status != 0);
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for (info = &ainfo[0]; info->status; info++)
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if (info->status == status)
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return info;
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@ -1746,6 +1752,39 @@ out:
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goto ret;
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}
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/**
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* get_num_afu_ports() - determines and configures the number of AFU ports
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* @cfg: Internal structure associated with the host.
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*
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* This routine determines the number of AFU ports by converting the global
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* port selection mask. The converted value is only valid following an AFU
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* reset (explicit or power-on). This routine must be invoked shortly after
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* mapping as other routines are dependent on the number of ports during the
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* initialization sequence.
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*
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* To support legacy AFUs that might not have reflected an initial global
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* port mask (value read is 0), default to the number of ports originally
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* supported by the cxlflash driver (2) before hardware with other port
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* offerings was introduced.
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*/
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static void get_num_afu_ports(struct cxlflash_cfg *cfg)
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{
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struct afu *afu = cfg->afu;
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struct device *dev = &cfg->dev->dev;
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u64 port_mask;
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int num_fc_ports = LEGACY_FC_PORTS;
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port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel);
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if (port_mask != 0ULL)
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num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS);
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dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n",
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__func__, port_mask, num_fc_ports);
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cfg->num_fc_ports = num_fc_ports;
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cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports);
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}
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/**
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* init_afu() - setup as master context and start AFU
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* @cfg: Internal structure associated with the host.
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@ -1803,6 +1842,8 @@ static int init_afu(struct cxlflash_cfg *cfg)
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dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
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afu->version, afu->interface_version);
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get_num_afu_ports(cfg);
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rc = start_afu(cfg);
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if (rc) {
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dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
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@ -2534,7 +2575,6 @@ static int cxlflash_probe(struct pci_dev *pdev,
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host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
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host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
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host->max_channel = PORTNUM2CHAN(NUM_FC_PORTS);
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host->unique_id = host->host_no;
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host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
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cfg->init_state = INIT_STATE_NONE;
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cfg->dev = pdev;
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cfg->num_fc_ports = NUM_FC_PORTS;
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cfg->cxl_fops = cxlflash_cxl_fops;
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/*
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@ -292,28 +292,54 @@ struct sisl_ctrl_map {
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/* single copy global regs */
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struct sisl_global_regs {
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__be64 aintr_status;
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/* In cxlflash, each FC port/link gets a byte of status */
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#define SISL_ASTATUS_FC0_OTHER 0x8000ULL /* b48, other err,
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FC_ERRCAP[31:20] */
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#define SISL_ASTATUS_FC0_LOGO 0x4000ULL /* b49, target sent FLOGI/PLOGI/LOGO
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while logged in */
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#define SISL_ASTATUS_FC0_CRC_T 0x2000ULL /* b50, CRC threshold exceeded */
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#define SISL_ASTATUS_FC0_LOGI_R 0x1000ULL /* b51, login state machine timed out
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and retrying */
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#define SISL_ASTATUS_FC0_LOGI_F 0x0800ULL /* b52, login failed,
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FC_ERROR[19:0] */
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#define SISL_ASTATUS_FC0_LOGI_S 0x0400ULL /* b53, login succeeded */
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#define SISL_ASTATUS_FC0_LINK_DN 0x0200ULL /* b54, link online to offline */
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#define SISL_ASTATUS_FC0_LINK_UP 0x0100ULL /* b55, link offline to online */
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/*
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* In cxlflash, FC port/link are arranged in port pairs, each
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* gets a byte of status:
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*
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* *_OTHER: other err, FC_ERRCAP[31:20]
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* *_LOGO: target sent FLOGI/PLOGI/LOGO while logged in
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* *_CRC_T: CRC threshold exceeded
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* *_LOGI_R: login state machine timed out and retrying
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* *_LOGI_F: login failed, FC_ERROR[19:0]
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* *_LOGI_S: login succeeded
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* *_LINK_DN: link online to offline
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* *_LINK_UP: link offline to online
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*/
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#define SISL_ASTATUS_FC2_OTHER 0x80000000ULL /* b32 */
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#define SISL_ASTATUS_FC2_LOGO 0x40000000ULL /* b33 */
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#define SISL_ASTATUS_FC2_CRC_T 0x20000000ULL /* b34 */
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#define SISL_ASTATUS_FC2_LOGI_R 0x10000000ULL /* b35 */
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#define SISL_ASTATUS_FC2_LOGI_F 0x08000000ULL /* b36 */
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#define SISL_ASTATUS_FC2_LOGI_S 0x04000000ULL /* b37 */
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#define SISL_ASTATUS_FC2_LINK_DN 0x02000000ULL /* b38 */
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#define SISL_ASTATUS_FC2_LINK_UP 0x01000000ULL /* b39 */
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#define SISL_ASTATUS_FC1_OTHER 0x0080ULL /* b56 */
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#define SISL_ASTATUS_FC1_LOGO 0x0040ULL /* b57 */
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#define SISL_ASTATUS_FC1_CRC_T 0x0020ULL /* b58 */
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#define SISL_ASTATUS_FC1_LOGI_R 0x0010ULL /* b59 */
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#define SISL_ASTATUS_FC1_LOGI_F 0x0008ULL /* b60 */
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#define SISL_ASTATUS_FC1_LOGI_S 0x0004ULL /* b61 */
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#define SISL_ASTATUS_FC1_LINK_DN 0x0002ULL /* b62 */
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#define SISL_ASTATUS_FC1_LINK_UP 0x0001ULL /* b63 */
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#define SISL_ASTATUS_FC3_OTHER 0x00800000ULL /* b40 */
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#define SISL_ASTATUS_FC3_LOGO 0x00400000ULL /* b41 */
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#define SISL_ASTATUS_FC3_CRC_T 0x00200000ULL /* b42 */
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#define SISL_ASTATUS_FC3_LOGI_R 0x00100000ULL /* b43 */
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#define SISL_ASTATUS_FC3_LOGI_F 0x00080000ULL /* b44 */
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#define SISL_ASTATUS_FC3_LOGI_S 0x00040000ULL /* b45 */
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#define SISL_ASTATUS_FC3_LINK_DN 0x00020000ULL /* b46 */
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#define SISL_ASTATUS_FC3_LINK_UP 0x00010000ULL /* b47 */
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#define SISL_ASTATUS_FC0_OTHER 0x00008000ULL /* b48 */
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#define SISL_ASTATUS_FC0_LOGO 0x00004000ULL /* b49 */
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#define SISL_ASTATUS_FC0_CRC_T 0x00002000ULL /* b50 */
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#define SISL_ASTATUS_FC0_LOGI_R 0x00001000ULL /* b51 */
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#define SISL_ASTATUS_FC0_LOGI_F 0x00000800ULL /* b52 */
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#define SISL_ASTATUS_FC0_LOGI_S 0x00000400ULL /* b53 */
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#define SISL_ASTATUS_FC0_LINK_DN 0x00000200ULL /* b54 */
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#define SISL_ASTATUS_FC0_LINK_UP 0x00000100ULL /* b55 */
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#define SISL_ASTATUS_FC1_OTHER 0x00000080ULL /* b56 */
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#define SISL_ASTATUS_FC1_LOGO 0x00000040ULL /* b57 */
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#define SISL_ASTATUS_FC1_CRC_T 0x00000020ULL /* b58 */
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#define SISL_ASTATUS_FC1_LOGI_R 0x00000010ULL /* b59 */
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#define SISL_ASTATUS_FC1_LOGI_F 0x00000008ULL /* b60 */
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#define SISL_ASTATUS_FC1_LOGI_S 0x00000004ULL /* b61 */
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#define SISL_ASTATUS_FC1_LINK_DN 0x00000002ULL /* b62 */
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#define SISL_ASTATUS_FC1_LINK_UP 0x00000001ULL /* b63 */
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#define SISL_FC_INTERNAL_UNMASK 0x0000000300000000ULL /* 1 means unmasked */
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#define SISL_FC_INTERNAL_MASK ~(SISL_FC_INTERNAL_UNMASK)
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#define SISL_STATUS_SHUTDOWN_ACTIVE 0x0000000000000010ULL
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#define SISL_STATUS_SHUTDOWN_COMPLETE 0x0000000000000020ULL
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#define SISL_ASTATUS_UNMASK 0xFFFFULL /* 1 means unmasked */
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#define SISL_ASTATUS_UNMASK 0xFFFFFFFFULL /* 1 means unmasked */
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#define SISL_ASTATUS_MASK ~(SISL_ASTATUS_UNMASK) /* 1 means masked */
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__be64 aintr_clear;
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#define SISL_INTVER_CAP_RESERVED_CMD_MODE_B 0x100000000000ULL
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};
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#define CXLFLASH_MAX_FC_PORTS 2
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#define CXLFLASH_NUM_FC_PORTS 2
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#define CXLFLASH_MAX_CONTEXT 512 /* how many contexts per afu */
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#define CXLFLASH_NUM_VLUNS 512
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#define CXLFLASH_NUM_FC_PORTS_PER_BANK 2 /* fixed # of ports per bank */
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#define CXLFLASH_MAX_FC_BANKS 1 /* max # of banks supported */
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#define CXLFLASH_MAX_FC_PORTS (CXLFLASH_NUM_FC_PORTS_PER_BANK * \
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CXLFLASH_MAX_FC_BANKS)
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#define CXLFLASH_MAX_CONTEXT 512 /* number of contexts per AFU */
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#define CXLFLASH_NUM_VLUNS 512 /* number of vluns per AFU/port */
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#define CXLFLASH_NUM_REGS 512 /* number of registers per port */
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struct fc_port_bank {
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__be64 fc_port_regs[CXLFLASH_NUM_FC_PORTS_PER_BANK][CXLFLASH_NUM_REGS];
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__be64 fc_port_luns[CXLFLASH_NUM_FC_PORTS_PER_BANK][CXLFLASH_NUM_VLUNS];
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};
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struct sisl_global_map {
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union {
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char page1[SIZE_4K]; /* page 1 */
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/* pages 2 & 3 */
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__be64 fc_regs[CXLFLASH_NUM_FC_PORTS][CXLFLASH_NUM_VLUNS];
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struct fc_port_bank bank[CXLFLASH_MAX_FC_BANKS]; /* pages 2 - 5 */
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/* pages 4 & 5 (lun tbl) */
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__be64 fc_port[CXLFLASH_NUM_FC_PORTS][CXLFLASH_NUM_VLUNS];
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/* pages 6 - 15 are reserved */
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};
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#define PORT0 0x01U
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#define PORT1 0x02U
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#define PORT2 0x04U
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#define PORT3 0x08U
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#define PORT_MASK(_n) ((1 << (_n)) - 1)
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/* AFU Sync Mode byte */
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