Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux into drm-fixes
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux: drm/i915: support 32 bit BGR formats in sprite planes drm/i915: fix color order for BGR formats on SNB drm/gma500: Fix Cedarview boot failures in 3.3-rc
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commit
57387177a3
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@ -2689,7 +2689,7 @@
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#define DVS_FORMAT_RGBX888 (2<<25)
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#define DVS_FORMAT_RGBX161616 (3<<25)
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#define DVS_SOURCE_KEY (1<<22)
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#define DVS_RGB_ORDER_RGBX (1<<20)
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#define DVS_RGB_ORDER_XBGR (1<<20)
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#define DVS_YUV_BYTE_ORDER_MASK (3<<16)
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#define DVS_YUV_ORDER_YUYV (0<<16)
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#define DVS_YUV_ORDER_UYVY (1<<16)
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@ -7828,6 +7828,7 @@ int intel_framebuffer_init(struct drm_device *dev,
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case DRM_FORMAT_RGB332:
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case DRM_FORMAT_RGB565:
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_XBGR8888:
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case DRM_FORMAT_ARGB8888:
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case DRM_FORMAT_XRGB2101010:
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case DRM_FORMAT_ARGB2101010:
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@ -225,16 +225,16 @@ snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
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/* Mask out pixel format bits in case we change it */
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dvscntr &= ~DVS_PIXFORMAT_MASK;
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dvscntr &= ~DVS_RGB_ORDER_RGBX;
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dvscntr &= ~DVS_RGB_ORDER_XBGR;
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dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK;
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switch (fb->pixel_format) {
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case DRM_FORMAT_XBGR8888:
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dvscntr |= DVS_FORMAT_RGBX888;
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dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
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pixel_size = 4;
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break;
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case DRM_FORMAT_XRGB8888:
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dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_RGBX;
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dvscntr |= DVS_FORMAT_RGBX888;
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pixel_size = 4;
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break;
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case DRM_FORMAT_YUYV:
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