spi: a3700: Clear DATA_OUT when performing a read
[ Upstream commit 44a5f423e7
]
When performing a read using FIFO mode, the spi controller shifts out
the last 2 bytes that were written in a previous transfer on MOSI.
This undocumented behaviour can cause devices to misinterpret the
transfer, so we explicitly clear the WFIFO before each read.
This behaviour was noticed on EspressoBin.
Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
pull/10/head
parent
5bb5b9c681
commit
58bc0fd843
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@ -624,6 +624,11 @@ static int a3700_spi_transfer_one(struct spi_master *master,
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a3700_spi_header_set(a3700_spi);
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if (xfer->rx_buf) {
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/* Clear WFIFO, since it's last 2 bytes are shifted out during
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* a read operation
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*/
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spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG, 0);
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/* Set read data length */
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spireg_write(a3700_spi, A3700_SPI_IF_DIN_CNT_REG,
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a3700_spi->buf_len);
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