intel-iommu: Make dma_pte_clear_range() take pfns as argument
Noting that this is now an _inclusive_ range. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -56,6 +56,7 @@
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#define MAX_AGAW_WIDTH 64
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#define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1)
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#define DOMAIN_MAX_PFN(gaw) ((((u64)1) << (gaw-VTD_PAGE_SHIFT)) - 1)
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#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)
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#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32))
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@ -777,17 +778,17 @@ static void dma_pte_clear_one(struct dmar_domain *domain, unsigned long pfn)
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}
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/* clear last level pte, a tlb flush should be followed */
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static void dma_pte_clear_range(struct dmar_domain *domain, u64 start, u64 end)
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static void dma_pte_clear_range(struct dmar_domain *domain,
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unsigned long start_pfn,
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unsigned long last_pfn)
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{
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unsigned long start_pfn = IOVA_PFN(start);
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unsigned long end_pfn = IOVA_PFN(end-1);
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int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
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BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
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BUG_ON(addr_width < BITS_PER_LONG && end_pfn >> addr_width);
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BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
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/* we don't need lock here; nobody else touches the iova range */
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while (start_pfn <= end_pfn) {
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while (start_pfn <= last_pfn) {
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dma_pte_clear_one(domain, start_pfn);
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start_pfn++;
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}
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@ -1424,7 +1425,7 @@ static void domain_exit(struct dmar_domain *domain)
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end = end & (~PAGE_MASK);
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/* clear ptes */
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dma_pte_clear_range(domain, 0, end);
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dma_pte_clear_range(domain, 0, DOMAIN_MAX_PFN(domain->gaw));
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/* free page tables */
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dma_pte_free_pagetable(domain, 0, end);
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@ -1890,7 +1891,8 @@ static int iommu_domain_identity_map(struct dmar_domain *domain,
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* RMRR range might have overlap with physical memory range,
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* clear it first
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*/
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dma_pte_clear_range(domain, base, base + size);
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dma_pte_clear_range(domain, base >> VTD_PAGE_SHIFT,
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(base + size - 1) >> VTD_PAGE_SHIFT);
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return domain_page_mapping(domain, base, base, size,
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DMA_PTE_READ|DMA_PTE_WRITE);
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@ -2618,7 +2620,8 @@ static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr,
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pci_name(pdev), size, (unsigned long long)start_addr);
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/* clear the whole page */
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dma_pte_clear_range(domain, start_addr, start_addr + size);
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dma_pte_clear_range(domain, start_addr >> VTD_PAGE_SHIFT,
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(start_addr + size - 1) >> VTD_PAGE_SHIFT);
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/* free page tables */
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dma_pte_free_pagetable(domain, start_addr, start_addr + size);
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if (intel_iommu_strict) {
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@ -2710,7 +2713,8 @@ static void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist,
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start_addr = iova->pfn_lo << PAGE_SHIFT;
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/* clear the whole page */
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dma_pte_clear_range(domain, start_addr, start_addr + size);
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dma_pte_clear_range(domain, start_addr >> VTD_PAGE_SHIFT,
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(start_addr + size - 1) >> VTD_PAGE_SHIFT);
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/* free page tables */
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dma_pte_free_pagetable(domain, start_addr, start_addr + size);
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@ -2792,8 +2796,9 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne
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size, prot);
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if (ret) {
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/* clear the page */
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dma_pte_clear_range(domain, start_addr,
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start_addr + offset);
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dma_pte_clear_range(domain,
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start_addr >> VTD_PAGE_SHIFT,
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(start_addr + offset - 1) >> VTD_PAGE_SHIFT);
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/* free page tables */
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dma_pte_free_pagetable(domain, start_addr,
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start_addr + offset);
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@ -3382,7 +3387,7 @@ static void vm_domain_exit(struct dmar_domain *domain)
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end = end & (~VTD_PAGE_MASK);
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/* clear ptes */
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dma_pte_clear_range(domain, 0, end);
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dma_pte_clear_range(domain, 0, DOMAIN_MAX_PFN(domain->gaw));
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/* free page tables */
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dma_pte_free_pagetable(domain, 0, end);
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@ -3526,7 +3531,8 @@ static void intel_iommu_unmap_range(struct iommu_domain *domain,
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/* The address might not be aligned */
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base = iova & VTD_PAGE_MASK;
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size = VTD_PAGE_ALIGN(size);
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dma_pte_clear_range(dmar_domain, base, base + size);
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dma_pte_clear_range(dmar_domain, base >> VTD_PAGE_SHIFT,
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(base + size - 1) >> VTD_PAGE_SHIFT);
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if (dmar_domain->max_addr == base + size)
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dmar_domain->max_addr = base;
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