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staging: rtl8723au: No need for CHKBIT since 16 + 12 is still < 32 

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
wifi-calibration
Jes Sorensen 2014-05-09 15:04:15 +02:00 committed by Greg Kroah-Hartman
parent 072fc84dce
commit 5a44389331
1 changed files with 3 additions and 3 deletions
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6
drivers/staging/rtl8723au/core/rtw_ap.c
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@ -380,9 +380,9 @@ void add_RATid23a(struct rtw_adapter *padapter, struct sta_info *psta, u8 rssi_l
else
limit = 8;/* 1R */
for (i = 0; i<limit; i++) {
if (psta_ht->ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
tx_ra_bitmap |= CHKBIT(i+12);
for (i = 0; i < limit; i++) {
if (psta_ht->ht_cap.mcs.rx_mask[i / 8] & BIT(i % 8))
tx_ra_bitmap |= BIT(i + 12);
}
/* max short GI rate */