clk: tegra: Fix periph_clk_to_bit macro
The parameter name should be "gate", not "periph". This worked, however, because it happens that everywhere periph_clk_to_bit is called, "gate" was in the local scope. Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(periph_ref_lock);
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#define write_rst_clr(val, gate) \
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writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
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#define periph_clk_to_bit(periph) (1 << (gate->clk_num % 32))
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#define periph_clk_to_bit(gate) (1 << (gate->clk_num % 32))
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/* Peripheral gate clock ops */
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static int clk_periph_is_enabled(struct clk_hw *hw)
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