clockevents/drivers/cadence_ttc: Migrate to new 'set-state' interface
Migrate cadence_ttc driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
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@ -191,40 +191,42 @@ static int ttc_set_next_event(unsigned long cycles,
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}
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/**
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* ttc_set_mode - Sets the mode of timer
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* ttc_set_{shutdown|oneshot|periodic} - Sets the state of timer
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*
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* @mode: Mode to be set
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* @evt: Address of clock event instance
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**/
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static void ttc_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int ttc_shutdown(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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u32 ctrl_reg;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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ttc_set_interval(timer, DIV_ROUND_CLOSEST(ttce->ttc.freq,
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PRESCALE * HZ));
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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ctrl_reg = readl_relaxed(timer->base_addr +
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TTC_CNT_CNTRL_OFFSET);
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ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg,
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timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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break;
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case CLOCK_EVT_MODE_RESUME:
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ctrl_reg = readl_relaxed(timer->base_addr +
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TTC_CNT_CNTRL_OFFSET);
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ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg,
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timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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break;
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}
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ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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return 0;
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}
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static int ttc_set_periodic(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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ttc_set_interval(timer,
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DIV_ROUND_CLOSEST(ttce->ttc.freq, PRESCALE * HZ));
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return 0;
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}
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static int ttc_resume(struct clock_event_device *evt)
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{
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struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt);
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struct ttc_timer *timer = &ttce->ttc;
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u32 ctrl_reg;
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ctrl_reg = readl_relaxed(timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK;
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writel_relaxed(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET);
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return 0;
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}
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static int ttc_rate_change_clocksource_cb(struct notifier_block *nb,
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@ -430,7 +432,10 @@ static void __init ttc_setup_clockevent(struct clk *clk,
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ttcce->ce.name = "ttc_clockevent";
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ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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ttcce->ce.set_next_event = ttc_set_next_event;
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ttcce->ce.set_mode = ttc_set_mode;
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ttcce->ce.set_state_shutdown = ttc_shutdown;
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ttcce->ce.set_state_periodic = ttc_set_periodic;
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ttcce->ce.set_state_oneshot = ttc_shutdown;
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ttcce->ce.tick_resume = ttc_resume;
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ttcce->ce.rating = 200;
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ttcce->ce.irq = irq;
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ttcce->ce.cpumask = cpu_possible_mask;
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