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ARM: dts: zero-sugar: add back 200mhz pinctrl state for SDIO 

Probably because of some issue we see on early version hardware, 200mhz
pinctrl state for SDIO was disabled.  Although the following access
failure is seen with DDR50 mode, both SDR50 and SDR104 mode works pretty
good on recent rM2 device.

 [  122.957669] brcmfmac: brcmf_sdiod_regrw_helper: failed to read data F1@0x08000, err: -84
 [  122.965816] brcmfmac: brcmf_chip_recognition: chip backplane type 15 is not supported
 [  122.973674] brcmfmac: brcmf_sdio_probe_attach: brcmf_chip_attach failed!
 [  122.980381] brcmfmac: brcmf_sdio_probe: brcmf_sdio_probe_attach failed
 [  122.987089] brcmfmac: brcmf_ops_sdio_probe: F2 error, probe failed -19...

Add back 200mhz pinctrl state, so that AP5256 can work at SDR104 mode
and provide a much better WIFI throughput.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
zero-sugar
Shawn Guo 2021-04-09 15:44:09 +08:00
parent c622f398c0
commit 5d996d429f
1 changed files with 3 additions and 2 deletions
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5
arch/arm/boot/dts/zero-sugar.dts
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@ -643,10 +643,11 @@
&usdhc2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default", "state_100mhz", "sleep";
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
pinctrl-3 = <&pinctrl_usdhc2>;
mmc-pwrseq = <&wifi_pwrseq>;
vmmc-supply = <&reg_brcm>;
bus-width = <4>;