tpm: Enable CLKRUN protocol for Braswell systems
To overcome a hardware limitation on Intel Braswell systems, disable CLKRUN protocol during TPM transactions and re-enable once the transaction is completed. Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: James Morris <james.l.morris@oracle.com>
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@ -36,6 +36,10 @@
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#include <linux/highmem.h>
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#include <crypto/hash_info.h>
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#ifdef CONFIG_X86
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#include <asm/intel-family.h>
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#endif
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enum tpm_const {
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TPM_MINOR = 224, /* officially assigned */
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TPM_BUFSIZE = 4096,
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@ -132,13 +132,93 @@ static int check_acpi_tpm2(struct device *dev)
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}
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#endif
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#ifdef CONFIG_X86
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#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
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#define ILB_REMAP_SIZE 0x100
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#define LPC_CNTRL_REG_OFFSET 0x84
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#define LPC_CLKRUN_EN (1 << 2)
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void __iomem *ilb_base_addr;
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static inline bool is_bsw(void)
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{
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return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
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}
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/**
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* tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
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*/
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static void tpm_platform_begin_xfer(void)
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{
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u32 clkrun_val;
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if (!is_bsw())
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return;
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clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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/* Disable LPC CLKRUN# */
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clkrun_val &= ~LPC_CLKRUN_EN;
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iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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/*
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* Write any random value on port 0x80 which is on LPC, to make
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* sure LPC clock is running before sending any TPM command.
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*/
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outb(0xCC, 0x80);
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}
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/**
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* tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
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*/
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static void tpm_platform_end_xfer(void)
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{
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u32 clkrun_val;
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if (!is_bsw())
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return;
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clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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/* Enable LPC CLKRUN# */
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clkrun_val |= LPC_CLKRUN_EN;
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iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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/*
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* Write any random value on port 0x80 which is on LPC, to make
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* sure LPC clock is running before sending any TPM command.
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*/
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outb(0xCC, 0x80);
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}
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#else
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static inline bool is_bsw(void)
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{
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return false;
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}
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static void tpm_platform_begin_xfer(void)
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{
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}
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static void tpm_platform_end_xfer(void)
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{
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}
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#endif
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static int tpm_tcg_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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u8 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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while (len--)
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*result++ = ioread8(phy->iobase + addr);
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tpm_platform_end_xfer();
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return 0;
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}
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@ -147,8 +227,13 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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while (len--)
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iowrite8(*value++, phy->iobase + addr);
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tpm_platform_end_xfer();
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return 0;
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}
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@ -156,7 +241,12 @@ static int tpm_tcg_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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*result = ioread16(phy->iobase + addr);
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tpm_platform_end_xfer();
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return 0;
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}
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@ -164,7 +254,12 @@ static int tpm_tcg_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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*result = ioread32(phy->iobase + addr);
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tpm_platform_end_xfer();
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return 0;
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}
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@ -172,7 +267,12 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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iowrite32(value, phy->iobase + addr);
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tpm_platform_end_xfer();
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return 0;
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}
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@ -360,6 +460,11 @@ static int __init init_tis(void)
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if (rc)
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goto err_force;
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#ifdef CONFIG_X86
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if (is_bsw())
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ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
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ILB_REMAP_SIZE);
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#endif
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rc = platform_driver_register(&tis_drv);
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if (rc)
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goto err_platform;
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@ -378,6 +483,10 @@ err_pnp:
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err_platform:
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if (force_pdev)
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platform_device_unregister(force_pdev);
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#ifdef CONFIG_X86
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if (is_bsw())
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iounmap(ilb_base_addr);
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#endif
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err_force:
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return rc;
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}
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@ -387,6 +496,10 @@ static void __exit cleanup_tis(void)
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pnp_unregister_driver(&tis_pnp_driver);
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platform_driver_unregister(&tis_drv);
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#ifdef CONFIG_X86
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if (is_bsw())
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iounmap(ilb_base_addr);
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#endif
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if (force_pdev)
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platform_device_unregister(force_pdev);
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}
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