IB/core: Add support for masked atomic operations
- Add new IB_WR_MASKED_ATOMIC_CMP_AND_SWP and IB_WR_MASKED_ATOMIC_FETCH_AND_ADD send opcodes that can be used to post "masked atomic compare and swap" and "masked atomic fetch and add" work request respectively. - Add masked_atomic_cap capability. - Add mask fields to atomic struct of ib_send_wr - Add new opcodes to ib_wc_opcode The new operations are described more precisely below: * Masked Compare and Swap (MskCmpSwap) The MskCmpSwap atomic operation is an extension to the CmpSwap operation defined in the IB spec. MskCmpSwap allows the user to select a portion of the 64 bit target data for the “compare” check as well as to restrict the swap to a (possibly different) portion. The pseudo code below describes the operation: | atomic_response = *va | if (!((compare_add ^ *va) & compare_add_mask)) then | *va = (*va & ~(swap_mask)) | (swap & swap_mask) | | return atomic_response The additional operands are carried in the Extended Transport Header. Atomic response generation and packet format for MskCmpSwap is as for standard IB Atomic operations. * Masked Fetch and Add (MFetchAdd) The MFetchAdd Atomic operation extends the functionality of the standard IB FetchAdd by allowing the user to split the target into multiple fields of selectable length. The atomic add is done independently on each one of this fields. A bit set in the field_boundary parameter specifies the field boundaries. The pseudo code below describes the operation: | bit_adder(ci, b1, b2, *co) | { | value = ci + b1 + b2 | *co = !!(value & 2) | | return value & 1 | } | | #define MASK_IS_SET(mask, attr) (!!((mask)&(attr))) | bit_position = 1 | carry = 0 | atomic_response = 0 | | for i = 0 to 63 | { | if ( i != 0 ) | bit_position = bit_position << 1 | | bit_add_res = bit_adder(carry, MASK_IS_SET(*va, bit_position), | MASK_IS_SET(compare_add, bit_position), &new_carry) | if (bit_add_res) | atomic_response |= bit_position | | carry = ((new_carry) && (!MASK_IS_SET(compare_add_mask, bit_position))) | } | | return atomic_response Signed-off-by: Vladimir Sokolovsky <vlad@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -136,6 +136,7 @@ struct ib_device_attr {
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int max_qp_init_rd_atom;
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int max_ee_init_rd_atom;
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enum ib_atomic_cap atomic_cap;
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enum ib_atomic_cap masked_atomic_cap;
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int max_ee;
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int max_rdd;
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int max_mw;
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@ -467,6 +468,8 @@ enum ib_wc_opcode {
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IB_WC_LSO,
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IB_WC_LOCAL_INV,
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IB_WC_FAST_REG_MR,
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IB_WC_MASKED_COMP_SWAP,
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IB_WC_MASKED_FETCH_ADD,
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/*
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* Set value of IB_WC_RECV so consumers can test if a completion is a
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* receive by testing (opcode & IB_WC_RECV).
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@ -689,6 +692,8 @@ enum ib_wr_opcode {
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IB_WR_RDMA_READ_WITH_INV,
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IB_WR_LOCAL_INV,
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IB_WR_FAST_REG_MR,
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IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
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IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
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};
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enum ib_send_flags {
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@ -731,6 +736,8 @@ struct ib_send_wr {
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u64 remote_addr;
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u64 compare_add;
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u64 swap;
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u64 compare_add_mask;
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u64 swap_mask;
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u32 rkey;
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} atomic;
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struct {
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