Samsung DeviceTree update for v4.11, third round:
1. Add descriptive user-friendly label names for power domains. This makes debugging easier. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYk3VZAAoJEME3ZuaGi4PXqSoP/jW2BUA0EmHRbOYaaJAgdnEJ ZhkCmguJepJlqPK1vrPNgCSFDqHdfaTZl5q4lSHf0WCTjL68YCwqnQuzjppL9Qvq nlvtvkfbXXIBBZurb7W1J7CriKM456NckbNgQGK6bSL6z4unOpoAmyzbBP7+8xJM O4OM3XvIRUUslQsV5oJv+HlBMNZaZ7bqZ7tg9XEHgldSRhDHpPurmxTwOIssIJ5H OPbH9hmhubkW64CRALN/jXwYG+s3537ZK/SDy5OPeRw0/Fkscxu3b7pqa3JC/Kar ViiFS1FT22hsxRVwjNB+67W4rsCNjTlJNmcSKg9KPubsANFrMoOQ3ZzV2zbB8oml l227IAdwv7+VLYkjreqdirf2UjfYhRBRd5HTQiV1bIJ2XHe7Ar56M2DN9CbXSXK0 HnsYPVCpgSUE2lCNTYf9BXKri9SYYRRaTsfvgpeRk/IzF61fr2LkAMtcoAPsJJob oWSBjTz/7/zPdZ68ESaJbe2A9i3Ywi0QzGT9emt8xT7N0shS3uwkMB51kQ4/Zqnf zP31Nf/o5bx1I6Y5aem0mgInpc6cFYkFItRVfSZ3sZbznBjFqIteeffamkF5JBFv PQYPh14HkT79ktYEmXS1kKHOgJl3QKN1L07tCI190GoLYBHI1w7NeUj9hf/TunwI SVx2B3hKV1PUkOpzIPp2 =SE3a -----END PGP SIGNATURE----- Merge tag 'samsung-dt-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt Pull "Samsung DeviceTree update for v4.11, third round" from Krzysztof Kozlowski 1. Add descriptive user-friendly label names for power domains. This makes debugging easier. * tag 'samsung-dt-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Add labels to all existing power domains
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commit
5f2f35a1ff
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@ -102,18 +102,21 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C40 0x20>;
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#power-domain-cells = <0>;
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label = "MFC";
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};
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pd_g3d: g3d-power-domain@10023C60 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C60 0x20>;
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#power-domain-cells = <0>;
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label = "G3D";
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};
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pd_lcd0: lcd0-power-domain@10023C80 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C80 0x20>;
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#power-domain-cells = <0>;
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label = "LCD0";
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};
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pd_tv: tv-power-domain@10023C20 {
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@ -121,24 +124,28 @@
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reg = <0x10023C20 0x20>;
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#power-domain-cells = <0>;
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power-domains = <&pd_lcd0>;
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label = "TV";
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};
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pd_cam: cam-power-domain@10023C00 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C00 0x20>;
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#power-domain-cells = <0>;
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label = "CAM";
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};
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pd_gps: gps-power-domain@10023CE0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CE0 0x20>;
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#power-domain-cells = <0>;
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label = "GPS";
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};
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pd_gps_alive: gps-alive-power-domain@10023D00 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023D00 0x20>;
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#power-domain-cells = <0>;
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label = "GPS alive";
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};
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gic: interrupt-controller@10490000 {
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@ -86,6 +86,7 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CA0 0x20>;
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#power-domain-cells = <0>;
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label = "LCD1";
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};
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l2c: l2-cache-controller@10502000 {
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@ -172,6 +172,7 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CA0 0x20>;
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#power-domain-cells = <0>;
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label = "ISP";
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};
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l2c: l2-cache-controller@10502000 {
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@ -115,18 +115,21 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044000 0x20>;
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#power-domain-cells = <0>;
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label = "GSC";
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};
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pd_mfc: mfc-power-domain@10044040 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044040 0x20>;
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#power-domain-cells = <0>;
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label = "MFC";
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};
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pd_disp1: disp1-power-domain@100440A0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x100440A0 0x20>;
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#power-domain-cells = <0>;
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label = "DISP1";
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clocks = <&clock CLK_FIN_PLL>,
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<&clock CLK_MOUT_ACLK200_DISP1_SUB>,
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<&clock CLK_MOUT_ACLK300_DISP1_SUB>;
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@ -277,6 +277,7 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044000 0x20>;
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#power-domain-cells = <0>;
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label = "GSC";
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clocks = <&clock CLK_FIN_PLL>,
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<&clock CLK_MOUT_USER_ACLK300_GSCL>,
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<&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
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@ -287,6 +288,7 @@
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044020 0x20>;
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#power-domain-cells = <0>;
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label = "ISP";
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};
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mfc_pd: power-domain@10044060 {
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@ -297,18 +299,21 @@
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<&clock CLK_ACLK333>;
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clock-names = "oscclk", "clk0","asb0";
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#power-domain-cells = <0>;
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label = "MFC";
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};
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msc_pd: power-domain@10044120 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10044120 0x20>;
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#power-domain-cells = <0>;
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label = "MSC";
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};
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disp_pd: power-domain@100440C0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x100440C0 0x20>;
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#power-domain-cells = <0>;
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label = "DISP";
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clocks = <&clock CLK_FIN_PLL>,
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<&clock CLK_MOUT_USER_ACLK200_DISP1>,
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<&clock CLK_MOUT_USER_ACLK300_DISP1>,
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