clk: sunxi: make factors_clk_setup return the clock it registers
We will be needing this to register a factor clock as parent with leaf divisors on a single call. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Mike Turquette <mturquette@linaro.org>
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@ -317,8 +317,8 @@ static const struct factors_data sun4i_apb1_data __initconst = {
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.getter = sun4i_get_apb1_factors,
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};
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static void __init sunxi_factors_clk_setup(struct device_node *node,
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struct factors_data *data)
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static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
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const struct factors_data *data)
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{
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struct clk *clk;
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struct clk_factors *factors;
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@ -340,14 +340,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,
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factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
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if (!factors)
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return;
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return NULL;
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/* Add a gate if this factor clock can be gated */
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if (data->enable) {
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gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
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if (!gate) {
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kfree(factors);
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return;
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return NULL;
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}
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/* set up gate properties */
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@ -363,7 +363,7 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,
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if (!mux) {
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kfree(factors);
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kfree(gate);
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return;
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return NULL;
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}
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/* set up gate properties */
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@ -384,13 +384,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,
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parents, i,
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mux_hw, &clk_mux_ops,
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&factors->hw, &clk_factors_ops,
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gate_hw, &clk_gate_ops,
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i ? 0 : CLK_IS_ROOT);
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gate_hw, &clk_gate_ops, 0);
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if (!IS_ERR(clk)) {
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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clk_register_clkdev(clk, clk_name, NULL);
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}
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return clk;
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}
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