time: x86: Replace LATCH with PIT_LATCH in i8253 clocksource driver
The i8253 clockevent & clocksource driver uses PIT_LATCH except for two cases where it uses LATCH: 1) /* VIA686a test code... reset the latch if count > max + 1 */ if (count > LATCH) { LATCH is based on CLOCK_TICK_RATE which is defined as PIT_TICK_RATE on x86 so this should just be the later. 2) ... switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* binary, mode 2, LSB/MSB, ch 0 */ outb_p(0x34, PIT_MODE); outb_p(LATCH & 0xff , PIT_CH0); /* LSB */ outb_p(LATCH >> 8 , PIT_CH0); /* MSB */ ... MIPS and ARM are the only other arches that use this driver. In the MIPS case CLOCK_TICK_RATE is defined as the same value as PIT_TICK_RATE. For ARM, the only machine that uses it is Footbridge which has a totally bogus CLOCK_TICK_RATE according to the comments. Furthermore, the clockevent_i8253_init() initializes the clockevent with PIT_TIC_RATE, so there's no reason to use the generic LATCH. This is part of work to remove and depecrate the global CLOCK_TICK_RATE symbol. Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
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@ -53,7 +53,7 @@ static cycle_t i8253_read(struct clocksource *cs)
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count |= inb_p(PIT_CH0) << 8;
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/* VIA686a test code... reset the latch if count > max + 1 */
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if (count > LATCH) {
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if (count > PIT_LATCH) {
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outb_p(0x34, PIT_MODE);
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outb_p(PIT_LATCH & 0xff, PIT_CH0);
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outb_p(PIT_LATCH >> 8, PIT_CH0);
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@ -114,8 +114,8 @@ static void init_pit_timer(enum clock_event_mode mode,
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case CLOCK_EVT_MODE_PERIODIC:
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/* binary, mode 2, LSB/MSB, ch 0 */
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outb_p(0x34, PIT_MODE);
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outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
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outb_p(LATCH >> 8 , PIT_CH0); /* MSB */
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outb_p(PIT_LATCH & 0xff , PIT_CH0); /* LSB */
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outb_p(PIT_LATCH >> 8 , PIT_CH0); /* MSB */
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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