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net: dsa: mv88e6xxx: prefix Port Status macros

Browse source 
For implicit namespacing and clarity, prefix the common Port Status
Register macros with MV88E6XXX_PORT_STS and the ones which differ
between implementations with a chosen reference model
(e.g. MV88E6352_PORT_STS_EEE.)

Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vivien Didelot 2017-06-12 12:37:33 -04:00 committed by David S. Miller
parent a1fa1a00b3
commit 5f83dc93b2
4 changed files with 56 additions and 54 deletions
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4
drivers/net/dsa/mv88e6xxx/chip.c
View file

@ -828,11 +828,11 @@ static int mv88e6xxx_get_eee(struct dsa_switch *ds, int port,
e->eee_enabled = !!(reg & 0x0200); e->eee_enabled = !!(reg & 0x0200);
e->tx_lpi_enabled = !!(reg & 0x0100); e->tx_lpi_enabled = !!(reg & 0x0100);
err = mv88e6xxx_port_read(chip, port, PORT_STATUS, &reg); err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &reg);
if (err) if (err)
goto out; goto out;
e->eee_active = !!(reg & PORT_STATUS_EEE); e->eee_active = !!(reg & MV88E6352_PORT_STS_EEE);
out: out:
mutex_unlock(&chip->reg_lock); mutex_unlock(&chip->reg_lock);

20
drivers/net/dsa/mv88e6xxx/port.c
View file

@ -322,33 +322,33 @@ int mv88e6390x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
switch (mode) { switch (mode) {
case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_1000BASEX:
cmode = PORT_STATUS_CMODE_1000BASE_X; cmode = MV88E6XXX_PORT_STS_CMODE_1000BASE_X;
break; break;
case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_SGMII:
cmode = PORT_STATUS_CMODE_SGMII; cmode = MV88E6XXX_PORT_STS_CMODE_SGMII;
break; break;
case PHY_INTERFACE_MODE_2500BASEX: case PHY_INTERFACE_MODE_2500BASEX:
cmode = PORT_STATUS_CMODE_2500BASEX; cmode = MV88E6XXX_PORT_STS_CMODE_2500BASEX;
break; break;
case PHY_INTERFACE_MODE_XGMII: case PHY_INTERFACE_MODE_XGMII:
cmode = PORT_STATUS_CMODE_XAUI; cmode = MV88E6XXX_PORT_STS_CMODE_XAUI;
break; break;
case PHY_INTERFACE_MODE_RXAUI: case PHY_INTERFACE_MODE_RXAUI:
cmode = PORT_STATUS_CMODE_RXAUI; cmode = MV88E6XXX_PORT_STS_CMODE_RXAUI;
break; break;
default: default:
cmode = 0; cmode = 0;
} }
if (cmode) { if (cmode) {
err = mv88e6xxx_port_read(chip, port, PORT_STATUS, &reg); err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &reg);
if (err) if (err)
return err; return err;
reg &= ~PORT_STATUS_CMODE_MASK; reg &= ~MV88E6XXX_PORT_STS_CMODE_MASK;
reg |= cmode; reg |= cmode;
err = mv88e6xxx_port_write(chip, port, PORT_STATUS, reg); err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);
if (err) if (err)
return err; return err;
} }
@ -361,11 +361,11 @@ int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode)
int err; int err;
u16 reg; u16 reg;
err = mv88e6xxx_port_read(chip, port, PORT_STATUS, &reg); err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &reg);
if (err) if (err)
return err; return err;
*cmode = reg & PORT_STATUS_CMODE_MASK; *cmode = reg & MV88E6XXX_PORT_STS_CMODE_MASK;
return 0; return 0;
} }

48
drivers/net/dsa/mv88e6xxx/port.h
View file

@ -17,29 +17,31 @@
#include "chip.h" #include "chip.h"
#define PORT_STATUS 0x00 /* Offset 0x00: Port Status Register */
#define PORT_STATUS_PAUSE_EN BIT(15) #define MV88E6XXX_PORT_STS 0x00
#define PORT_STATUS_MY_PAUSE BIT(14) #define MV88E6XXX_PORT_STS_PAUSE_EN 0x8000
#define PORT_STATUS_HD_FLOW BIT(13) #define MV88E6XXX_PORT_STS_MY_PAUSE 0x4000
#define PORT_STATUS_PHY_DETECT BIT(12) #define MV88E6XXX_PORT_STS_HD_FLOW 0x2000
#define PORT_STATUS_LINK BIT(11) #define MV88E6XXX_PORT_STS_PHY_DETECT 0x1000
#define PORT_STATUS_DUPLEX BIT(10) #define MV88E6XXX_PORT_STS_LINK 0x0800
#define PORT_STATUS_SPEED_MASK 0x0300 #define MV88E6XXX_PORT_STS_DUPLEX 0x0400
#define PORT_STATUS_SPEED_10 0x0000 #define MV88E6XXX_PORT_STS_SPEED_MASK 0x0300
#define PORT_STATUS_SPEED_100 0x0100 #define MV88E6XXX_PORT_STS_SPEED_10 0x0000
#define PORT_STATUS_SPEED_1000 0x0200 #define MV88E6XXX_PORT_STS_SPEED_100 0x0100
#define PORT_STATUS_EEE BIT(6) /* 6352 */ #define MV88E6XXX_PORT_STS_SPEED_1000 0x0200
#define PORT_STATUS_AM_DIS BIT(6) /* 6165 */ #define MV88E6352_PORT_STS_EEE 0x0040
#define PORT_STATUS_MGMII BIT(6) /* 6185 */ #define MV88E6165_PORT_STS_AM_DIS 0x0040
#define PORT_STATUS_TX_PAUSED BIT(5) #define MV88E6185_PORT_STS_MGMII 0x0040
#define PORT_STATUS_FLOW_CTRL BIT(4) #define MV88E6XXX_PORT_STS_TX_PAUSED 0x0020
#define PORT_STATUS_CMODE_MASK 0x0f #define MV88E6XXX_PORT_STS_FLOW_CTL 0x0010
#define PORT_STATUS_CMODE_100BASE_X 0x8 #define MV88E6XXX_PORT_STS_CMODE_MASK 0x000f
#define PORT_STATUS_CMODE_1000BASE_X 0x9 #define MV88E6XXX_PORT_STS_CMODE_100BASE_X 0x0008
#define PORT_STATUS_CMODE_SGMII 0xa #define MV88E6XXX_PORT_STS_CMODE_1000BASE_X 0x0009
#define PORT_STATUS_CMODE_2500BASEX 0xb #define MV88E6XXX_PORT_STS_CMODE_SGMII 0x000a
#define PORT_STATUS_CMODE_XAUI 0xc #define MV88E6XXX_PORT_STS_CMODE_2500BASEX 0x000b
#define PORT_STATUS_CMODE_RXAUI 0xd #define MV88E6XXX_PORT_STS_CMODE_XAUI 0x000c
#define MV88E6XXX_PORT_STS_CMODE_RXAUI 0x000d
#define PORT_PCS_CTRL 0x01 #define PORT_PCS_CTRL 0x01
#define PORT_PCS_CTRL_RGMII_DELAY_RXCLK BIT(15) #define PORT_PCS_CTRL_RGMII_DELAY_RXCLK BIT(15)
#define PORT_PCS_CTRL_RGMII_DELAY_TXCLK BIT(14) #define PORT_PCS_CTRL_RGMII_DELAY_TXCLK BIT(14)

38
drivers/net/dsa/mv88e6xxx/serdes.c
View file

@ -64,9 +64,9 @@ int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
if (err) if (err)
return err; return err;
if ((cmode == PORT_STATUS_CMODE_100BASE_X) || if ((cmode == MV88E6XXX_PORT_STS_CMODE_100BASE_X) ||
(cmode == PORT_STATUS_CMODE_1000BASE_X) || (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X) ||
(cmode == PORT_STATUS_CMODE_SGMII)) { (cmode == MV88E6XXX_PORT_STS_CMODE_SGMII)) {
err = mv88e6352_serdes_power_set(chip, on); err = mv88e6352_serdes_power_set(chip, on);
if (err < 0) if (err < 0)
return err; return err;
@ -139,15 +139,15 @@ static int mv88e6390_serdes_lower(struct mv88e6xxx_chip *chip, u8 cmode,
return err; return err;
switch (cmode_donor) { switch (cmode_donor) {
case PORT_STATUS_CMODE_RXAUI: case MV88E6XXX_PORT_STS_CMODE_RXAUI:
if (!rxaui) if (!rxaui)
break; break;
/* Fall through */ /* Fall through */
case PORT_STATUS_CMODE_1000BASE_X: case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
case PORT_STATUS_CMODE_SGMII: case MV88E6XXX_PORT_STS_CMODE_SGMII:
case PORT_STATUS_CMODE_2500BASEX: case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
if (cmode == PORT_STATUS_CMODE_1000BASE_X || if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASE_X ||
cmode == PORT_STATUS_CMODE_SGMII) cmode == MV88E6XXX_PORT_STS_CMODE_SGMII)
return mv88e6390_serdes_sgmii(chip, lane, on); return mv88e6390_serdes_sgmii(chip, lane, on);
} }
return 0; return 0;
@ -157,12 +157,12 @@ static int mv88e6390_serdes_port9(struct mv88e6xxx_chip *chip, u8 cmode,
bool on) bool on)
{ {
switch (cmode) { switch (cmode) {
case PORT_STATUS_CMODE_1000BASE_X: case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
case PORT_STATUS_CMODE_SGMII: case MV88E6XXX_PORT_STS_CMODE_SGMII:
return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on); return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on);
case PORT_STATUS_CMODE_XAUI: case MV88E6XXX_PORT_STS_CMODE_XAUI:
case PORT_STATUS_CMODE_RXAUI: case MV88E6XXX_PORT_STS_CMODE_RXAUI:
case PORT_STATUS_CMODE_2500BASEX: case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
return mv88e6390_serdes_10g(chip, MV88E6390_PORT9_LANE0, on); return mv88e6390_serdes_10g(chip, MV88E6390_PORT9_LANE0, on);
} }
@ -173,12 +173,12 @@ static int mv88e6390_serdes_port10(struct mv88e6xxx_chip *chip, u8 cmode,
bool on) bool on)
{ {
switch (cmode) { switch (cmode) {
case PORT_STATUS_CMODE_SGMII: case MV88E6XXX_PORT_STS_CMODE_SGMII:
return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on); return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on);
case PORT_STATUS_CMODE_XAUI: case MV88E6XXX_PORT_STS_CMODE_XAUI:
case PORT_STATUS_CMODE_RXAUI: case MV88E6XXX_PORT_STS_CMODE_RXAUI:
case PORT_STATUS_CMODE_1000BASE_X: case MV88E6XXX_PORT_STS_CMODE_1000BASE_X:
case PORT_STATUS_CMODE_2500BASEX: case MV88E6XXX_PORT_STS_CMODE_2500BASEX:
return mv88e6390_serdes_10g(chip, MV88E6390_PORT10_LANE0, on); return mv88e6390_serdes_10g(chip, MV88E6390_PORT10_LANE0, on);
} }