From 94f58eb2a8e840f5ffe06c8392ca96140fb9390e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:47 +0200 Subject: [PATCH 01/41] ARM: dts: ape6evm: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIFA0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 740e5d23f7c7..5bccc7d229d7 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -188,7 +188,7 @@ }; &pfc { - scifa0_pins: serial0 { + scifa0_pins: scifa0 { groups = "scifa0_data"; function = "scifa0"; }; From 8b68d53ec2c1b4106c3d07781c7773ff3e61c0bf Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:48 +0200 Subject: [PATCH 02/41] ARM: dts: ape6evm: Name mmc pfc subnode after device name Name the Pin Function Controller subnode for MMC0 after its device name, instead of using the generic and indexless "mmc". This avoids conflicts when enabling support for more MMC interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 5bccc7d229d7..ec7c86e06538 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -193,7 +193,7 @@ function = "scifa0"; }; - mmc0_pins: mmc { + mmc0_pins: mmc0 { groups = "mmc0_data8", "mmc0_ctrl"; function = "mmc0"; }; From 94667b193c67b3510e644a61243155c234b9f87d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:49 +0200 Subject: [PATCH 03/41] ARM: dts: armadillo800eva: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIFA1 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index 162049516685..6866f61a350c 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -232,7 +232,7 @@ function = "gether"; }; - scifa1_pins: serial1 { + scifa1_pins: scifa1 { groups = "scifa1_data"; function = "scifa1"; }; From c32149c7fd9d3716c38954bc3a99fff90a74abf7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:50 +0200 Subject: [PATCH 04/41] ARM: dts: bockw: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index 0a0bd3b6bb40..211d239d9041 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -129,7 +129,7 @@ pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; - scif0_pins: serial0 { + scif0_pins: scif0 { groups = "scif0_data_a", "scif0_ctrl"; function = "scif0"; }; From 46344361f5cdffac3c42b9651595f6e0bd609885 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:51 +0200 Subject: [PATCH 05/41] ARM: dts: marzen: Name serial port pfc subnodes after device names Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after their device names, instead of using some arbitrary names that look like serial port aliases, but differ from the actual aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779-marzen.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index cec79a6347c0..013e6f510b0f 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -195,12 +195,12 @@ }; }; - scif2_pins: serial2 { + scif2_pins: scif2 { groups = "scif2_data_c"; function = "scif2"; }; - scif4_pins: serial4 { + scif4_pins: scif4 { groups = "scif4_data"; function = "scif4"; }; From ca34829853779da173785b25531630469d0cef99 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:52 +0200 Subject: [PATCH 06/41] ARM: dts: lager: Name serial port pfc subnodes after device names Name the Pin Function Controller subnodes for SCIF0 and SCIFA1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 9d20ace33b01..c6803977b427 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -317,7 +317,7 @@ function = "du"; }; - scif0_pins: serial0 { + scif0_pins: scif0 { groups = "scif0_data"; function = "scif0"; }; @@ -337,7 +337,7 @@ function = "intc"; }; - scifa1_pins: serial1 { + scifa1_pins: scifa1 { groups = "scifa1_data"; function = "scifa1"; }; From 85c5e4c4296bc35686334efc4eddf563ba687127 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:53 +0200 Subject: [PATCH 07/41] ARM: dts: lager: Name spi pfc subnodes after device names Name the Pin Function Controller subnodes for QSPI and MSIOF1 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index c6803977b427..09b633f5ad07 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -371,12 +371,12 @@ function = "mmc1"; }; - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; - msiof1_pins: spi2 { + msiof1_pins: msiof1 { groups = "msiof1_clk", "msiof1_sync", "msiof1_rx", "msiof1_tx"; function = "msiof1"; From da84fd93486b4cd2a32c6a2effc5368bcb2269bc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:54 +0200 Subject: [PATCH 08/41] ARM: dts: lager: Name vin pfc subnode after device name Name the Pin Function Controller subnode for VIN1 after its device name, instead of using the generic and indexless "vin". This avoids conflicts when enabling support for more video inputs later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 09b633f5ad07..52b56fcaddf2 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -427,7 +427,7 @@ function = "usb2"; }; - vin1_pins: vin { + vin1_pins: vin1 { groups = "vin1_data8", "vin1_clk"; function = "vin1"; }; From b71b8346e2a4f007721d0e0373240bda9e939a7b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:55 +0200 Subject: [PATCH 09/41] ARM: dts: koelsch: Name serial port pfc subnodes after device names Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 20fbc8c36a78..73e5ecf036e1 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -332,12 +332,12 @@ function = "du"; }; - scif0_pins: serial0 { + scif0_pins: scif0 { groups = "scif0_data_d"; function = "scif0"; }; - scif1_pins: serial1 { + scif1_pins: scif1 { groups = "scif1_data_d"; function = "scif1"; }; From a4d98bed5e697333e5dcf74503cdf560229f69bc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:56 +0200 Subject: [PATCH 10/41] ARM: dts: koelsch: Name spi pfc subnodes after device names Name the Pin Function Controller subnodes for QSPI and MSIOF0 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 73e5ecf036e1..f8a7d090fd01 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -372,12 +372,12 @@ function = "sdhi2"; }; - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; - msiof0_pins: spi1 { + msiof0_pins: msiof0 { groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", "msiof0_tx"; function = "msiof0"; From a1cd3c55d3fcb0003e1dfc5f87131c6689b52944 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:57 +0200 Subject: [PATCH 11/41] ARM: dts: porter: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index e9151e946da8..85d109a5f43c 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -142,7 +142,7 @@ }; &pfc { - scif0_pins: serial0 { + scif0_pins: scif0 { groups = "scif0_data_d"; function = "scif0"; }; From 2d3e17013ba58a5f092133794694d2f50a4f0564 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:58 +0200 Subject: [PATCH 12/41] ARM: dts: porter: Name spi pfc subnode after device name Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-porter.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts index 85d109a5f43c..6761d11d3f9e 100644 --- a/arch/arm/boot/dts/r8a7791-porter.dts +++ b/arch/arm/boot/dts/r8a7791-porter.dts @@ -167,7 +167,7 @@ function = "sdhi2"; }; - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; From 167d34af3d8b3b66dc57f60f473a1a1f4ca3cb9d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:00:59 +0200 Subject: [PATCH 13/41] ARM: dts: gose: Name serial port pfc subnodes after device names Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index f748360ee857..995e1e0fb1ff 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -320,12 +320,12 @@ function = "du"; }; - scif0_pins: serial0 { + scif0_pins: scif0 { groups = "scif0_data_d"; function = "scif0"; }; - scif1_pins: serial1 { + scif1_pins: scif1 { groups = "scif1_data_d"; function = "scif1"; }; From 740f5c805f39ccfa3ac95983155ab7410ccadd89 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:00 +0200 Subject: [PATCH 14/41] ARM: dts: gose: Name spi pfc subnode after device name Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793-gose.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts index 995e1e0fb1ff..90af18600124 100644 --- a/arch/arm/boot/dts/r8a7793-gose.dts +++ b/arch/arm/boot/dts/r8a7793-gose.dts @@ -360,7 +360,7 @@ renesas,function = "sdhi2"; }; - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; From d88f5bc4a92f3a7a825b83708e38dd5c390cfbc6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:01 +0200 Subject: [PATCH 15/41] ARM: dts: alt: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 383ad791f1db..1335664b2f88 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -111,7 +111,7 @@ function = "du"; }; - scif2_pins: serial2 { + scif2_pins: scif2 { groups = "scif2_data"; function = "scif2"; }; From fc10f3c93b2d32a490fcbf89329179d9d8320beb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:02 +0200 Subject: [PATCH 16/41] ARM: dts: alt: Name spi pfc subnode after device name Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 1335664b2f88..1ad37d431a2a 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -147,7 +147,7 @@ }; &pfc { - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; From 092599d69786efd91e874997964a8b2b774d8a27 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:03 +0200 Subject: [PATCH 17/41] ARM: dts: silk: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index b8c7a63c5ec4..7e88f6fe55cd 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -129,7 +129,7 @@ pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; - scif2_pins: serial2 { + scif2_pins: scif2 { groups = "scif2_data"; function = "scif2"; }; From a35cc9d26260aad5b010f247a1dae5dc8dcdf067 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:04 +0200 Subject: [PATCH 18/41] ARM: dts: silk: Name spi pfc subnode after device name Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 7e88f6fe55cd..488de730bee8 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -164,7 +164,7 @@ function = "sdhi1"; }; - qspi_pins: spi0 { + qspi_pins: qspi { groups = "qspi_ctrl", "qspi_data4"; function = "qspi"; }; From 970a62e07e5cfba58a571e4ba671f438065fcb19 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 15:01:05 +0200 Subject: [PATCH 19/41] ARM: dts: kzm9g: Name serial port pfc subnode after device name Name the Pin Function Controller subnode for SCIFA4 after its device name, instead of after the serial port alias. This avoids conflicts when adding support for more serial ports later, either here or in a DT overlay. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts index 36567cbf2e1c..1df68b167033 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts @@ -352,7 +352,7 @@ }; }; - scifa4_pins: serial4 { + scifa4_pins: scifa4 { groups = "scifa4_data", "scifa4_ctrl"; function = "scifa4"; }; From de0fae60b35d405d3aa2e9acf5914770cd328338 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 12 Jun 2016 23:53:04 +0300 Subject: [PATCH 20/41] ARM: dts: r8a7792: add clock index macros Add macros usable by the device tree sources to reference the R8A7792 clocks by index. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- include/dt-bindings/clock/r8a7792-clock.h | 102 ++++++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 include/dt-bindings/clock/r8a7792-clock.h diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h new file mode 100644 index 000000000000..949801eb0652 --- /dev/null +++ b/include/dt-bindings/clock/r8a7792-clock.h @@ -0,0 +1,102 @@ +/* + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ +#define __DT_BINDINGS_CLOCK_R8A7792_H__ + +/* CPG */ +#define R8A7792_CLK_MAIN 0 +#define R8A7792_CLK_PLL0 1 +#define R8A7792_CLK_PLL1 2 +#define R8A7792_CLK_PLL3 3 +#define R8A7792_CLK_LB 4 +#define R8A7792_CLK_QSPI 5 +#define R8A7792_CLK_Z 6 +#define R8A7792_CLK_ADSP 7 + +/* MSTP0 */ +#define R8A7792_CLK_MSIOF0 0 + +/* MSTP1 */ +#define R8A7792_CLK_TMU1 11 +#define R8A7792_CLK_TMU3 21 +#define R8A7792_CLK_TMU2 22 +#define R8A7792_CLK_CMT0 24 +#define R8A7792_CLK_TMU0 25 +#define R8A7792_CLK_VSP1DU1 27 +#define R8A7792_CLK_VSP1DU0 28 +#define R8A7792_CLK_VSP1_SY 31 + +/* MSTP2 */ +#define R8A7792_CLK_MSIOF1 8 +#define R8A7792_CLK_SYS_DMAC1 18 +#define R8A7792_CLK_SYS_DMAC0 19 + +/* MSTP3 */ +#define R8A7792_CLK_TPU0 4 +#define R8A7792_CLK_SDHI0 14 +#define R8A7792_CLK_CMT1 29 + +/* MSTP4 */ +#define R8A7792_CLK_IRQC 7 + +/* MSTP5 */ +#define R8A7792_CLK_AUDIO_DMAC0 2 +#define R8A7792_CLK_THERMAL 22 +#define R8A7792_CLK_PWM 23 + +/* MSTP7 */ +#define R8A7792_CLK_HSCIF1 16 +#define R8A7792_CLK_HSCIF0 17 +#define R8A7792_CLK_SCIF3 18 +#define R8A7792_CLK_SCIF2 19 +#define R8A7792_CLK_SCIF1 20 +#define R8A7792_CLK_SCIF0 21 +#define R8A7792_CLK_DU1 23 +#define R8A7792_CLK_DU0 24 + +/* MSTP8 */ +#define R8A7792_CLK_VIN5 4 +#define R8A7792_CLK_VIN4 5 +#define R8A7792_CLK_VIN3 8 +#define R8A7792_CLK_VIN2 9 +#define R8A7792_CLK_VIN1 10 +#define R8A7792_CLK_VIN0 11 +#define R8A7792_CLK_ETHERAVB 12 + +/* MSTP9 */ +#define R8A7792_CLK_GPIO7 4 +#define R8A7792_CLK_GPIO6 5 +#define R8A7792_CLK_GPIO5 7 +#define R8A7792_CLK_GPIO4 8 +#define R8A7792_CLK_GPIO3 9 +#define R8A7792_CLK_GPIO2 10 +#define R8A7792_CLK_GPIO1 11 +#define R8A7792_CLK_GPIO0 12 +#define R8A7792_CLK_GPIO11 13 +#define R8A7792_CLK_GPIO10 14 +#define R8A7792_CLK_CAN1 15 +#define R8A7792_CLK_CAN0 16 +#define R8A7792_CLK_QSPI_MOD 17 +#define R8A7792_CLK_GPIO9 19 +#define R8A7792_CLK_GPIO8 21 +#define R8A7792_CLK_I2C5 25 +#define R8A7792_CLK_IICDVFS 26 +#define R8A7792_CLK_I2C4 27 +#define R8A7792_CLK_I2C3 28 +#define R8A7792_CLK_I2C2 29 +#define R8A7792_CLK_I2C1 30 +#define R8A7792_CLK_I2C0 31 + +/* MSTP10 */ +#define R8A7792_CLK_SSI_ALL 5 +#define R8A7792_CLK_SSI4 11 +#define R8A7792_CLK_SSI3 12 + +#endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */ From 5258bb5d980024dae22f4256329caec4fe5e98b3 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sun, 12 Jun 2016 23:54:49 +0300 Subject: [PATCH 21/41] ARM: dts: r8a7792: add power domain index macros Add macros usable by the device tree sources to reference R8A7792 SYSC power domains by index. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- include/dt-bindings/power/r8a7792-sysc.h | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 include/dt-bindings/power/r8a7792-sysc.h diff --git a/include/dt-bindings/power/r8a7792-sysc.h b/include/dt-bindings/power/r8a7792-sysc.h new file mode 100644 index 000000000000..74f4a78e29aa --- /dev/null +++ b/include/dt-bindings/power/r8a7792-sysc.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A7792_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A7792_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A7792_PD_CA15_CPU0 0 +#define R8A7792_PD_CA15_CPU1 1 +#define R8A7792_PD_CA15_SCU 12 +#define R8A7792_PD_SGX 20 +#define R8A7792_PD_IMP 24 + +/* Always-on power area */ +#define R8A7792_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A7792_SYSC_H__ */ From 7c4163aae3d8e5b9bd72508f542a44d707f308b5 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:06:52 +0300 Subject: [PATCH 22/41] ARM: dts: r8a7792: initial SoC device tree The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC, and the required clock descriptions. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 170 +++++++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7792.dtsi diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi new file mode 100644 index 000000000000..33f2362a1f52 --- /dev/null +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -0,0 +1,170 @@ +/* + * Device Tree Source for the r8a7792 SoC + * + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include + +/ { + compatible = "renesas,r8a7792"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + clock-frequency = <1000000000>; + clocks = <&cpg_clocks R8A7792_CLK_Z>; + power-domains = <&sysc R8A7792_PD_CA15_CPU0>; + next-level-cache = <&L2_CA15>; + }; + + L2_CA15: cache-controller@0 { + compatible = "cache"; + reg = <0>; + cache-unified; + cache-level = <2>; + power-domains = <&sysc R8A7792_PD_CA15_SCU>; + }; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@f1001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0 0xf1001000 0 0x1000>, + <0 0xf1002000 0 0x1000>, + <0 0xf1004000 0 0x2000>, + <0 0xf1006000 0 0x2000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7792-sysc"; + reg = <0 0xe6180000 0 0x0200>; + #power-domain-cells = <1>; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@e6150000 { + compatible = "renesas,r8a7792-cpg-clocks", + "renesas,rcar-gen2-cpg-clocks"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk>; + #clock-cells = <1>; + clock-output-names = "main", "pll0", "pll1", "pll3", + "lb", "qspi", "z", "adsp"; + #power-domain-cells = <0>; + }; + + /* Fixed factor clocks */ + zs_clk: zs { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7792_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <6>; + clock-mult = <1>; + }; + p_clk: p { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7792_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <24>; + clock-mult = <1>; + }; + cp_clk: cp { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7792_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <48>; + clock-mult = <1>; + }; + + /* Gate clocks */ + mstp2_clks: mstp2_clks@e6150138 { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&zs_clk>, <&zs_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7792_CLK_SYS_DMAC1 R8A7792_CLK_SYS_DMAC0 + >; + clock-output-names = "sys-dmac1", "sys-dmac0"; + }; + mstp4_clks: mstp4_clks@e6150140 { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; + clocks = <&cp_clk>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "irqc"; + }; + mstp7_clks: mstp7_clks@e615014c { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; + clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, + <&p_clk>, <&p_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0 + R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2 + R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0 + >; + clock-output-names = "hscif1", "hscif0", "scif3", + "scif2", "scif1", "scif0"; + }; + }; + + /* External root clock */ + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; + + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; +}; From fdf8ec0a176ea29e7694ad0edd2cd34c820a3077 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:08:18 +0300 Subject: [PATCH 23/41] ARM: dts: r8a7792: add SYS-DMAC support Describe SYS-DMAC0/1 in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 64 ++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 33f2362a1f52..6017ea5280a0 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -79,6 +79,70 @@ #power-domain-cells = <1>; }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a7792", + "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x20000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC0>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + #dma-cells = <1>; + dma-channels = <15>; + }; + + dmac1: dma-controller@e6720000 { + compatible = "renesas,dmac-r8a7792", + "renesas,rcar-dmac"; + reg = <0 0xe6720000 0 0x20000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14"; + clocks = <&mstp2_clks R8A7792_CLK_SYS_DMAC1>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + #dma-cells = <1>; + dma-channels = <15>; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7792-cpg-clocks", From e66796b9bb87d2c48f68e5eb27dcfbc4c26c18d4 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:09:42 +0300 Subject: [PATCH 24/41] ARM: dts: r8a7792: add [H]SCIF support Describe [H]SCIFs in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 90 ++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 6017ea5280a0..b6e34b431a51 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -143,6 +143,96 @@ dma-channels = <15>; }; + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a7792", + "renesas,rcar-gen2-scif", "renesas,scif"; + reg = <0 0xe6e60000 0 64>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_SCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x29>, <&dmac0 0x2a>, + <&dmac1 0x29>, <&dmac1 0x2a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a7792", + "renesas,rcar-gen2-scif", "renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_SCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, + <&dmac1 0x2d>, <&dmac1 0x2e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif2: serial@e6e58000 { + compatible = "renesas,scif-r8a7792", + "renesas,rcar-gen2-scif", "renesas,scif"; + reg = <0 0xe6e58000 0 64>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_SCIF2>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, + <&dmac1 0x2b>, <&dmac1 0x2c>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif3: serial@e6ea8000 { + compatible = "renesas,scif-r8a7792", + "renesas,rcar-gen2-scif", "renesas,scif"; + reg = <0 0xe6ea8000 0 64>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_SCIF3>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x2f>, <&dmac0 0x30>, + <&dmac1 0x2f>, <&dmac1 0x30>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif0: serial@e62c0000 { + compatible = "renesas,hscif-r8a7792", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c0000 0 96>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_HSCIF0>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x39>, <&dmac0 0x3a>, + <&dmac1 0x39>, <&dmac1 0x3a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif1: serial@e62c8000 { + compatible = "renesas,hscif-r8a7792", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c8000 0 96>; + interrupts = ; + clocks = <&mstp7_clks R8A7792_CLK_HSCIF1>, <&zs_clk>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, + <&dmac1 0x4d>, <&dmac1 0x4e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7792-cpg-clocks", From 56efdbe56bc674208d01e3afdfb47f6b5b90da3d Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:12:06 +0300 Subject: [PATCH 25/41] ARM: dts: r8a7792: add IRQC support Describe the IRQC interrupt controller in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index b6e34b431a51..18b4e50521c3 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -61,6 +61,19 @@ IRQ_TYPE_LEVEL_HIGH)>; }; + irqc: interrupt-controller@e61c0000 { + compatible = "renesas,irqc-r8a7792", "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0 0xe61c0000 0 0x200>; + interrupts = , + , + , + ; + clocks = <&mstp4_clks R8A7792_CLK_IRQC>; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = Date: Mon, 13 Jun 2016 00:14:01 +0300 Subject: [PATCH 26/41] ARM: dts: blanche: document Blanche board Document the Blanche device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Blanche board. Signed-off-by: Sergei Shtylyov Acked-by: Rob Herring Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 9cf67e48f222..6adb9d549fce 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -39,6 +39,8 @@ Boards: compatible = "renesas,ape6evm", "renesas,r8a73a4" - Atmark Techno Armadillo-800 EVA compatible = "renesas,armadillo800eva" + - Blanche (RTP0RC7792SEB00010S) + compatible = "renesas,blanche", "renesas,r8a7792" - BOCK-W compatible = "renesas,bockw", "renesas,r8a7778" - Genmai (RTK772100BC00000BR) From 4018fba454602cc1d01a216352935d88582353f1 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:15:55 +0300 Subject: [PATCH 27/41] ARM: dts: blanche: initial device tree Add the initial device tree for the R8A7792 SoC based Blanche board. The board has 2 debug serial ports: SCIF0 and SCIF3; include support for them, so that the serial console can work. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/r8a7792-blanche.dts | 45 +++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7792-blanche.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 06b6c2d695bf..91630d1376bc 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -638,6 +638,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ r8a7790-lager.dtb \ r8a7791-koelsch.dtb \ r8a7791-porter.dtb \ + r8a7792-blanche.dtb \ r8a7793-gose.dtb \ r8a7794-alt.dtb \ r8a7794-silk.dtb \ diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts new file mode 100644 index 000000000000..e277d924441b --- /dev/null +++ b/arch/arm/boot/dts/r8a7792-blanche.dts @@ -0,0 +1,45 @@ +/* + * Device Tree Source for the Blanche board + * + * Copyright (C) 2014 Renesas Electronics Corporation + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7792.dtsi" + +/ { + model = "Blanche"; + compatible = "renesas,blanche", "renesas,r8a7792"; + + aliases { + serial0 = &scif0; + serial1 = &scif3; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial0:115200n8"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x40000000>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&scif0 { + status = "okay"; +}; + +&scif3 { + status = "okay"; +}; From f80b6dfd5e56f3908832ce89f96ae94352b616c2 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Mon, 13 Jun 2016 00:17:11 +0300 Subject: [PATCH 28/41] ARM: dts: blanche: add Ethernet support R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet chip was used instead on the Blanche board; this chip is compatible with SMSC LAN9115 for which there's a (device tree aware) driver. Describe the chip in the Blanche device tree; enable DHCP and NFS root in the kernel command line for the kernel booting. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792-blanche.dts | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts index e277d924441b..e7b40f0e7da6 100644 --- a/arch/arm/boot/dts/r8a7792-blanche.dts +++ b/arch/arm/boot/dts/r8a7792-blanche.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; }; @@ -30,6 +30,27 @@ device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; + + d3_3v: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "D3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ethernet@18000000 { + compatible = "smsc,lan89218", "smsc,lan9115"; + reg = <0 0x18000000 0 0x100>; + phy-mode = "mii"; + interrupt-parent = <&irqc>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + smsc,irq-push-pull; + reg-io-width = <4>; + vddvario-supply = <&d3_3v>; + vdd33a-supply = <&d3_3v>; + }; }; &extal_clk { From adc47ecf5a8d35f8060c88ac818cd5404268f3ed Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 13 Apr 2016 22:36:21 +0300 Subject: [PATCH 29/41] ARM: dts: silk: add DU pins Add the (previously omitted) DU pin data to the SILK board's device tree. Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 488de730bee8..cf24f45fff22 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -183,6 +183,16 @@ groups = "usb1"; function = "usb1"; }; + + du0_pins: du0 { + groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; + function = "du0"; + }; + + du1_pins: du1 { + groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; + function = "du1"; + }; }; &scif2 { @@ -360,6 +370,8 @@ }; &du { + pinctrl-0 = <&du0_pins &du1_pins>; + pinctrl-names = "default"; status = "okay"; clocks = <&mstp7_clks R8A7794_CLK_DU0>, From eebc8e2c5b7a3db19075a02730db8b73be933485 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 17 Jun 2016 01:02:48 +0300 Subject: [PATCH 30/41] ARM: dts: r8a7792: add JPU clocks Add JPU clock and its parent, M2 clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 16 ++++++++++++++++ include/dt-bindings/clock/r8a7792-clock.h | 1 + 2 files changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 18b4e50521c3..7077c5db2678 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -280,8 +280,24 @@ clock-div = <48>; clock-mult = <1>; }; + m2_clk: m2 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7792_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + }; /* Gate clocks */ + mstp1_clks: mstp1_clks@e6150134 { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; + clocks = <&m2_clk>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "jpu"; + }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7792-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h index 949801eb0652..89a5155913f6 100644 --- a/include/dt-bindings/clock/r8a7792-clock.h +++ b/include/dt-bindings/clock/r8a7792-clock.h @@ -24,6 +24,7 @@ #define R8A7792_CLK_MSIOF0 0 /* MSTP1 */ +#define R8A7792_CLK_JPU 6 #define R8A7792_CLK_TMU1 11 #define R8A7792_CLK_TMU3 21 #define R8A7792_CLK_TMU2 22 From 3e1839e91dfcb50cf5c1c9a7ac2ed61891400b92 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 17 Jun 2016 01:03:53 +0300 Subject: [PATCH 31/41] ARM: dts: r8a7792: add JPU support Describe JPEG Processing Unit (JPU) in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 7077c5db2678..ad895f8b2353 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -246,6 +246,15 @@ status = "disabled"; }; + jpu: jpeg-codec@fe980000 { + compatible = "renesas,jpu-r8a7792", + "renesas,rcar-gen2-jpu"; + reg = <0 0xfe980000 0 0x10300>; + interrupts = ; + clocks = <&mstp1_clks R8A7792_CLK_JPU>; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7792-cpg-clocks", From 1403e38b829acdad5679862a5949e408bca2279a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 14 Jun 2016 16:15:20 +0200 Subject: [PATCH 32/41] ARM: dts: armadillo800eva: Update console parameters Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC1 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameters from the kernel command line, as they're no longer needed for DT-based platforms. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index 6866f61a350c..7885075428bb 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -20,12 +20,12 @@ compatible = "renesas,armadillo800eva", "renesas,r8a7740"; aliases { - serial1 = &scifa1; + serial0 = &scifa1; }; chosen { - bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw"; - stdout-path = &scifa1; + bootargs = "earlyprintk ignore_loglevel root=/dev/nfs ip=dhcp rw"; + stdout-path = "serial0:115200n8"; }; memory@40000000 { From be6bebae60a354bcc207d1b99077c87f1a344710 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 14 Jun 2016 16:15:21 +0200 Subject: [PATCH 33/41] ARM: dts: genmai: Update console parameters Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC2 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100-genmai.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts index 05ba9953b4d8..118a8e2b86bd 100644 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/r7s72100-genmai.dts @@ -17,12 +17,12 @@ compatible = "renesas,genmai", "renesas,r7s72100"; aliases { - serial2 = &scif2; + serial0 = &scif2; }; chosen { bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = &scif2; + stdout-path = "serial0:115200n8"; }; memory@8000000 { From 822337d7ff422afcceb523d50e08921dfabd77ae Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 14 Jun 2016 16:15:22 +0200 Subject: [PATCH 34/41] ARM: dts: marzen: Add serial port config to chosen/stdout-path Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779-marzen.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index 013e6f510b0f..541678df90a9 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -25,7 +25,7 @@ chosen { bootargs = "ignore_loglevel root=/dev/nfs ip=on"; - stdout-path = &scif2; + stdout-path = "serial0:115200n8"; }; memory@60000000 { From 20fc3188ac35f4afe52d24d02a0750c5e9307c98 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 14 Jun 2016 16:15:23 +0200 Subject: [PATCH 35/41] ARM: dts: kzm9d: Update console parameters Add a "serial1" alias for the serial console (it is labeled "uart1"). Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameter from the kernel command line, as it's no longer needed for DT-based platforms. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/emev2-kzm9d.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts index 9eb86f8f32c5..60d0a732833a 100644 --- a/arch/arm/boot/dts/emev2-kzm9d.dts +++ b/arch/arm/boot/dts/emev2-kzm9d.dts @@ -23,9 +23,13 @@ reg = <0x40000000 0x8000000>; }; + aliases { + serial1 = &uart1; + }; + chosen { - bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp"; - stdout-path = &uart1; + bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp"; + stdout-path = "serial1:115200n8"; }; gpio_keys { From 54389e981cdfd081de67de083df451b70651f821 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 14 Jun 2016 16:15:24 +0200 Subject: [PATCH 36/41] ARM: dts: kzm9g: Update console parameters Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC4 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameters from the kernel command line, as they're no longer needed for DT-based platforms. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts index 1df68b167033..3d65f1f6d78b 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts @@ -22,7 +22,7 @@ compatible = "renesas,kzm9g", "renesas,sh73a0"; aliases { - serial4 = &scifa4; + serial0 = &scifa4; }; cpus { @@ -39,8 +39,8 @@ }; chosen { - bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel rw"; - stdout-path = &scifa4; + bootargs = "root=/dev/nfs ip=dhcp ignore_loglevel rw"; + stdout-path = "serial0:115200n8"; }; memory@40000000 { From e454b359b7a0a6f59e3d83394e6d4e598554cb33 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:30 +0200 Subject: [PATCH 37/41] devicetree: bindings: Renesas APMU and SMP Enable method Add DT binding documentation for the APMU hardware and add "renesas,apmu" to the list of enable methods for the ARM cpus. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Simon Horman --- .../devicetree/bindings/arm/cpus.txt | 1 + .../bindings/power/renesas,apmu.txt | 31 +++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/renesas,apmu.txt diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 3f0cbbb8395f..fa7520eb6387 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -204,6 +204,7 @@ nodes to be present and contain the properties described below. "qcom,gcc-msm8660" "qcom,kpss-acc-v1" "qcom,kpss-acc-v2" + "renesas,apmu" "rockchip,rk3036-smp" "rockchip,rk3066-smp" "ste,dbx500-smp" diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt b/Documentation/devicetree/bindings/power/renesas,apmu.txt new file mode 100644 index 000000000000..84404c9edff7 --- /dev/null +++ b/Documentation/devicetree/bindings/power/renesas,apmu.txt @@ -0,0 +1,31 @@ +DT bindings for the Renesas Advanced Power Management Unit + +Renesas R-Car line of SoCs utilize one or more APMU hardware units +for CPU core power domain control including SMP boot and CPU Hotplug. + +Required properties: + +- compatible: Should be "renesas,-apmu", "renesas,apmu" as fallback. + Examples with soctypes are: + - "renesas,r8a7790-apmu" (R-Car H2) + - "renesas,r8a7791-apmu" (R-Car M2-W) + - "renesas,r8a7792-apmu" (R-Car V2H) + - "renesas,r8a7793-apmu" (R-Car M2-N) + - "renesas,r8a7794-apmu" (R-Car E2) + +- reg: Base address and length of the I/O registers used by the APMU. + +- cpus: This node contains a list of CPU cores, which should match the order + of CPU cores used by the WUPCR and PSTR registers in the Advanced Power + Management Unit section of the device's datasheet. + + +Example: + +This shows the r8a7791 APMU that can control CPU0 and CPU1. + + apmu@e6152000 { + compatible = "renesas,r8a7791-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + }; From dc378795156d980ca701aab761457089dae84706 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:40 +0200 Subject: [PATCH 38/41] ARM: dts: r8a7790: Add APMU nodes Add DT nodes for the Advanced Power Management Units (APMU), and use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 9997e7dfabe2..d18558f21102 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -44,6 +44,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -164,6 +165,18 @@ }; }; + apmu@e6151000 { + compatible = "renesas,r8a7790-apmu", "renesas,apmu"; + reg = <0 0xe6151000 0 0x188>; + cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; + }; + + apmu@e6152000 { + compatible = "renesas,r8a7790-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; From 477cbcbd8f089ab72721a90760bc5d7987d3a713 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:41 +0200 Subject: [PATCH 39/41] ARM: dts: r8a7791: Add APMU node Add a DT node for the Advanced Power Management Units (APMU), and use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 1985bd0dc32c..8f0086bbd96b 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -43,6 +43,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -101,6 +102,12 @@ }; }; + apmu@e6152000 { + compatible = "renesas,r8a7791-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; From 65b133cd79cfde9f4e0157deb0e0f88f92811ad3 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 28 Jun 2016 16:10:42 +0200 Subject: [PATCH 40/41] ARM: dts: r8a7793: Add APMU node and second CPU core Add DT nodes for the Advanced Power Management Unit (APMU) and the second CPU core. Use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by: Magnus Damm Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 9b55c1c6ee31..8d02aacf2892 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -35,6 +35,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -56,6 +57,14 @@ next-level-cache = <&L2_CA15>; }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1500000000>; + power-domains = <&sysc R8A7793_PD_CA15_CPU1>; + }; + L2_CA15: cache-controller@0 { compatible = "cache"; reg = <0>; @@ -65,6 +74,12 @@ }; }; + apmu@e6152000 { + compatible = "renesas,r8a7793-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + }; + thermal-zones { cpu_thermal: cpu-thermal { polling-delay-passive = <0>; From 8fd763c75c3ab8e72e5d7f0d4c53531e6ff76197 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 21 Jun 2016 01:31:01 +0300 Subject: [PATCH 41/41] ARM: dts: r8a7792: add SMP support Add the device tree nodes for the Advanced Power Management Unit (APMU) and the second Cortex-A15 CPU core. Use the "enable-method" prop to point out that the APMU should be used for the SMP support. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index ad895f8b2353..75256ef4a04d 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -21,6 +21,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "renesas,apmu"; cpu0: cpu@0 { device_type = "cpu"; @@ -32,6 +33,15 @@ next-level-cache = <&L2_CA15>; }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1000000000>; + power-domains = <&sysc R8A7792_PD_CA15_CPU1>; + next-level-cache = <&L2_CA15>; + }; + L2_CA15: cache-controller@0 { compatible = "cache"; reg = <0>; @@ -49,6 +59,12 @@ #size-cells = <2>; ranges; + apmu@e6152000 { + compatible = "renesas,r8a7792-apmu", "renesas,apmu"; + reg = <0 0xe6152000 0 0x188>; + cpus = <&cpu0 &cpu1>; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;