Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 5543/1: arm: serial amba: add missing declaration in serial.h [ARM] pxa: fix pxa27x_udc default pullup GPIO [ARM] pxa/imote2: fix UCAM sensor board ADC model number mx[23]: don't put clock lookups in __initdata fix oops when using console=ttymxcN with N > 0 [ARM] ARMv7 errata: only apply fixes when running on applicable CPU [ARM] 5534/1: kmalloc must return a cache line aligned buffer
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6025974bab
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@ -7,4 +7,20 @@
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#define L1_CACHE_SHIFT 5
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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/*
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* Memory returned by kmalloc() may be used for DMA, so we must make
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* sure that all such allocations are cache aligned. Otherwise,
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* unrelated code may cause parts of the buffer to be read into the
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* cache before the transfer is done, causing old data to be seen by
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* the CPU.
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*/
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#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
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/*
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* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
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*/
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#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
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#define ARCH_SLAB_MINALIGN 8
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#endif
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#endif
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@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
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(((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
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VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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/*
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* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
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*/
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#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
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#define ARCH_SLAB_MINALIGN 8
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#endif
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#include <asm-generic/page.h>
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#endif
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@ -890,7 +890,7 @@ static struct clk clko_clk = {
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.con_id = n, \
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.clk = &c, \
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},
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static struct clk_lookup lookups[] __initdata = {
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static struct clk_lookup lookups[] = {
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/* It's unlikely that any driver wants one of them directly:
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_REGISTER_CLOCK(NULL, "ckih", ckih_clk)
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_REGISTER_CLOCK(NULL, "ckil", ckil_clk)
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@ -621,7 +621,7 @@ DEFINE_CLOCK1(csi_clk, 0, 0, 0, parent, &csi_clk1, &per4_clk);
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.clk = &c, \
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},
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static struct clk_lookup lookups[] __initdata = {
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static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
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_REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
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_REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
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@ -404,7 +404,7 @@ DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL);
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.clk = &c, \
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},
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static struct clk_lookup lookups[] __initdata = {
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static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "asrc", asrc_clk)
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_REGISTER_CLOCK(NULL, "ata", ata_clk)
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_REGISTER_CLOCK(NULL, "audmux", audmux_clk)
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@ -516,7 +516,7 @@ DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
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.clk = &c, \
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},
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static struct clk_lookup lookups[] __initdata = {
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static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK(NULL, "emi", emi_clk)
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_REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
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_REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
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@ -72,7 +72,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
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}
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static struct pxa2xx_udc_mach_info pxa_udc_info;
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static struct pxa2xx_udc_mach_info pxa_udc_info = {
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.gpio_pullup = -1,
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.gpio_vbus = -1,
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};
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void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
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{
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@ -412,7 +412,7 @@ static struct platform_device imote2_flash_device = {
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*/
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static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
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{ /* UCAM sensor board */
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.type = "max1238",
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.type = "max1239",
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.addr = 0x35,
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}, { /* ITS400 Sensor board only */
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.type = "max1363",
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@ -184,23 +184,37 @@ __v7_setup:
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stmia r12, {r0-r5, r7, r9, r11, lr}
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bl v7_flush_dcache_all
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ldmia r12, {r0-r5, r7, r9, r11, lr}
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mrc p15, 0, r0, c0, c0, 0 @ read main ID register
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and r10, r0, #0xff000000 @ ARM?
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teq r10, #0x41000000
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bne 2f
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and r5, r0, #0x00f00000 @ variant
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and r6, r0, #0x0000000f @ revision
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orr r0, r6, r5, lsr #20-4 @ combine variant and revision
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#ifdef CONFIG_ARM_ERRATA_430973
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mrc p15, 0, r10, c1, c0, 1 @ read aux control register
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orr r10, r10, #(1 << 6) @ set IBE to 1
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mcr p15, 0, r10, c1, c0, 1 @ write aux control register
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teq r5, #0x00100000 @ only present in r1p*
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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orreq r10, r10, #(1 << 6) @ set IBE to 1
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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#endif
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#ifdef CONFIG_ARM_ERRATA_458693
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mrc p15, 0, r10, c1, c0, 1 @ read aux control register
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orr r10, r10, #(1 << 5) @ set L1NEON to 1
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orr r10, r10, #(1 << 9) @ set PLDNOP to 1
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mcr p15, 0, r10, c1, c0, 1 @ write aux control register
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teq r0, #0x20 @ only present in r2p0
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mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
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orreq r10, r10, #(1 << 5) @ set L1NEON to 1
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orreq r10, r10, #(1 << 9) @ set PLDNOP to 1
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mcreq p15, 0, r10, c1, c0, 1 @ write aux control register
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#endif
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#ifdef CONFIG_ARM_ERRATA_460075
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mrc p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
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orr r10, r10, #(1 << 22) @ set the Write Allocate disable bit
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mcr p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register
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teq r0, #0x20 @ only present in r2p0
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mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register
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tsteq r10, #1 << 22
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orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit
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mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register
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#endif
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mov r10, #0
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2: mov r10, #0
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#ifdef HARVARD_CACHE
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mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
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#endif
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@ -1031,6 +1031,8 @@ imx_console_setup(struct console *co, char *options)
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if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
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co->index = 0;
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sport = imx_ports[co->index];
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if(sport == NULL)
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return -ENODEV;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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@ -159,6 +159,7 @@
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#define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
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#ifndef __ASSEMBLY__
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struct amba_device; /* in uncompress this is included but amba/bus.h is not */
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struct amba_pl010_data {
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void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
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};
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