ARM: imx6: exit coherency when shutting down a cpu
There is a system hang issue on imx6q which can easily be seen with running a cpu hotplug stress testing (hotplug secondary cores from user space via sysfs interface for thousands iterations). It turns out that the issue is caused by coherency of the cpu that is being shut down. When shutting down a cpu, we need to have the cpu exit coherency to prevent it from receiving cache, TLB, or BTB maintenance operations broadcast by other CPUs in the cluster. Copy cpu_enter_lowpower() and cpu_leave_lowpower() from mach-vexpress to have coherency properly handled in platform_cpu_die(), thus fix the issue. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: stable@kernel.org
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@ -12,6 +12,7 @@
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#include <linux/errno.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <mach/common.h>
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int platform_cpu_kill(unsigned int cpu)
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@ -19,6 +20,44 @@ int platform_cpu_kill(unsigned int cpu)
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return 1;
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}
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static inline void cpu_enter_lowpower(void)
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{
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unsigned int v;
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flush_cache_all();
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asm volatile(
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"mcr p15, 0, %1, c7, c5, 0\n"
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" mcr p15, 0, %1, c7, c10, 4\n"
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/*
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* Turn off coherency
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, %3\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "r" (0), "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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static inline void cpu_leave_lowpower(void)
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{
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unsigned int v;
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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@ -26,9 +65,10 @@ int platform_cpu_kill(unsigned int cpu)
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*/
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void platform_cpu_die(unsigned int cpu)
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{
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flush_cache_all();
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cpu_enter_lowpower();
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imx_enable_cpu(cpu, false);
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cpu_do_idle();
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cpu_leave_lowpower();
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/* We should never return from idle */
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panic("cpu %d unexpectedly exit from shutdown\n", cpu);
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