amd64_edac: fix K8 chip select reporting
Fix the case when amd64_debug_display_dimm_sizes() reports only half the amount of DRAM on it because it doesn't account for when the single DCT operates in 128-bit mode and merges chip selects from different DIMMs. Reported-by: Johannes Hirte <johannes.hirte@fem.tu-ilmenau.de> LKML-Reference: <200912112202.48173.johannes.hirte@fem.tu-ilmenau.de> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -1700,11 +1700,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
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*/
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static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
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{
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int dimm, size0, size1;
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int dimm, size0, size1, factor = 0;
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u32 dbam;
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u32 *dcsb;
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if (boot_cpu_data.x86 == 0xf) {
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if (pvt->dclr0 & F10_WIDTH_128)
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factor = 1;
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/* K8 families < revF not supported yet */
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if (pvt->ext_model < K8_REV_F)
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return;
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@ -1732,7 +1735,8 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
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size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam));
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edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n",
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dimm * 2, size0, dimm * 2 + 1, size1);
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dimm * 2, size0 << factor,
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dimm * 2 + 1, size1 << factor);
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}
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}
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