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debugfs: Pass bool pointer to debugfs_create_bool()

Its a bit odd that debugfs_create_bool() takes 'u32 *' as an argument,
when all it needs is a boolean pointer.

It would be better to update this API to make it accept 'bool *'
instead, as that will make it more consistent and often more convenient.
Over that bool takes just a byte.

That required updates to all user sites as well, in the same commit
updating the API. regmap core was also using
debugfs_{read|write}_file_bool(), directly and variable types were
updated for that to be bool as well.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
steinar/wifi_calib_4_9_kernel
Viresh Kumar 2015-09-26 15:04:07 -07:00 committed by Greg Kroah-Hartman
parent 6e58f752a6
commit 621a5f7ad9
33 changed files with 78 additions and 78 deletions

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@ -105,7 +105,7 @@ a variable of type size_t.
Boolean values can be placed in debugfs with: Boolean values can be placed in debugfs with:
struct dentry *debugfs_create_bool(const char *name, umode_t mode, struct dentry *debugfs_create_bool(const char *name, umode_t mode,
struct dentry *parent, u32 *value); struct dentry *parent, bool *value);
A read on the resulting file will yield either Y (for non-zero values) or A read on the resulting file will yield either Y (for non-zero values) or
N, followed by a newline. If written to, it will accept either upper- or N, followed by a newline. If written to, it will accept either upper- or

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@ -58,7 +58,7 @@ static u32 mdscr_read(void)
* Allow root to disable self-hosted debug from userspace. * Allow root to disable self-hosted debug from userspace.
* This is useful if you want to connect an external JTAG debugger. * This is useful if you want to connect an external JTAG debugger.
*/ */
static u32 debug_enabled = 1; static bool debug_enabled = true;
static int create_debug_debugfs_entry(void) static int create_debug_debugfs_entry(void)
{ {
@ -69,7 +69,7 @@ fs_initcall(create_debug_debugfs_entry);
static int __init early_debug_disable(char *buf) static int __init early_debug_disable(char *buf)
{ {
debug_enabled = 0; debug_enabled = false;
return 0; return 0;
} }

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@ -138,7 +138,7 @@ struct acpi_ec {
unsigned long gpe; unsigned long gpe;
unsigned long command_addr; unsigned long command_addr;
unsigned long data_addr; unsigned long data_addr;
u32 global_lock; bool global_lock;
unsigned long flags; unsigned long flags;
unsigned long reference_count; unsigned long reference_count;
struct mutex mutex; struct mutex mutex;

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@ -122,9 +122,9 @@ struct regmap {
unsigned int num_reg_defaults_raw; unsigned int num_reg_defaults_raw;
/* if set, only the cache is modified not the HW */ /* if set, only the cache is modified not the HW */
u32 cache_only; bool cache_only;
/* if set, only the HW is modified not the cache */ /* if set, only the HW is modified not the cache */
u32 cache_bypass; bool cache_bypass;
/* if set, remember to free reg_defaults_raw */ /* if set, remember to free reg_defaults_raw */
bool cache_free; bool cache_free;
@ -132,7 +132,7 @@ struct regmap {
const void *reg_defaults_raw; const void *reg_defaults_raw;
void *cache; void *cache;
/* if set, the cache contains newer data than the HW */ /* if set, the cache contains newer data than the HW */
u32 cache_dirty; bool cache_dirty;
/* if set, the HW registers are known to match map->reg_defaults */ /* if set, the HW registers are known to match map->reg_defaults */
bool no_sync_defaults; bool no_sync_defaults;

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@ -355,9 +355,9 @@ static int regcache_lzo_sync(struct regmap *map, unsigned int min,
if (ret > 0 && val == map->reg_defaults[ret].def) if (ret > 0 && val == map->reg_defaults[ret].def)
continue; continue;
map->cache_bypass = 1; map->cache_bypass = true;
ret = _regmap_write(map, i, val); ret = _regmap_write(map, i, val);
map->cache_bypass = 0; map->cache_bypass = false;
if (ret) if (ret)
return ret; return ret;
dev_dbg(map->dev, "Synced register %#x, value %#x\n", dev_dbg(map->dev, "Synced register %#x, value %#x\n",

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@ -54,11 +54,11 @@ static int regcache_hw_init(struct regmap *map)
return -ENOMEM; return -ENOMEM;
if (!map->reg_defaults_raw) { if (!map->reg_defaults_raw) {
u32 cache_bypass = map->cache_bypass; bool cache_bypass = map->cache_bypass;
dev_warn(map->dev, "No cache defaults, reading back from HW\n"); dev_warn(map->dev, "No cache defaults, reading back from HW\n");
/* Bypass the cache access till data read from HW*/ /* Bypass the cache access till data read from HW*/
map->cache_bypass = 1; map->cache_bypass = true;
tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
if (!tmp_buf) { if (!tmp_buf) {
ret = -ENOMEM; ret = -ENOMEM;
@ -285,9 +285,9 @@ static int regcache_default_sync(struct regmap *map, unsigned int min,
if (!regcache_reg_needs_sync(map, reg, val)) if (!regcache_reg_needs_sync(map, reg, val))
continue; continue;
map->cache_bypass = 1; map->cache_bypass = true;
ret = _regmap_write(map, reg, val); ret = _regmap_write(map, reg, val);
map->cache_bypass = 0; map->cache_bypass = false;
if (ret) { if (ret) {
dev_err(map->dev, "Unable to sync register %#x. %d\n", dev_err(map->dev, "Unable to sync register %#x. %d\n",
reg, ret); reg, ret);
@ -315,7 +315,7 @@ int regcache_sync(struct regmap *map)
int ret = 0; int ret = 0;
unsigned int i; unsigned int i;
const char *name; const char *name;
unsigned int bypass; bool bypass;
BUG_ON(!map->cache_ops); BUG_ON(!map->cache_ops);
@ -333,7 +333,7 @@ int regcache_sync(struct regmap *map)
map->async = true; map->async = true;
/* Apply any patch first */ /* Apply any patch first */
map->cache_bypass = 1; map->cache_bypass = true;
for (i = 0; i < map->patch_regs; i++) { for (i = 0; i < map->patch_regs; i++) {
ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def); ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
if (ret != 0) { if (ret != 0) {
@ -342,7 +342,7 @@ int regcache_sync(struct regmap *map)
goto out; goto out;
} }
} }
map->cache_bypass = 0; map->cache_bypass = false;
if (map->cache_ops->sync) if (map->cache_ops->sync)
ret = map->cache_ops->sync(map, 0, map->max_register); ret = map->cache_ops->sync(map, 0, map->max_register);
@ -384,7 +384,7 @@ int regcache_sync_region(struct regmap *map, unsigned int min,
{ {
int ret = 0; int ret = 0;
const char *name; const char *name;
unsigned int bypass; bool bypass;
BUG_ON(!map->cache_ops); BUG_ON(!map->cache_ops);
@ -637,11 +637,11 @@ static int regcache_sync_block_single(struct regmap *map, void *block,
if (!regcache_reg_needs_sync(map, regtmp, val)) if (!regcache_reg_needs_sync(map, regtmp, val))
continue; continue;
map->cache_bypass = 1; map->cache_bypass = true;
ret = _regmap_write(map, regtmp, val); ret = _regmap_write(map, regtmp, val);
map->cache_bypass = 0; map->cache_bypass = false;
if (ret != 0) { if (ret != 0) {
dev_err(map->dev, "Unable to sync register %#x. %d\n", dev_err(map->dev, "Unable to sync register %#x. %d\n",
regtmp, ret); regtmp, ret);
@ -668,14 +668,14 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n", dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
count * val_bytes, count, base, cur - map->reg_stride); count * val_bytes, count, base, cur - map->reg_stride);
map->cache_bypass = 1; map->cache_bypass = true;
ret = _regmap_raw_write(map, base, *data, count * val_bytes); ret = _regmap_raw_write(map, base, *data, count * val_bytes);
if (ret) if (ret)
dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n", dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n",
base, cur - map->reg_stride, ret); base, cur - map->reg_stride, ret);
map->cache_bypass = 0; map->cache_bypass = false;
*data = NULL; *data = NULL;

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@ -80,8 +80,8 @@ struct qca_data {
spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
u8 rx_ibs_state; /* HCI_IBS receive side power state */ u8 rx_ibs_state; /* HCI_IBS receive side power state */
u32 tx_vote; /* Clock must be on for TX */ bool tx_vote; /* Clock must be on for TX */
u32 rx_vote; /* Clock must be on for RX */ bool rx_vote; /* Clock must be on for RX */
struct timer_list tx_idle_timer; struct timer_list tx_idle_timer;
u32 tx_idle_delay; u32 tx_idle_delay;
struct timer_list wake_retrans_timer; struct timer_list wake_retrans_timer;

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@ -138,7 +138,7 @@ u16 amd_iommu_last_bdf; /* largest PCI device id we have
to handle */ to handle */
LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings
we find in ACPI */ we find in ACPI */
u32 amd_iommu_unmap_flush; /* if true, flush on every unmap */ bool amd_iommu_unmap_flush; /* if true, flush on every unmap */
LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
system */ system */

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@ -674,7 +674,7 @@ extern unsigned long *amd_iommu_pd_alloc_bitmap;
* If true, the addresses will be flushed on unmap time, not when * If true, the addresses will be flushed on unmap time, not when
* they are reused * they are reused
*/ */
extern u32 amd_iommu_unmap_flush; extern bool amd_iommu_unmap_flush;
/* Smallest max PASID supported by any IOMMU in the system */ /* Smallest max PASID supported by any IOMMU in the system */
extern u32 amd_iommu_max_pasid; extern u32 amd_iommu_max_pasid;

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@ -528,7 +528,7 @@ struct mei_device {
DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX);
unsigned long me_client_index; unsigned long me_client_index;
u32 allow_fixed_address; bool allow_fixed_address;
struct mei_cl wd_cl; struct mei_cl wd_cl;
enum mei_wd_states wd_state; enum mei_wd_states wd_state;

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@ -767,8 +767,8 @@ struct adapter {
bool tid_release_task_busy; bool tid_release_task_busy;
struct dentry *debugfs_root; struct dentry *debugfs_root;
u32 use_bd; /* Use SGE Back Door intfc for reading SGE Contexts */ bool use_bd; /* Use SGE Back Door intfc for reading SGE Contexts */
u32 trace_rss; /* 1 implies that different RSS flit per filter is bool trace_rss; /* 1 implies that different RSS flit per filter is
* used per filter else if 0 default RSS flit is * used per filter else if 0 default RSS flit is
* used for all 4 filters. * used for all 4 filters.
*/ */

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@ -680,7 +680,7 @@ struct ath10k {
bool monitor_started; bool monitor_started;
unsigned int filter_flags; unsigned int filter_flags;
unsigned long dev_flags; unsigned long dev_flags;
u32 dfs_block_radar_events; bool dfs_block_radar_events;
/* protected by conf_mutex */ /* protected by conf_mutex */
bool radar_enabled; bool radar_enabled;

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@ -1367,7 +1367,7 @@ struct ath5k_hw {
u8 ah_retry_long; u8 ah_retry_long;
u8 ah_retry_short; u8 ah_retry_short;
u32 ah_use_32khz_clock; bool ah_use_32khz_clock;
u8 ah_coverage_class; u8 ah_coverage_class;
bool ah_ack_bitrate_high; bool ah_ack_bitrate_high;

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@ -385,7 +385,7 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
ah->config.dma_beacon_response_time = 1; ah->config.dma_beacon_response_time = 1;
ah->config.sw_beacon_response_time = 6; ah->config.sw_beacon_response_time = 6;
ah->config.cwm_ignore_extcca = 0; ah->config.cwm_ignore_extcca = false;
ah->config.analog_shiftreg = 1; ah->config.analog_shiftreg = 1;
ah->config.rx_intr_mitigation = true; ah->config.rx_intr_mitigation = true;

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@ -332,14 +332,14 @@ enum ath9k_hw_hang_checks {
struct ath9k_ops_config { struct ath9k_ops_config {
int dma_beacon_response_time; int dma_beacon_response_time;
int sw_beacon_response_time; int sw_beacon_response_time;
u32 cwm_ignore_extcca; bool cwm_ignore_extcca;
u32 pcie_waen; u32 pcie_waen;
u8 analog_shiftreg; u8 analog_shiftreg;
u32 ofdm_trig_low; u32 ofdm_trig_low;
u32 ofdm_trig_high; u32 ofdm_trig_high;
u32 cck_trig_high; u32 cck_trig_high;
u32 cck_trig_low; u32 cck_trig_low;
u32 enable_paprd; bool enable_paprd;
int serialize_regmode; int serialize_regmode;
bool rx_intr_mitigation; bool rx_intr_mitigation;
bool tx_intr_mitigation; bool tx_intr_mitigation;

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@ -676,15 +676,15 @@ static void b43_add_dynamic_debug(struct b43_wldev *dev)
e->dyn_debug_dentries[id] = d; \ e->dyn_debug_dentries[id] = d; \
} while (0) } while (0)
add_dyn_dbg("debug_xmitpower", B43_DBG_XMITPOWER, 0); add_dyn_dbg("debug_xmitpower", B43_DBG_XMITPOWER, false);
add_dyn_dbg("debug_dmaoverflow", B43_DBG_DMAOVERFLOW, 0); add_dyn_dbg("debug_dmaoverflow", B43_DBG_DMAOVERFLOW, false);
add_dyn_dbg("debug_dmaverbose", B43_DBG_DMAVERBOSE, 0); add_dyn_dbg("debug_dmaverbose", B43_DBG_DMAVERBOSE, false);
add_dyn_dbg("debug_pwork_fast", B43_DBG_PWORK_FAST, 0); add_dyn_dbg("debug_pwork_fast", B43_DBG_PWORK_FAST, false);
add_dyn_dbg("debug_pwork_stop", B43_DBG_PWORK_STOP, 0); add_dyn_dbg("debug_pwork_stop", B43_DBG_PWORK_STOP, false);
add_dyn_dbg("debug_lo", B43_DBG_LO, 0); add_dyn_dbg("debug_lo", B43_DBG_LO, false);
add_dyn_dbg("debug_firmware", B43_DBG_FIRMWARE, 0); add_dyn_dbg("debug_firmware", B43_DBG_FIRMWARE, false);
add_dyn_dbg("debug_keys", B43_DBG_KEYS, 0); add_dyn_dbg("debug_keys", B43_DBG_KEYS, false);
add_dyn_dbg("debug_verbose_stats", B43_DBG_VERBOSESTATS, 0); add_dyn_dbg("debug_verbose_stats", B43_DBG_VERBOSESTATS, false);
#undef add_dyn_dbg #undef add_dyn_dbg
} }

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@ -68,7 +68,7 @@ struct b43_dfsentry {
u32 shm32read_addr_next; u32 shm32read_addr_next;
/* Enabled/Disabled list for the dynamic debugging features. */ /* Enabled/Disabled list for the dynamic debugging features. */
u32 dyn_debug[__B43_NR_DYNDBG]; bool dyn_debug[__B43_NR_DYNDBG];
/* Dentries for the dynamic debugging entries. */ /* Dentries for the dynamic debugging entries. */
struct dentry *dyn_debug_dentries[__B43_NR_DYNDBG]; struct dentry *dyn_debug_dentries[__B43_NR_DYNDBG];
}; };

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@ -369,11 +369,11 @@ static void b43legacy_add_dynamic_debug(struct b43legacy_wldev *dev)
e->dyn_debug_dentries[id] = d; \ e->dyn_debug_dentries[id] = d; \
} while (0) } while (0)
add_dyn_dbg("debug_xmitpower", B43legacy_DBG_XMITPOWER, 0); add_dyn_dbg("debug_xmitpower", B43legacy_DBG_XMITPOWER, false);
add_dyn_dbg("debug_dmaoverflow", B43legacy_DBG_DMAOVERFLOW, 0); add_dyn_dbg("debug_dmaoverflow", B43legacy_DBG_DMAOVERFLOW, false);
add_dyn_dbg("debug_dmaverbose", B43legacy_DBG_DMAVERBOSE, 0); add_dyn_dbg("debug_dmaverbose", B43legacy_DBG_DMAVERBOSE, false);
add_dyn_dbg("debug_pwork_fast", B43legacy_DBG_PWORK_FAST, 0); add_dyn_dbg("debug_pwork_fast", B43legacy_DBG_PWORK_FAST, false);
add_dyn_dbg("debug_pwork_stop", B43legacy_DBG_PWORK_STOP, 0); add_dyn_dbg("debug_pwork_stop", B43legacy_DBG_PWORK_STOP, false);
#undef add_dyn_dbg #undef add_dyn_dbg
} }

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@ -47,7 +47,7 @@ struct b43legacy_dfsentry {
struct b43legacy_txstatus_log txstatlog; struct b43legacy_txstatus_log txstatlog;
/* Enabled/Disabled list for the dynamic debugging features. */ /* Enabled/Disabled list for the dynamic debugging features. */
u32 dyn_debug[__B43legacy_NR_DYNDBG]; bool dyn_debug[__B43legacy_NR_DYNDBG];
/* Dentries for the dynamic debugging entries. */ /* Dentries for the dynamic debugging entries. */
struct dentry *dyn_debug_dentries[__B43legacy_NR_DYNDBG]; struct dentry *dyn_debug_dentries[__B43legacy_NR_DYNDBG];
}; };

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@ -1425,9 +1425,9 @@ struct il_priv {
#endif /* CONFIG_IWLEGACY_DEBUGFS */ #endif /* CONFIG_IWLEGACY_DEBUGFS */
struct work_struct txpower_work; struct work_struct txpower_work;
u32 disable_sens_cal; bool disable_sens_cal;
u32 disable_chain_noise_cal; bool disable_chain_noise_cal;
u32 disable_tx_power_cal; bool disable_tx_power_cal;
struct work_struct run_time_calib_work; struct work_struct run_time_calib_work;
struct timer_list stats_periodic; struct timer_list stats_periodic;
struct timer_list watchdog; struct timer_list watchdog;

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@ -649,7 +649,7 @@ struct iwl_mvm {
const struct iwl_fw_bcast_filter *bcast_filters; const struct iwl_fw_bcast_filter *bcast_filters;
#ifdef CONFIG_IWLWIFI_DEBUGFS #ifdef CONFIG_IWLWIFI_DEBUGFS
struct { struct {
u32 override; /* u32 for debugfs_create_bool */ bool override;
struct iwl_bcast_filter_cmd cmd; struct iwl_bcast_filter_cmd cmd;
} dbgfs_bcast_filtering; } dbgfs_bcast_filtering;
#endif #endif
@ -673,7 +673,7 @@ struct iwl_mvm {
bool disable_power_off; bool disable_power_off;
bool disable_power_off_d3; bool disable_power_off_d3;
u32 scan_iter_notif_enabled; /* must be u32 for debugfs_create_bool */ bool scan_iter_notif_enabled;
struct debugfs_blob_wrapper nvm_hw_blob; struct debugfs_blob_wrapper nvm_hw_blob;
struct debugfs_blob_wrapper nvm_sw_blob; struct debugfs_blob_wrapper nvm_sw_blob;
@ -729,7 +729,7 @@ struct iwl_mvm {
int n_nd_channels; int n_nd_channels;
bool net_detect; bool net_detect;
#ifdef CONFIG_IWLWIFI_DEBUGFS #ifdef CONFIG_IWLWIFI_DEBUGFS
u32 d3_wake_sysassert; /* must be u32 for debugfs_create_bool */ bool d3_wake_sysassert;
bool d3_test_active; bool d3_test_active;
bool store_d3_resume_sram; bool store_d3_resume_sram;
void *d3_resume_sram; void *d3_resume_sram;

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@ -148,7 +148,7 @@ snic_trc_init(void)
trc->max_idx = (tbuf_sz / SNIC_TRC_ENTRY_SZ); trc->max_idx = (tbuf_sz / SNIC_TRC_ENTRY_SZ);
trc->rd_idx = trc->wr_idx = 0; trc->rd_idx = trc->wr_idx = 0;
trc->enable = 1; trc->enable = true;
SNIC_INFO("Trace Facility Enabled.\n Trace Buffer SZ %lu Pages.\n", SNIC_INFO("Trace Facility Enabled.\n Trace Buffer SZ %lu Pages.\n",
tbuf_sz / PAGE_SIZE); tbuf_sz / PAGE_SIZE);
ret = 0; ret = 0;
@ -169,7 +169,7 @@ snic_trc_free(void)
{ {
struct snic_trc *trc = &snic_glob->trc; struct snic_trc *trc = &snic_glob->trc;
trc->enable = 0; trc->enable = false;
snic_trc_debugfs_term(); snic_trc_debugfs_term();
if (trc->buf) { if (trc->buf) {

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@ -45,7 +45,7 @@ struct snic_trc {
u32 max_idx; /* Max Index into trace buffer */ u32 max_idx; /* Max Index into trace buffer */
u32 rd_idx; u32 rd_idx;
u32 wr_idx; u32 wr_idx;
u32 enable; /* Control Variable for Tracing */ bool enable; /* Control Variable for Tracing */
struct dentry *trc_enable; /* debugfs file object */ struct dentry *trc_enable; /* debugfs file object */
struct dentry *trc_file; struct dentry *trc_file;

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@ -55,7 +55,7 @@
struct uwb_dbg { struct uwb_dbg {
struct uwb_pal pal; struct uwb_pal pal;
u32 accept; bool accept;
struct list_head rsvs; struct list_head rsvs;
struct dentry *root_d; struct dentry *root_d;

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@ -439,7 +439,7 @@ ssize_t debugfs_read_file_bool(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos) size_t count, loff_t *ppos)
{ {
char buf[3]; char buf[3];
u32 *val = file->private_data; bool *val = file->private_data;
if (*val) if (*val)
buf[0] = 'Y'; buf[0] = 'Y';
@ -457,7 +457,7 @@ ssize_t debugfs_write_file_bool(struct file *file, const char __user *user_buf,
char buf[32]; char buf[32];
size_t buf_size; size_t buf_size;
bool bv; bool bv;
u32 *val = file->private_data; bool *val = file->private_data;
buf_size = min(count, (sizeof(buf)-1)); buf_size = min(count, (sizeof(buf)-1));
if (copy_from_user(buf, user_buf, buf_size)) if (copy_from_user(buf, user_buf, buf_size))
@ -503,7 +503,7 @@ static const struct file_operations fops_bool = {
* code. * code.
*/ */
struct dentry *debugfs_create_bool(const char *name, umode_t mode, struct dentry *debugfs_create_bool(const char *name, umode_t mode,
struct dentry *parent, u32 *value) struct dentry *parent, bool *value)
{ {
return debugfs_create_file(name, mode, parent, value, &fops_bool); return debugfs_create_file(name, mode, parent, value, &fops_bool);
} }

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@ -92,7 +92,7 @@ struct dentry *debugfs_create_size_t(const char *name, umode_t mode,
struct dentry *debugfs_create_atomic_t(const char *name, umode_t mode, struct dentry *debugfs_create_atomic_t(const char *name, umode_t mode,
struct dentry *parent, atomic_t *value); struct dentry *parent, atomic_t *value);
struct dentry *debugfs_create_bool(const char *name, umode_t mode, struct dentry *debugfs_create_bool(const char *name, umode_t mode,
struct dentry *parent, u32 *value); struct dentry *parent, bool *value);
struct dentry *debugfs_create_blob(const char *name, umode_t mode, struct dentry *debugfs_create_blob(const char *name, umode_t mode,
struct dentry *parent, struct dentry *parent,
@ -243,7 +243,7 @@ static inline struct dentry *debugfs_create_atomic_t(const char *name, umode_t m
static inline struct dentry *debugfs_create_bool(const char *name, umode_t mode, static inline struct dentry *debugfs_create_bool(const char *name, umode_t mode,
struct dentry *parent, struct dentry *parent,
u32 *value) bool *value)
{ {
return ERR_PTR(-ENODEV); return ERR_PTR(-ENODEV);
} }

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@ -772,7 +772,7 @@ struct mem_ctl_info {
#ifdef CONFIG_EDAC_DEBUG #ifdef CONFIG_EDAC_DEBUG
struct dentry *debugfs; struct dentry *debugfs;
u8 fake_inject_layer[EDAC_MAX_LAYERS]; u8 fake_inject_layer[EDAC_MAX_LAYERS];
u32 fake_inject_ue; bool fake_inject_ue;
u16 fake_inject_count; u16 fake_inject_count;
#endif #endif
}; };

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@ -18,7 +18,7 @@ struct fault_attr {
atomic_t times; atomic_t times;
atomic_t space; atomic_t space;
unsigned long verbose; unsigned long verbose;
u32 task_filter; bool task_filter;
unsigned long stacktrace_depth; unsigned long stacktrace_depth;
unsigned long require_start; unsigned long require_start;
unsigned long require_end; unsigned long require_end;

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@ -267,10 +267,10 @@ static struct futex_hash_bucket *futex_queues;
static struct { static struct {
struct fault_attr attr; struct fault_attr attr;
u32 ignore_private; bool ignore_private;
} fail_futex = { } fail_futex = {
.attr = FAULT_ATTR_INITIALIZER, .attr = FAULT_ATTR_INITIALIZER,
.ignore_private = 0, .ignore_private = false,
}; };
static int __init setup_fail_futex(char *str) static int __init setup_fail_futex(char *str)

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@ -100,7 +100,7 @@ static LIST_HEAD(free_entries);
static DEFINE_SPINLOCK(free_entries_lock); static DEFINE_SPINLOCK(free_entries_lock);
/* Global disable flag - will be set in case of an error */ /* Global disable flag - will be set in case of an error */
static u32 global_disable __read_mostly; static bool global_disable __read_mostly;
/* Early initialization disable flag, set at the end of dma_debug_init */ /* Early initialization disable flag, set at the end of dma_debug_init */
static bool dma_debug_initialized __read_mostly; static bool dma_debug_initialized __read_mostly;

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@ -3,12 +3,12 @@
static struct { static struct {
struct fault_attr attr; struct fault_attr attr;
u32 ignore_gfp_wait; bool ignore_gfp_wait;
int cache_filter; bool cache_filter;
} failslab = { } failslab = {
.attr = FAULT_ATTR_INITIALIZER, .attr = FAULT_ATTR_INITIALIZER,
.ignore_gfp_wait = 1, .ignore_gfp_wait = true,
.cache_filter = 0, .cache_filter = false,
}; };
bool should_failslab(size_t size, gfp_t gfpflags, unsigned long cache_flags) bool should_failslab(size_t size, gfp_t gfpflags, unsigned long cache_flags)

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@ -2159,13 +2159,13 @@ failed:
static struct { static struct {
struct fault_attr attr; struct fault_attr attr;
u32 ignore_gfp_highmem; bool ignore_gfp_highmem;
u32 ignore_gfp_wait; bool ignore_gfp_wait;
u32 min_order; u32 min_order;
} fail_page_alloc = { } fail_page_alloc = {
.attr = FAULT_ATTR_INITIALIZER, .attr = FAULT_ATTR_INITIALIZER,
.ignore_gfp_wait = 1, .ignore_gfp_wait = true,
.ignore_gfp_highmem = 1, .ignore_gfp_highmem = true,
.min_order = 1, .min_order = 1,
}; };

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@ -53,7 +53,7 @@ struct wm_adsp {
int fw; int fw;
int fw_ver; int fw_ver;
u32 running; bool running;
struct list_head ctl_list; struct list_head ctl_list;