Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "Another few ARM fixes. Fabrice fixed the L2 cache DT parsing to allow prefetch configuration to be specified even when the cache size parsing fails. Laura noticed that the setting of page attributes wasn't working for modules due to is_module_addr() always returning false. Marc Gonzalez (aka Mason) noticed a potential latent bug with the way we read one of the CPUID registers (where we could attempt to read a non-present CPUID register which may fault.) I've fixed an issue where 32-bit DMA masks were failing with memory which extended to the top of physical address space, and I've also added debugging output of the page tables when we hit a data access exception which we don't specifically handle - prompted by the lack of information in a bug report" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8313/1: Use read_cpuid_ext() macro instead of inline asm ARM: 8311/1: Don't use is_module_addr in setting page attributes ARM: 8310/1: l2c: Fix prefetch settings dt parsing ARM: dump pgd, pmd and pte states on unhandled data abort faults ARM: dma-api: fix off-by-one error in __dma_supported()
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commit
62a202d749
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@ -246,12 +246,9 @@ static int __get_cpu_architecture(void)
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if (cpu_arch)
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cpu_arch += CPU_ARCH_ARMv3;
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} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
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unsigned int mmfr0;
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/* Revised CPUID format. Read the Memory Model Feature
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* Register 0 and check for VMSAv7 or PMSAv7 */
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asm("mrc p15, 0, %0, c0, c1, 4"
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: "=r" (mmfr0));
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unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
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if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
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(mmfr0 & 0x000000f0) >= 0x00000030)
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cpu_arch = CPU_ARCH_ARMv7;
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@ -1131,23 +1131,22 @@ static void __init l2c310_of_parse(const struct device_node *np,
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}
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ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
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if (ret)
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return;
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switch (assoc) {
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case 16:
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*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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*aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16;
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*aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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break;
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case 8:
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*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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*aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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break;
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default:
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pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
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assoc);
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break;
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if (!ret) {
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switch (assoc) {
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case 16:
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*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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*aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16;
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*aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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break;
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case 8:
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*aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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*aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
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break;
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default:
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pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
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assoc);
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break;
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}
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}
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prefetch = l2x0_saved_regs.prefetch_ctrl;
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@ -171,7 +171,7 @@ static int __dma_supported(struct device *dev, u64 mask, bool warn)
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*/
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if (sizeof(mask) != sizeof(dma_addr_t) &&
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mask > (dma_addr_t)~0 &&
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dma_to_pfn(dev, ~0) < max_pfn) {
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dma_to_pfn(dev, ~0) < max_pfn - 1) {
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if (warn) {
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dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
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mask);
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@ -552,6 +552,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n",
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inf->name, fsr, addr);
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show_pte(current->mm, addr);
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info.si_signo = inf->sig;
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info.si_errno = 0;
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@ -49,7 +49,10 @@ static int change_memory_common(unsigned long addr, int numpages,
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WARN_ON_ONCE(1);
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}
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if (!is_module_address(start) || !is_module_address(end - 1))
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if (start < MODULES_VADDR || start >= MODULES_END)
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return -EINVAL;
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if (end < MODULES_VADDR || start >= MODULES_END)
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return -EINVAL;
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data.set_mask = set_mask;
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