drm/i915: Remove superfluous powersave work flushing
Instead of flushing the outstanding enabling, remember the requested frequency to apply when the powersave work runs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-6-git-send-email-chris@chris-wilson.co.uk
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@ -1205,8 +1205,6 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
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intel_runtime_pm_get(dev_priv);
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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if (IS_GEN5(dev)) {
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u16 rgvswctl = I915_READ16(MEMSWCTL);
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u16 rgvstat = I915_READ16(MEMSTAT_ILK);
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@ -1898,8 +1896,6 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
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intel_runtime_pm_get(dev_priv);
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
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if (ret)
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goto out;
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@ -4952,20 +4948,11 @@ i915_max_freq_get(void *data, u64 *val)
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{
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struct drm_device *dev = data;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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if (INTEL_INFO(dev)->gen < 6)
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return -ENODEV;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
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if (ret)
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return ret;
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*val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
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mutex_unlock(&dev_priv->rps.hw_lock);
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return 0;
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}
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@ -4980,8 +4967,6 @@ i915_max_freq_set(void *data, u64 val)
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if (INTEL_INFO(dev)->gen < 6)
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return -ENODEV;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
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ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
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@ -5019,20 +5004,11 @@ i915_min_freq_get(void *data, u64 *val)
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{
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struct drm_device *dev = data;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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if (INTEL_INFO(dev)->gen < 6)
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if (INTEL_GEN(dev_priv) < 6)
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return -ENODEV;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
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if (ret)
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return ret;
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*val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
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mutex_unlock(&dev_priv->rps.hw_lock);
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return 0;
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}
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@ -5044,11 +5020,9 @@ i915_min_freq_set(void *data, u64 val)
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u32 hw_max, hw_min;
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int ret;
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if (INTEL_INFO(dev)->gen < 6)
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if (INTEL_GEN(dev_priv) < 6)
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return -ENODEV;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
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ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
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@ -271,8 +271,6 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev,
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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intel_runtime_pm_get(dev_priv);
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mutex_lock(&dev_priv->rps.hw_lock);
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@ -303,19 +301,10 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
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struct drm_minor *minor = dev_to_drm_minor(kdev);
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struct drm_device *dev = minor->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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intel_runtime_pm_get(dev_priv);
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mutex_lock(&dev_priv->rps.hw_lock);
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ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq);
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mutex_unlock(&dev_priv->rps.hw_lock);
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intel_runtime_pm_put(dev_priv);
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return snprintf(buf, PAGE_SIZE, "%d\n", ret);
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return snprintf(buf, PAGE_SIZE, "%d\n",
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intel_gpu_freq(dev_priv,
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dev_priv->rps.cur_freq));
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}
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static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
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@ -324,7 +313,8 @@ static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribu
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struct drm_i915_private *dev_priv = to_i915(minor->dev);
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return snprintf(buf, PAGE_SIZE, "%d\n",
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intel_gpu_freq(dev_priv, dev_priv->rps.boost_freq));
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intel_gpu_freq(dev_priv,
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dev_priv->rps.boost_freq));
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}
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static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
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@ -360,9 +350,9 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
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struct drm_device *dev = minor->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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return snprintf(buf, PAGE_SIZE,
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"%d\n",
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intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));
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return snprintf(buf, PAGE_SIZE, "%d\n",
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intel_gpu_freq(dev_priv,
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dev_priv->rps.efficient_freq));
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}
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static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
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@ -370,15 +360,10 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute
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struct drm_minor *minor = dev_to_drm_minor(kdev);
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struct drm_device *dev = minor->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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mutex_lock(&dev_priv->rps.hw_lock);
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ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
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mutex_unlock(&dev_priv->rps.hw_lock);
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return snprintf(buf, PAGE_SIZE, "%d\n", ret);
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return snprintf(buf, PAGE_SIZE, "%d\n",
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intel_gpu_freq(dev_priv,
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dev_priv->rps.max_freq_softlimit));
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}
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static ssize_t gt_max_freq_mhz_store(struct device *kdev,
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@ -395,8 +380,6 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev,
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if (ret)
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return ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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intel_runtime_pm_get(dev_priv);
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mutex_lock(&dev_priv->rps.hw_lock);
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@ -438,15 +421,10 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute
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struct drm_minor *minor = dev_to_drm_minor(kdev);
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struct drm_device *dev = minor->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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mutex_lock(&dev_priv->rps.hw_lock);
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ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
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mutex_unlock(&dev_priv->rps.hw_lock);
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return snprintf(buf, PAGE_SIZE, "%d\n", ret);
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return snprintf(buf, PAGE_SIZE, "%d\n",
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intel_gpu_freq(dev_priv,
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dev_priv->rps.min_freq_softlimit));
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}
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static ssize_t gt_min_freq_mhz_store(struct device *kdev,
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if (ret)
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return ret;
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flush_delayed_work(&dev_priv->rps.delayed_resume_work);
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intel_runtime_pm_get(dev_priv);
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mutex_lock(&dev_priv->rps.hw_lock);
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