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drm/gma500: Rename psb_intel_crtc to gma_crtc

Browse source 
The psb_intel_crtc is generic and should be named appropriately

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
This commit is contained in:
Patrik Jakobsson 2013-07-22 01:31:23 +02:00
parent c5c81f4e1b
commit 6306865daf
15 changed files with 170 additions and 181 deletions
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7
drivers/gpu/drm/gma500/cdv_intel_crt.c
View file

@ -95,13 +95,12 @@ static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
struct drm_device *dev = encoder->dev;
struct drm_crtc *crtc = encoder->crtc;
struct psb_intel_crtc *psb_intel_crtc =
to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int dpll_md_reg;
u32 adpa, dpll_md;
u32 adpa_reg;
if (psb_intel_crtc->pipe == 0)
if (gma_crtc->pipe == 0)
dpll_md_reg = DPLL_A_MD;
else
dpll_md_reg = DPLL_B_MD;
@ -124,7 +123,7 @@ static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
adpa |= ADPA_VSYNC_ACTIVE_HIGH;
if (psb_intel_crtc->pipe == 0)
if (gma_crtc->pipe == 0)
adpa |= ADPA_PIPE_A_SELECT;
else
adpa |= ADPA_PIPE_B_SELECT;

28
drivers/gpu/drm/gma500/cdv_intel_display.c
View file

@ -222,8 +222,8 @@ static int
cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,
struct gma_clock_t *clock, bool is_lvds, u32 ddi_select)
{
struct psb_intel_crtc *psb_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
u32 m, n_vco, p;
int ret = 0;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
@ -458,12 +458,12 @@ static bool cdv_intel_pipe_enabled(struct drm_device *dev, int pipe)
{
struct drm_crtc *crtc;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = NULL;
struct gma_crtc *gma_crtc = NULL;
crtc = dev_priv->pipe_to_crtc_mapping[pipe];
psb_intel_crtc = to_psb_intel_crtc(crtc);
gma_crtc = to_gma_crtc(crtc);
if (crtc->fb == NULL || !psb_intel_crtc->active)
if (crtc->fb == NULL || !gma_crtc->active)
return false;
return true;
}
@ -489,11 +489,11 @@ static bool cdv_intel_single_pipe_active (struct drm_device *dev)
static bool is_pipeb_lvds(struct drm_device *dev, struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct drm_mode_config *mode_config = &dev->mode_config;
struct drm_connector *connector;
if (psb_intel_crtc->pipe != 1)
if (gma_crtc->pipe != 1)
return false;
list_for_each_entry(connector, &mode_config->connector_list, head) {
@ -616,8 +616,8 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
int refclk;
struct gma_clock_t clock;
@ -693,7 +693,7 @@ static int cdv_intel_crtc_mode_set(struct drm_crtc *crtc,
drm_mode_debug_printmodeline(adjusted_mode);
limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
limit = gma_crtc->clock_funcs->limit(crtc, refclk);
ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
&clock);
@ -883,8 +883,8 @@ static int cdv_intel_crtc_clock_get(struct drm_device *dev,
struct drm_crtc *crtc)
{
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 dpll;
u32 fp;
@ -961,8 +961,8 @@ static int cdv_intel_crtc_clock_get(struct drm_device *dev,
struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_pipe *p = &dev_priv->regs.pipe[pipe];
const struct psb_offset *map = &dev_priv->regmap[pipe];

10
drivers/gpu/drm/gma500/cdv_intel_dp.c
View file

@ -793,10 +793,10 @@ cdv_intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
struct drm_psb_private *dev_priv = dev->dev_private;
struct drm_mode_config *mode_config = &dev->mode_config;
struct drm_encoder *encoder;
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int lane_count = 4, bpp = 24;
struct cdv_intel_dp_m_n m_n;
int pipe = intel_crtc->pipe;
int pipe = gma_crtc->pipe;
/*
* Find the lane count in the intel_encoder private
@ -844,7 +844,7 @@ cdv_intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode
{
struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
struct drm_crtc *crtc = encoder->crtc;
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
struct drm_device *dev = encoder->dev;
@ -886,7 +886,7 @@ cdv_intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode
}
/* CPT DP's pipe select is decided in TRANS_DP_CTL */
if (intel_crtc->pipe == 1)
if (gma_crtc->pipe == 1)
intel_dp->DP |= DP_PIPEB_SELECT;
REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN));
@ -901,7 +901,7 @@ cdv_intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode
else
pfit_control = 0;
pfit_control |= intel_crtc->pipe << PFIT_PIPE_SHIFT;
pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
REG_WRITE(PFIT_CONTROL, pfit_control);
}

6
drivers/gpu/drm/gma500/cdv_intel_hdmi.c
View file

@ -68,7 +68,7 @@ static void cdv_hdmi_mode_set(struct drm_encoder *encoder,
struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
u32 hdmib;
struct drm_crtc *crtc = encoder->crtc;
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
hdmib = (2 << 10);
@ -77,7 +77,7 @@ static void cdv_hdmi_mode_set(struct drm_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
hdmib |= HDMI_HSYNC_ACTIVE_HIGH;
if (intel_crtc->pipe == 1)
if (gma_crtc->pipe == 1)
hdmib |= HDMIB_PIPE_B_SELECT;
if (hdmi_priv->has_hdmi_audio) {
@ -167,7 +167,7 @@ static int cdv_hdmi_set_property(struct drm_connector *connector,
struct drm_encoder *encoder = connector->encoder;
if (!strcmp(property->name, "scaling mode") && encoder) {
struct psb_intel_crtc *crtc = to_psb_intel_crtc(encoder->crtc);
struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
bool centre;
uint64_t curValue;

8
drivers/gpu/drm/gma500/cdv_intel_lvds.c
View file

@ -356,8 +356,7 @@ static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
{
struct drm_device *dev = encoder->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(
encoder->crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
u32 pfit_control;
/*
@ -379,7 +378,7 @@ static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
else
pfit_control = 0;
pfit_control |= psb_intel_crtc->pipe << PFIT_PIPE_SHIFT;
pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
if (dev_priv->lvds_dither)
pfit_control |= PANEL_8TO6_DITHER_ENABLE;
@ -461,8 +460,7 @@ static int cdv_intel_lvds_set_property(struct drm_connector *connector,
struct drm_encoder *encoder = connector->encoder;
if (!strcmp(property->name, "scaling mode") && encoder) {
struct psb_intel_crtc *crtc =
to_psb_intel_crtc(encoder->crtc);
struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
uint64_t curValue;
if (!crtc)

16
drivers/gpu/drm/gma500/framebuffer.c
View file

@ -520,21 +520,21 @@ static struct drm_framebuffer *psb_user_framebuffer_create
static void psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
u16 blue, int regno)
{
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
intel_crtc->lut_r[regno] = red >> 8;
intel_crtc->lut_g[regno] = green >> 8;
intel_crtc->lut_b[regno] = blue >> 8;
gma_crtc->lut_r[regno] = red >> 8;
gma_crtc->lut_g[regno] = green >> 8;
gma_crtc->lut_b[regno] = blue >> 8;
}
static void psbfb_gamma_get(struct drm_crtc *crtc, u16 *red,
u16 *green, u16 *blue, int regno)
{
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
*red = intel_crtc->lut_r[regno] << 8;
*green = intel_crtc->lut_g[regno] << 8;
*blue = intel_crtc->lut_b[regno] << 8;
*red = gma_crtc->lut_r[regno] << 8;
*green = gma_crtc->lut_g[regno] << 8;
*blue = gma_crtc->lut_b[regno] << 8;
}
static int psbfb_probe(struct drm_fb_helper *helper,

105
drivers/gpu/drm/gma500/gma_display.c
View file

@ -58,9 +58,9 @@ int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
unsigned long start, offset;
u32 dspcntr;
@ -140,8 +140,8 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
int palreg = map->palette;
int i;
@ -152,24 +152,24 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
if (gma_power_begin(dev, false)) {
for (i = 0; i < 256; i++) {
REG_WRITE(palreg + 4 * i,
((psb_intel_crtc->lut_r[i] +
psb_intel_crtc->lut_adj[i]) << 16) |
((psb_intel_crtc->lut_g[i] +
psb_intel_crtc->lut_adj[i]) << 8) |
(psb_intel_crtc->lut_b[i] +
psb_intel_crtc->lut_adj[i]));
((gma_crtc->lut_r[i] +
gma_crtc->lut_adj[i]) << 16) |
((gma_crtc->lut_g[i] +
gma_crtc->lut_adj[i]) << 8) |
(gma_crtc->lut_b[i] +
gma_crtc->lut_adj[i]));
}
gma_power_end(dev);
} else {
for (i = 0; i < 256; i++) {
/* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
dev_priv->regs.pipe[0].palette[i] =
((psb_intel_crtc->lut_r[i] +
psb_intel_crtc->lut_adj[i]) << 16) |
((psb_intel_crtc->lut_g[i] +
psb_intel_crtc->lut_adj[i]) << 8) |
(psb_intel_crtc->lut_b[i] +
psb_intel_crtc->lut_adj[i]);
((gma_crtc->lut_r[i] +
gma_crtc->lut_adj[i]) << 16) |
((gma_crtc->lut_g[i] +
gma_crtc->lut_adj[i]) << 8) |
(gma_crtc->lut_b[i] +
gma_crtc->lut_adj[i]);
}
}
@ -178,14 +178,14 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
void gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue,
u32 start, u32 size)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int i;
int end = (start + size > 256) ? 256 : start + size;
for (i = start; i < end; i++) {
psb_intel_crtc->lut_r[i] = red[i] >> 8;
psb_intel_crtc->lut_g[i] = green[i] >> 8;
psb_intel_crtc->lut_b[i] = blue[i] >> 8;
gma_crtc->lut_r[i] = red[i] >> 8;
gma_crtc->lut_g[i] = green[i] >> 8;
gma_crtc->lut_b[i] = blue[i] >> 8;
}
gma_crtc_load_lut(crtc);
@ -201,8 +201,8 @@ void gma_crtc_dpms(struct drm_crtc *crtc, int mode)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 temp;
@ -217,10 +217,10 @@ void gma_crtc_dpms(struct drm_crtc *crtc, int mode)
case DRM_MODE_DPMS_ON:
case DRM_MODE_DPMS_STANDBY:
case DRM_MODE_DPMS_SUSPEND:
if (psb_intel_crtc->active)
if (gma_crtc->active)
break;
psb_intel_crtc->active = true;
gma_crtc->active = true;
/* Enable the DPLL */
temp = REG_READ(map->dpll);
@ -268,10 +268,10 @@ void gma_crtc_dpms(struct drm_crtc *crtc, int mode)
/* psb_intel_crtc_dpms_video(crtc, true); TODO */
break;
case DRM_MODE_DPMS_OFF:
if (!psb_intel_crtc->active)
if (!gma_crtc->active)
break;
psb_intel_crtc->active = false;
gma_crtc->active = false;
/* Give the overlay scaler a chance to disable
* if it's on this pipe */
@ -334,14 +334,14 @@ int gma_crtc_cursor_set(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
uint32_t temp;
size_t addr = 0;
struct gtt_range *gt;
struct gtt_range *cursor_gt = psb_intel_crtc->cursor_gt;
struct gtt_range *cursor_gt = gma_crtc->cursor_gt;
struct drm_gem_object *obj;
void *tmp_dst, *tmp_src;
int ret = 0, i, cursor_pages;
@ -357,12 +357,12 @@ int gma_crtc_cursor_set(struct drm_crtc *crtc,
}
/* Unpin the old GEM object */
if (psb_intel_crtc->cursor_obj) {
gt = container_of(psb_intel_crtc->cursor_obj,
if (gma_crtc->cursor_obj) {
gt = container_of(gma_crtc->cursor_obj,
struct gtt_range, gem);
psb_gtt_unpin(gt);
drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
psb_intel_crtc->cursor_obj = NULL;
drm_gem_object_unreference(gma_crtc->cursor_obj);
gma_crtc->cursor_obj = NULL;
}
return 0;
@ -415,10 +415,10 @@ int gma_crtc_cursor_set(struct drm_crtc *crtc,
tmp_dst += PAGE_SIZE;
}
addr = psb_intel_crtc->cursor_addr;
addr = gma_crtc->cursor_addr;
} else {
addr = gt->offset;
psb_intel_crtc->cursor_addr = addr;
gma_crtc->cursor_addr = addr;
}
temp = 0;
@ -433,14 +433,13 @@ int gma_crtc_cursor_set(struct drm_crtc *crtc,
}
/* unpin the old bo */
if (psb_intel_crtc->cursor_obj) {
gt = container_of(psb_intel_crtc->cursor_obj,
struct gtt_range, gem);
if (gma_crtc->cursor_obj) {
gt = container_of(gma_crtc->cursor_obj, struct gtt_range, gem);
psb_gtt_unpin(gt);
drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
drm_gem_object_unreference(gma_crtc->cursor_obj);
}
psb_intel_crtc->cursor_obj = obj;
gma_crtc->cursor_obj = obj;
return ret;
unref_cursor:
@ -451,8 +450,8 @@ unref_cursor:
int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
{
struct drm_device *dev = crtc->dev;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
uint32_t temp = 0;
uint32_t addr;
@ -468,7 +467,7 @@ int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
addr = psb_intel_crtc->cursor_addr;
addr = gma_crtc->cursor_addr;
if (gma_power_begin(dev, false)) {
REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
@ -512,11 +511,11 @@ void gma_crtc_disable(struct drm_crtc *crtc)
void gma_crtc_destroy(struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
kfree(psb_intel_crtc->crtc_state);
kfree(gma_crtc->crtc_state);
drm_crtc_cleanup(crtc);
kfree(psb_intel_crtc);
kfree(gma_crtc);
}
int gma_crtc_set_config(struct drm_mode_set *set)
@ -542,9 +541,9 @@ void gma_crtc_save(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;
const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
uint32_t palette_reg;
int i;
@ -585,9 +584,9 @@ void gma_crtc_restore(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;
const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
uint32_t palette_reg;
int i;
@ -720,7 +719,7 @@ bool gma_find_best_pll(const struct gma_limit_t *limit,
{
struct drm_device *dev = crtc->dev;
const struct gma_clock_funcs *clock_funcs =
to_psb_intel_crtc(crtc)->clock_funcs;
to_gma_crtc(crtc)->clock_funcs;
struct gma_clock_t clock;
int err = target;

15
drivers/gpu/drm/gma500/mdfld_dsi_output.c
View file

@ -249,12 +249,11 @@ static int mdfld_dsi_connector_set_property(struct drm_connector *connector,
struct drm_encoder *encoder = connector->encoder;
if (!strcmp(property->name, "scaling mode") && encoder) {
struct psb_intel_crtc *psb_crtc =
to_psb_intel_crtc(encoder->crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
bool centerechange;
uint64_t val;
if (!psb_crtc)
if (!gma_crtc)
goto set_prop_error;
switch (value) {
@ -281,11 +280,11 @@ static int mdfld_dsi_connector_set_property(struct drm_connector *connector,
centerechange = (val == DRM_MODE_SCALE_NO_SCALE) ||
(value == DRM_MODE_SCALE_NO_SCALE);
if (psb_crtc->saved_mode.hdisplay != 0 &&
psb_crtc->saved_mode.vdisplay != 0) {
if (gma_crtc->saved_mode.hdisplay != 0 &&
gma_crtc->saved_mode.vdisplay != 0) {
if (centerechange) {
if (!drm_crtc_helper_set_mode(encoder->crtc,
&psb_crtc->saved_mode,
&gma_crtc->saved_mode,
encoder->crtc->x,
encoder->crtc->y,
encoder->crtc->fb))
@ -294,8 +293,8 @@ static int mdfld_dsi_connector_set_property(struct drm_connector *connector,
struct drm_encoder_helper_funcs *funcs =
encoder->helper_private;
funcs->mode_set(encoder,
&psb_crtc->saved_mode,
&psb_crtc->saved_adjusted_mode);
&gma_crtc->saved_mode,
&gma_crtc->saved_adjusted_mode);
}
}
} else if (!strcmp(property->name, "backlight") && encoder) {

16
drivers/gpu/drm/gma500/mdfld_intel_display.c
View file

@ -165,9 +165,9 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
unsigned long start, offset;
u32 dspcntr;
@ -305,8 +305,8 @@ static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 pipeconf = dev_priv->pipeconf[pipe];
u32 temp;
@ -669,9 +669,9 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
struct drm_framebuffer *old_fb)
{
struct drm_device *dev = crtc->dev;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct drm_psb_private *dev_priv = dev->dev_private;
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
int refclk = 0;
int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0,
@ -730,9 +730,9 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
if (!gma_power_begin(dev, true))
return 0;
memcpy(&psb_intel_crtc->saved_mode, mode,
memcpy(&gma_crtc->saved_mode, mode,
sizeof(struct drm_display_mode));
memcpy(&psb_intel_crtc->saved_adjusted_mode, adjusted_mode,
memcpy(&gma_crtc->saved_adjusted_mode, adjusted_mode,
sizeof(struct drm_display_mode));
list_for_each_entry(connector, &mode_config->connector_list, head) {

16
drivers/gpu/drm/gma500/oaktrail_crtc.c
View file

@ -163,8 +163,8 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 temp;
@ -292,9 +292,9 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
struct drm_framebuffer *old_fb)
{
struct drm_device *dev = crtc->dev;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct drm_psb_private *dev_priv = dev->dev_private;
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
int refclk = 0;
struct oaktrail_clock_t clock;
@ -313,10 +313,10 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
if (!gma_power_begin(dev, true))
return 0;
memcpy(&psb_intel_crtc->saved_mode,
memcpy(&gma_crtc->saved_mode,
mode,
sizeof(struct drm_display_mode));
memcpy(&psb_intel_crtc->saved_adjusted_mode,
memcpy(&gma_crtc->saved_adjusted_mode,
adjusted_mode,
sizeof(struct drm_display_mode));
@ -499,9 +499,9 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
unsigned long start, offset;

6
drivers/gpu/drm/gma500/psb_drv.c
View file

@ -441,7 +441,7 @@ static int psb_gamma_ioctl(struct drm_device *dev, void *data,
struct drm_mode_object *obj;
struct drm_crtc *crtc;
struct drm_connector *connector;
struct psb_intel_crtc *psb_intel_crtc;
struct gma_crtc *gma_crtc;
int i = 0;
int32_t obj_id;
@ -454,10 +454,10 @@ static int psb_gamma_ioctl(struct drm_device *dev, void *data,
connector = obj_to_connector(obj);
crtc = connector->encoder->crtc;
psb_intel_crtc = to_psb_intel_crtc(crtc);
gma_crtc = to_gma_crtc(crtc);
for (i = 0; i < 256; i++)
psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
gma_crtc->lut_adj[i] = lut_arg->lut[i];
gma_crtc_load_lut(crtc);

98
drivers/gpu/drm/gma500/psb_intel_display.c
View file

@ -106,9 +106,9 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
int refclk;
struct gma_clock_t clock;
@ -148,7 +148,7 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
refclk = 96000;
limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
limit = gma_crtc->clock_funcs->limit(crtc, refclk);
ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
&clock);
@ -308,9 +308,9 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
static int psb_intel_crtc_clock_get(struct drm_device *dev,
struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct drm_psb_private *dev_priv = dev->dev_private;
int pipe = psb_intel_crtc->pipe;
int pipe = gma_crtc->pipe;
const struct psb_offset *map = &dev_priv->regmap[pipe];
u32 dpll;
u32 fp;
@ -384,8 +384,8 @@ static int psb_intel_crtc_clock_get(struct drm_device *dev,
struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
struct drm_crtc *crtc)
{
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
int pipe = psb_intel_crtc->pipe;
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
int pipe = gma_crtc->pipe;
struct drm_display_mode *mode;
int htot;
int hsync;
@ -459,7 +459,7 @@ const struct gma_clock_funcs psb_clock_funcs = {
* to zero. This is a workaround for h/w defect on Oaktrail
*/
static void psb_intel_cursor_init(struct drm_device *dev,
struct psb_intel_crtc *psb_intel_crtc)
struct gma_crtc *gma_crtc)
{
struct drm_psb_private *dev_priv = dev->dev_private;
u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR };
@ -472,91 +472,87 @@ static void psb_intel_cursor_init(struct drm_device *dev,
*/
cursor_gt = psb_gtt_alloc_range(dev, 4 * PAGE_SIZE, "cursor", 1);
if (!cursor_gt) {
psb_intel_crtc->cursor_gt = NULL;
gma_crtc->cursor_gt = NULL;
goto out;
}
psb_intel_crtc->cursor_gt = cursor_gt;
psb_intel_crtc->cursor_addr = dev_priv->stolen_base +
gma_crtc->cursor_gt = cursor_gt;
gma_crtc->cursor_addr = dev_priv->stolen_base +
cursor_gt->offset;
} else {
psb_intel_crtc->cursor_gt = NULL;
gma_crtc->cursor_gt = NULL;
}
out:
REG_WRITE(control[psb_intel_crtc->pipe], 0);
REG_WRITE(base[psb_intel_crtc->pipe], 0);
REG_WRITE(control[gma_crtc->pipe], 0);
REG_WRITE(base[gma_crtc->pipe], 0);
}
void psb_intel_crtc_init(struct drm_device *dev, int pipe,
struct psb_intel_mode_device *mode_dev)
{
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_crtc *psb_intel_crtc;
struct gma_crtc *gma_crtc;
int i;
uint16_t *r_base, *g_base, *b_base;
/* We allocate a extra array of drm_connector pointers
* for fbdev after the crtc */
psb_intel_crtc =
kzalloc(sizeof(struct psb_intel_crtc) +
(INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)),
GFP_KERNEL);
if (psb_intel_crtc == NULL)
gma_crtc = kzalloc(sizeof(struct gma_crtc) +
(INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)),
GFP_KERNEL);
if (gma_crtc == NULL)
return;
psb_intel_crtc->crtc_state =
gma_crtc->crtc_state =
kzalloc(sizeof(struct psb_intel_crtc_state), GFP_KERNEL);
if (!psb_intel_crtc->crtc_state) {
if (!gma_crtc->crtc_state) {
dev_err(dev->dev, "Crtc state error: No memory\n");
kfree(psb_intel_crtc);
kfree(gma_crtc);
return;
}
/* Set the CRTC operations from the chip specific data */
drm_crtc_init(dev, &psb_intel_crtc->base, dev_priv->ops->crtc_funcs);
drm_crtc_init(dev, &gma_crtc->base, dev_priv->ops->crtc_funcs);
/* Set the CRTC clock functions from chip specific data */
psb_intel_crtc->clock_funcs = dev_priv->ops->clock_funcs;
gma_crtc->clock_funcs = dev_priv->ops->clock_funcs;
drm_mode_crtc_set_gamma_size(&psb_intel_crtc->base, 256);
psb_intel_crtc->pipe = pipe;
psb_intel_crtc->plane = pipe;
drm_mode_crtc_set_gamma_size(&gma_crtc->base, 256);
gma_crtc->pipe = pipe;
gma_crtc->plane = pipe;
r_base = psb_intel_crtc->base.gamma_store;
r_base = gma_crtc->base.gamma_store;
g_base = r_base + 256;
b_base = g_base + 256;
for (i = 0; i < 256; i++) {
psb_intel_crtc->lut_r[i] = i;
psb_intel_crtc->lut_g[i] = i;
psb_intel_crtc->lut_b[i] = i;
gma_crtc->lut_r[i] = i;
gma_crtc->lut_g[i] = i;
gma_crtc->lut_b[i] = i;
r_base[i] = i << 8;
g_base[i] = i << 8;
b_base[i] = i << 8;
psb_intel_crtc->lut_adj[i] = 0;
gma_crtc->lut_adj[i] = 0;
}
psb_intel_crtc->mode_dev = mode_dev;
psb_intel_crtc->cursor_addr = 0;
gma_crtc->mode_dev = mode_dev;
gma_crtc->cursor_addr = 0;
drm_crtc_helper_add(&psb_intel_crtc->base,
drm_crtc_helper_add(&gma_crtc->base,
dev_priv->ops->crtc_helper);
/* Setup the array of drm_connector pointer array */
psb_intel_crtc->mode_set.crtc = &psb_intel_crtc->base;
gma_crtc->mode_set.crtc = &gma_crtc->base;
BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
dev_priv->plane_to_crtc_mapping[psb_intel_crtc->plane] != NULL);
dev_priv->plane_to_crtc_mapping[psb_intel_crtc->plane] =
&psb_intel_crtc->base;
dev_priv->pipe_to_crtc_mapping[psb_intel_crtc->pipe] =
&psb_intel_crtc->base;
psb_intel_crtc->mode_set.connectors =
(struct drm_connector **) (psb_intel_crtc + 1);
psb_intel_crtc->mode_set.num_connectors = 0;
psb_intel_cursor_init(dev, psb_intel_crtc);
dev_priv->plane_to_crtc_mapping[gma_crtc->plane] != NULL);
dev_priv->plane_to_crtc_mapping[gma_crtc->plane] = &gma_crtc->base;
dev_priv->pipe_to_crtc_mapping[gma_crtc->pipe] = &gma_crtc->base;
gma_crtc->mode_set.connectors = (struct drm_connector **)(gma_crtc + 1);
gma_crtc->mode_set.num_connectors = 0;
psb_intel_cursor_init(dev, gma_crtc);
/* Set to true so that the pipe is forced off on initial config. */
psb_intel_crtc->active = true;
gma_crtc->active = true;
}
int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
@ -565,7 +561,7 @@ int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
struct drm_psb_private *dev_priv = dev->dev_private;
struct drm_psb_get_pipe_from_crtc_id_arg *pipe_from_crtc_id = data;
struct drm_mode_object *drmmode_obj;
struct psb_intel_crtc *crtc;
struct gma_crtc *crtc;
if (!dev_priv) {
dev_err(dev->dev, "called with no initialization\n");
@ -580,7 +576,7 @@ int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
return -EINVAL;
}
crtc = to_psb_intel_crtc(obj_to_crtc(drmmode_obj));
crtc = to_gma_crtc(obj_to_crtc(drmmode_obj));
pipe_from_crtc_id->pipe = crtc->pipe;
return 0;
@ -591,8 +587,8 @@ struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)
struct drm_crtc *crtc = NULL;
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
if (psb_intel_crtc->pipe == pipe)
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
if (gma_crtc->pipe == pipe)
break;
}
return crtc;

6
drivers/gpu/drm/gma500/psb_intel_drv.h
View file

@ -162,7 +162,7 @@ struct psb_intel_crtc_state {
uint32_t savePalette[256];
};
struct psb_intel_crtc {
struct gma_crtc {
struct drm_crtc base;
int pipe;
int plane;
@ -193,8 +193,8 @@ struct psb_intel_crtc {
const struct gma_clock_funcs *clock_funcs;
};
#define to_psb_intel_crtc(x) \
container_of(x, struct psb_intel_crtc, base)
#define to_gma_crtc(x) \
container_of(x, struct gma_crtc, base)
#define to_psb_intel_connector(x) \
container_of(x, struct psb_intel_connector, base)
#define to_psb_intel_encoder(x) \

10
drivers/gpu/drm/gma500/psb_intel_lvds.c
View file

@ -381,8 +381,7 @@ bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
struct drm_device *dev = encoder->dev;
struct drm_psb_private *dev_priv = dev->dev_private;
struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
struct psb_intel_crtc *psb_intel_crtc =
to_psb_intel_crtc(encoder->crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
struct drm_encoder *tmp_encoder;
struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
struct psb_intel_encoder *psb_intel_encoder =
@ -392,11 +391,11 @@ bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
panel_fixed_mode = mode_dev->panel_fixed_mode2;
/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
if (!IS_MRST(dev) && psb_intel_crtc->pipe == 0) {
if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
printk(KERN_ERR "Can't support LVDS on pipe A\n");
return false;
}
if (IS_MRST(dev) && psb_intel_crtc->pipe != 0) {
if (IS_MRST(dev) && gma_crtc->pipe != 0) {
printk(KERN_ERR "Must use PIPE A\n");
return false;
}
@ -585,8 +584,7 @@ int psb_intel_lvds_set_property(struct drm_connector *connector,
return -1;
if (!strcmp(property->name, "scaling mode")) {
struct psb_intel_crtc *crtc =
to_psb_intel_crtc(encoder->crtc);
struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
uint64_t curval;
if (!crtc)

4
drivers/gpu/drm/gma500/psb_intel_sdvo.c
View file

@ -987,7 +987,7 @@ static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
{
struct drm_device *dev = encoder->dev;
struct drm_crtc *crtc = encoder->crtc;
struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
u32 sdvox;
struct psb_intel_sdvo_in_out_map in_out;
@ -1070,7 +1070,7 @@ static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
}
sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
if (psb_intel_crtc->pipe == 1)
if (gma_crtc->pipe == 1)
sdvox |= SDVO_PIPE_B_SELECT;
if (psb_intel_sdvo->has_hdmi_audio)
sdvox |= SDVO_AUDIO_ENABLE;