crypto: ccp - CCP device driver and interface support
These routines provide the device driver support for the AMD Cryptographic Coprocessor (CCP). Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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582
drivers/crypto/ccp/ccp-dev.c
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582
drivers/crypto/ccp/ccp-dev.c
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/*
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* AMD Cryptographic Coprocessor (CCP) driver
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*
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* Copyright (C) 2013 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/kthread.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/delay.h>
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#include <linux/hw_random.h>
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#include <linux/cpu.h>
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#include <asm/cpu_device_id.h>
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#include <linux/ccp.h>
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#include "ccp-dev.h"
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MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
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MODULE_LICENSE("GPL");
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MODULE_VERSION("1.0.0");
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MODULE_DESCRIPTION("AMD Cryptographic Coprocessor driver");
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static struct ccp_device *ccp_dev;
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static inline struct ccp_device *ccp_get_device(void)
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{
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return ccp_dev;
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}
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static inline void ccp_add_device(struct ccp_device *ccp)
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{
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ccp_dev = ccp;
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}
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static inline void ccp_del_device(struct ccp_device *ccp)
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{
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ccp_dev = NULL;
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}
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/**
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* ccp_enqueue_cmd - queue an operation for processing by the CCP
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*
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* @cmd: ccp_cmd struct to be processed
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*
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* Queue a cmd to be processed by the CCP. If queueing the cmd
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* would exceed the defined length of the cmd queue the cmd will
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* only be queued if the CCP_CMD_MAY_BACKLOG flag is set and will
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* result in a return code of -EBUSY.
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*
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* The callback routine specified in the ccp_cmd struct will be
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* called to notify the caller of completion (if the cmd was not
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* backlogged) or advancement out of the backlog. If the cmd has
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* advanced out of the backlog the "err" value of the callback
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* will be -EINPROGRESS. Any other "err" value during callback is
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* the result of the operation.
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*
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* The cmd has been successfully queued if:
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* the return code is -EINPROGRESS or
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* the return code is -EBUSY and CCP_CMD_MAY_BACKLOG flag is set
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*/
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int ccp_enqueue_cmd(struct ccp_cmd *cmd)
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{
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struct ccp_device *ccp = ccp_get_device();
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unsigned long flags;
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unsigned int i;
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int ret;
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if (!ccp)
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return -ENODEV;
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/* Caller must supply a callback routine */
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if (!cmd->callback)
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return -EINVAL;
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cmd->ccp = ccp;
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spin_lock_irqsave(&ccp->cmd_lock, flags);
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i = ccp->cmd_q_count;
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if (ccp->cmd_count >= MAX_CMD_QLEN) {
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ret = -EBUSY;
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if (cmd->flags & CCP_CMD_MAY_BACKLOG)
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list_add_tail(&cmd->entry, &ccp->backlog);
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} else {
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ret = -EINPROGRESS;
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ccp->cmd_count++;
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list_add_tail(&cmd->entry, &ccp->cmd);
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/* Find an idle queue */
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if (!ccp->suspending) {
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for (i = 0; i < ccp->cmd_q_count; i++) {
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if (ccp->cmd_q[i].active)
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continue;
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break;
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}
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}
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}
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spin_unlock_irqrestore(&ccp->cmd_lock, flags);
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/* If we found an idle queue, wake it up */
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if (i < ccp->cmd_q_count)
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wake_up_process(ccp->cmd_q[i].kthread);
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return ret;
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}
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EXPORT_SYMBOL_GPL(ccp_enqueue_cmd);
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static void ccp_do_cmd_backlog(struct work_struct *work)
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{
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struct ccp_cmd *cmd = container_of(work, struct ccp_cmd, work);
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struct ccp_device *ccp = cmd->ccp;
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unsigned long flags;
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unsigned int i;
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cmd->callback(cmd->data, -EINPROGRESS);
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spin_lock_irqsave(&ccp->cmd_lock, flags);
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ccp->cmd_count++;
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list_add_tail(&cmd->entry, &ccp->cmd);
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/* Find an idle queue */
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for (i = 0; i < ccp->cmd_q_count; i++) {
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if (ccp->cmd_q[i].active)
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continue;
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break;
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}
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spin_unlock_irqrestore(&ccp->cmd_lock, flags);
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/* If we found an idle queue, wake it up */
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if (i < ccp->cmd_q_count)
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wake_up_process(ccp->cmd_q[i].kthread);
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}
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static struct ccp_cmd *ccp_dequeue_cmd(struct ccp_cmd_queue *cmd_q)
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{
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struct ccp_device *ccp = cmd_q->ccp;
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struct ccp_cmd *cmd = NULL;
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struct ccp_cmd *backlog = NULL;
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unsigned long flags;
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spin_lock_irqsave(&ccp->cmd_lock, flags);
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cmd_q->active = 0;
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if (ccp->suspending) {
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cmd_q->suspended = 1;
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spin_unlock_irqrestore(&ccp->cmd_lock, flags);
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wake_up_interruptible(&ccp->suspend_queue);
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return NULL;
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}
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if (ccp->cmd_count) {
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cmd_q->active = 1;
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cmd = list_first_entry(&ccp->cmd, struct ccp_cmd, entry);
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list_del(&cmd->entry);
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ccp->cmd_count--;
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}
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if (!list_empty(&ccp->backlog)) {
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backlog = list_first_entry(&ccp->backlog, struct ccp_cmd,
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entry);
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list_del(&backlog->entry);
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}
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spin_unlock_irqrestore(&ccp->cmd_lock, flags);
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if (backlog) {
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INIT_WORK(&backlog->work, ccp_do_cmd_backlog);
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schedule_work(&backlog->work);
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}
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return cmd;
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}
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static void ccp_do_cmd_complete(struct work_struct *work)
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{
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struct ccp_cmd *cmd = container_of(work, struct ccp_cmd, work);
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cmd->callback(cmd->data, cmd->ret);
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}
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static int ccp_cmd_queue_thread(void *data)
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{
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struct ccp_cmd_queue *cmd_q = (struct ccp_cmd_queue *)data;
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struct ccp_cmd *cmd;
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set_current_state(TASK_INTERRUPTIBLE);
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while (!kthread_should_stop()) {
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schedule();
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set_current_state(TASK_INTERRUPTIBLE);
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cmd = ccp_dequeue_cmd(cmd_q);
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if (!cmd)
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continue;
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__set_current_state(TASK_RUNNING);
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/* Execute the command */
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cmd->ret = ccp_run_cmd(cmd_q, cmd);
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/* Schedule the completion callback */
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INIT_WORK(&cmd->work, ccp_do_cmd_complete);
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schedule_work(&cmd->work);
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}
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__set_current_state(TASK_RUNNING);
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return 0;
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}
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static int ccp_trng_read(struct hwrng *rng, void *data, size_t max, bool wait)
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{
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struct ccp_device *ccp = container_of(rng, struct ccp_device, hwrng);
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u32 trng_value;
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int len = min_t(int, sizeof(trng_value), max);
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/*
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* Locking is provided by the caller so we can update device
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* hwrng-related fields safely
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*/
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trng_value = ioread32(ccp->io_regs + TRNG_OUT_REG);
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if (!trng_value) {
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/* Zero is returned if not data is available or if a
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* bad-entropy error is present. Assume an error if
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* we exceed TRNG_RETRIES reads of zero.
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*/
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if (ccp->hwrng_retries++ > TRNG_RETRIES)
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return -EIO;
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return 0;
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}
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/* Reset the counter and save the rng value */
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ccp->hwrng_retries = 0;
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memcpy(data, &trng_value, len);
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return len;
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}
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/**
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* ccp_alloc_struct - allocate and initialize the ccp_device struct
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*
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* @dev: device struct of the CCP
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*/
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struct ccp_device *ccp_alloc_struct(struct device *dev)
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{
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struct ccp_device *ccp;
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ccp = kzalloc(sizeof(*ccp), GFP_KERNEL);
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if (ccp == NULL) {
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dev_err(dev, "unable to allocate device struct\n");
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return NULL;
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}
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ccp->dev = dev;
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INIT_LIST_HEAD(&ccp->cmd);
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INIT_LIST_HEAD(&ccp->backlog);
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spin_lock_init(&ccp->cmd_lock);
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mutex_init(&ccp->req_mutex);
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mutex_init(&ccp->ksb_mutex);
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ccp->ksb_count = KSB_COUNT;
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ccp->ksb_start = 0;
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return ccp;
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}
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/**
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* ccp_init - initialize the CCP device
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*
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* @ccp: ccp_device struct
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*/
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int ccp_init(struct ccp_device *ccp)
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{
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struct device *dev = ccp->dev;
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struct ccp_cmd_queue *cmd_q;
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struct dma_pool *dma_pool;
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char dma_pool_name[MAX_DMAPOOL_NAME_LEN];
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unsigned int qmr, qim, i;
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int ret;
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/* Find available queues */
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qim = 0;
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qmr = ioread32(ccp->io_regs + Q_MASK_REG);
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for (i = 0; i < MAX_HW_QUEUES; i++) {
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if (!(qmr & (1 << i)))
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continue;
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/* Allocate a dma pool for this queue */
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snprintf(dma_pool_name, sizeof(dma_pool_name), "ccp_q%d", i);
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dma_pool = dma_pool_create(dma_pool_name, dev,
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CCP_DMAPOOL_MAX_SIZE,
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CCP_DMAPOOL_ALIGN, 0);
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if (!dma_pool) {
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dev_err(dev, "unable to allocate dma pool\n");
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ret = -ENOMEM;
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goto e_pool;
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}
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cmd_q = &ccp->cmd_q[ccp->cmd_q_count];
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ccp->cmd_q_count++;
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cmd_q->ccp = ccp;
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cmd_q->id = i;
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cmd_q->dma_pool = dma_pool;
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/* Reserve 2 KSB regions for the queue */
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cmd_q->ksb_key = KSB_START + ccp->ksb_start++;
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cmd_q->ksb_ctx = KSB_START + ccp->ksb_start++;
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ccp->ksb_count -= 2;
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/* Preset some register values and masks that are queue
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* number dependent
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*/
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cmd_q->reg_status = ccp->io_regs + CMD_Q_STATUS_BASE +
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(CMD_Q_STATUS_INCR * i);
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cmd_q->reg_int_status = ccp->io_regs + CMD_Q_INT_STATUS_BASE +
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(CMD_Q_STATUS_INCR * i);
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cmd_q->int_ok = 1 << (i * 2);
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cmd_q->int_err = 1 << ((i * 2) + 1);
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cmd_q->free_slots = CMD_Q_DEPTH(ioread32(cmd_q->reg_status));
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init_waitqueue_head(&cmd_q->int_queue);
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/* Build queue interrupt mask (two interrupts per queue) */
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qim |= cmd_q->int_ok | cmd_q->int_err;
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dev_dbg(dev, "queue #%u available\n", i);
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}
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if (ccp->cmd_q_count == 0) {
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dev_notice(dev, "no command queues available\n");
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ret = -EIO;
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goto e_pool;
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}
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dev_notice(dev, "%u command queues available\n", ccp->cmd_q_count);
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/* Disable and clear interrupts until ready */
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iowrite32(0x00, ccp->io_regs + IRQ_MASK_REG);
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for (i = 0; i < ccp->cmd_q_count; i++) {
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cmd_q = &ccp->cmd_q[i];
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ioread32(cmd_q->reg_int_status);
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ioread32(cmd_q->reg_status);
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}
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iowrite32(qim, ccp->io_regs + IRQ_STATUS_REG);
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/* Request an irq */
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ret = ccp->get_irq(ccp);
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if (ret) {
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dev_err(dev, "unable to allocate an IRQ\n");
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goto e_pool;
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}
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/* Initialize the queues used to wait for KSB space and suspend */
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init_waitqueue_head(&ccp->ksb_queue);
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init_waitqueue_head(&ccp->suspend_queue);
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/* Create a kthread for each queue */
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for (i = 0; i < ccp->cmd_q_count; i++) {
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struct task_struct *kthread;
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cmd_q = &ccp->cmd_q[i];
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kthread = kthread_create(ccp_cmd_queue_thread, cmd_q,
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"ccp-q%u", cmd_q->id);
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if (IS_ERR(kthread)) {
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dev_err(dev, "error creating queue thread (%ld)\n",
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PTR_ERR(kthread));
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ret = PTR_ERR(kthread);
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goto e_kthread;
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}
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cmd_q->kthread = kthread;
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wake_up_process(kthread);
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}
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/* Register the RNG */
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ccp->hwrng.name = "ccp-rng";
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ccp->hwrng.read = ccp_trng_read;
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ret = hwrng_register(&ccp->hwrng);
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if (ret) {
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dev_err(dev, "error registering hwrng (%d)\n", ret);
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goto e_kthread;
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}
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/* Make the device struct available before enabling interrupts */
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ccp_add_device(ccp);
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/* Enable interrupts */
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iowrite32(qim, ccp->io_regs + IRQ_MASK_REG);
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return 0;
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e_kthread:
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for (i = 0; i < ccp->cmd_q_count; i++)
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if (ccp->cmd_q[i].kthread)
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kthread_stop(ccp->cmd_q[i].kthread);
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ccp->free_irq(ccp);
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e_pool:
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for (i = 0; i < ccp->cmd_q_count; i++)
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dma_pool_destroy(ccp->cmd_q[i].dma_pool);
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return ret;
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}
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/**
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* ccp_destroy - tear down the CCP device
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*
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* @ccp: ccp_device struct
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*/
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void ccp_destroy(struct ccp_device *ccp)
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{
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struct ccp_cmd_queue *cmd_q;
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struct ccp_cmd *cmd;
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unsigned int qim, i;
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/* Remove general access to the device struct */
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ccp_del_device(ccp);
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/* Unregister the RNG */
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hwrng_unregister(&ccp->hwrng);
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/* Stop the queue kthreads */
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for (i = 0; i < ccp->cmd_q_count; i++)
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if (ccp->cmd_q[i].kthread)
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kthread_stop(ccp->cmd_q[i].kthread);
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/* Build queue interrupt mask (two interrupt masks per queue) */
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qim = 0;
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for (i = 0; i < ccp->cmd_q_count; i++) {
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cmd_q = &ccp->cmd_q[i];
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qim |= cmd_q->int_ok | cmd_q->int_err;
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}
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/* Disable and clear interrupts */
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iowrite32(0x00, ccp->io_regs + IRQ_MASK_REG);
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for (i = 0; i < ccp->cmd_q_count; i++) {
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cmd_q = &ccp->cmd_q[i];
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ioread32(cmd_q->reg_int_status);
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ioread32(cmd_q->reg_status);
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}
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iowrite32(qim, ccp->io_regs + IRQ_STATUS_REG);
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ccp->free_irq(ccp);
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for (i = 0; i < ccp->cmd_q_count; i++)
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dma_pool_destroy(ccp->cmd_q[i].dma_pool);
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/* Flush the cmd and backlog queue */
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while (!list_empty(&ccp->cmd)) {
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/* Invoke the callback directly with an error code */
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cmd = list_first_entry(&ccp->cmd, struct ccp_cmd, entry);
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||||
list_del(&cmd->entry);
|
||||
cmd->callback(cmd->data, -ENODEV);
|
||||
}
|
||||
while (!list_empty(&ccp->backlog)) {
|
||||
/* Invoke the callback directly with an error code */
|
||||
cmd = list_first_entry(&ccp->backlog, struct ccp_cmd, entry);
|
||||
list_del(&cmd->entry);
|
||||
cmd->callback(cmd->data, -ENODEV);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ccp_irq_handler - handle interrupts generated by the CCP device
|
||||
*
|
||||
* @irq: the irq associated with the interrupt
|
||||
* @data: the data value supplied when the irq was created
|
||||
*/
|
||||
irqreturn_t ccp_irq_handler(int irq, void *data)
|
||||
{
|
||||
struct device *dev = data;
|
||||
struct ccp_device *ccp = dev_get_drvdata(dev);
|
||||
struct ccp_cmd_queue *cmd_q;
|
||||
u32 q_int, status;
|
||||
unsigned int i;
|
||||
|
||||
status = ioread32(ccp->io_regs + IRQ_STATUS_REG);
|
||||
|
||||
for (i = 0; i < ccp->cmd_q_count; i++) {
|
||||
cmd_q = &ccp->cmd_q[i];
|
||||
|
||||
q_int = status & (cmd_q->int_ok | cmd_q->int_err);
|
||||
if (q_int) {
|
||||
cmd_q->int_status = status;
|
||||
cmd_q->q_status = ioread32(cmd_q->reg_status);
|
||||
cmd_q->q_int_status = ioread32(cmd_q->reg_int_status);
|
||||
|
||||
/* On error, only save the first error value */
|
||||
if ((q_int & cmd_q->int_err) && !cmd_q->cmd_error)
|
||||
cmd_q->cmd_error = CMD_Q_ERROR(cmd_q->q_status);
|
||||
|
||||
cmd_q->int_rcvd = 1;
|
||||
|
||||
/* Acknowledge the interrupt and wake the kthread */
|
||||
iowrite32(q_int, ccp->io_regs + IRQ_STATUS_REG);
|
||||
wake_up_interruptible(&cmd_q->int_queue);
|
||||
}
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
bool ccp_queues_suspended(struct ccp_device *ccp)
|
||||
{
|
||||
unsigned int suspended = 0;
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
|
||||
spin_lock_irqsave(&ccp->cmd_lock, flags);
|
||||
|
||||
for (i = 0; i < ccp->cmd_q_count; i++)
|
||||
if (ccp->cmd_q[i].suspended)
|
||||
suspended++;
|
||||
|
||||
spin_unlock_irqrestore(&ccp->cmd_lock, flags);
|
||||
|
||||
return ccp->cmd_q_count == suspended;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct x86_cpu_id ccp_support[] = {
|
||||
{ X86_VENDOR_AMD, 22, },
|
||||
};
|
||||
|
||||
static int __init ccp_mod_init(void)
|
||||
{
|
||||
struct cpuinfo_x86 *cpuinfo = &boot_cpu_data;
|
||||
|
||||
if (!x86_match_cpu(ccp_support))
|
||||
return -ENODEV;
|
||||
|
||||
switch (cpuinfo->x86) {
|
||||
case 22:
|
||||
if ((cpuinfo->x86_model < 48) || (cpuinfo->x86_model > 63))
|
||||
return -ENODEV;
|
||||
return ccp_pci_init();
|
||||
break;
|
||||
};
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static void __exit ccp_mod_exit(void)
|
||||
{
|
||||
struct cpuinfo_x86 *cpuinfo = &boot_cpu_data;
|
||||
|
||||
switch (cpuinfo->x86) {
|
||||
case 22:
|
||||
ccp_pci_exit();
|
||||
break;
|
||||
};
|
||||
}
|
||||
|
||||
module_init(ccp_mod_init);
|
||||
module_exit(ccp_mod_exit);
|
272
drivers/crypto/ccp/ccp-dev.h
Normal file
272
drivers/crypto/ccp/ccp-dev.h
Normal file
|
@ -0,0 +1,272 @@
|
|||
/*
|
||||
* AMD Cryptographic Coprocessor (CCP) driver
|
||||
*
|
||||
* Copyright (C) 2013 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Author: Tom Lendacky <thomas.lendacky@amd.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __CCP_DEV_H__
|
||||
#define __CCP_DEV_H__
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/dmapool.h>
|
||||
#include <linux/hw_random.h>
|
||||
|
||||
|
||||
#define IO_OFFSET 0x20000
|
||||
|
||||
#define MAX_DMAPOOL_NAME_LEN 32
|
||||
|
||||
#define MAX_HW_QUEUES 5
|
||||
#define MAX_CMD_QLEN 100
|
||||
|
||||
#define TRNG_RETRIES 10
|
||||
|
||||
|
||||
/****** Register Mappings ******/
|
||||
#define Q_MASK_REG 0x000
|
||||
#define TRNG_OUT_REG 0x00c
|
||||
#define IRQ_MASK_REG 0x040
|
||||
#define IRQ_STATUS_REG 0x200
|
||||
|
||||
#define DEL_CMD_Q_JOB 0x124
|
||||
#define DEL_Q_ACTIVE 0x00000200
|
||||
#define DEL_Q_ID_SHIFT 6
|
||||
|
||||
#define CMD_REQ0 0x180
|
||||
#define CMD_REQ_INCR 0x04
|
||||
|
||||
#define CMD_Q_STATUS_BASE 0x210
|
||||
#define CMD_Q_INT_STATUS_BASE 0x214
|
||||
#define CMD_Q_STATUS_INCR 0x20
|
||||
|
||||
#define CMD_Q_CACHE 0x228
|
||||
#define CMD_Q_CACHE_INC 0x20
|
||||
|
||||
#define CMD_Q_ERROR(__qs) ((__qs) & 0x0000003f);
|
||||
#define CMD_Q_DEPTH(__qs) (((__qs) >> 12) & 0x0000000f);
|
||||
|
||||
/****** REQ0 Related Values ******/
|
||||
#define REQ0_WAIT_FOR_WRITE 0x00000004
|
||||
#define REQ0_INT_ON_COMPLETE 0x00000002
|
||||
#define REQ0_STOP_ON_COMPLETE 0x00000001
|
||||
|
||||
#define REQ0_CMD_Q_SHIFT 9
|
||||
#define REQ0_JOBID_SHIFT 3
|
||||
|
||||
/****** REQ1 Related Values ******/
|
||||
#define REQ1_PROTECT_SHIFT 27
|
||||
#define REQ1_ENGINE_SHIFT 23
|
||||
#define REQ1_KEY_KSB_SHIFT 2
|
||||
|
||||
#define REQ1_EOM 0x00000002
|
||||
#define REQ1_INIT 0x00000001
|
||||
|
||||
/* AES Related Values */
|
||||
#define REQ1_AES_TYPE_SHIFT 21
|
||||
#define REQ1_AES_MODE_SHIFT 18
|
||||
#define REQ1_AES_ACTION_SHIFT 17
|
||||
#define REQ1_AES_CFB_SIZE_SHIFT 10
|
||||
|
||||
/* XTS-AES Related Values */
|
||||
#define REQ1_XTS_AES_SIZE_SHIFT 10
|
||||
|
||||
/* SHA Related Values */
|
||||
#define REQ1_SHA_TYPE_SHIFT 21
|
||||
|
||||
/* RSA Related Values */
|
||||
#define REQ1_RSA_MOD_SIZE_SHIFT 10
|
||||
|
||||
/* Pass-Through Related Values */
|
||||
#define REQ1_PT_BW_SHIFT 12
|
||||
#define REQ1_PT_BS_SHIFT 10
|
||||
|
||||
/* ECC Related Values */
|
||||
#define REQ1_ECC_AFFINE_CONVERT 0x00200000
|
||||
#define REQ1_ECC_FUNCTION_SHIFT 18
|
||||
|
||||
/****** REQ4 Related Values ******/
|
||||
#define REQ4_KSB_SHIFT 18
|
||||
#define REQ4_MEMTYPE_SHIFT 16
|
||||
|
||||
/****** REQ6 Related Values ******/
|
||||
#define REQ6_MEMTYPE_SHIFT 16
|
||||
|
||||
|
||||
/****** Key Storage Block ******/
|
||||
#define KSB_START 77
|
||||
#define KSB_END 127
|
||||
#define KSB_COUNT (KSB_END - KSB_START + 1)
|
||||
#define CCP_KSB_BITS 256
|
||||
#define CCP_KSB_BYTES 32
|
||||
|
||||
#define CCP_JOBID_MASK 0x0000003f
|
||||
|
||||
#define CCP_DMAPOOL_MAX_SIZE 64
|
||||
#define CCP_DMAPOOL_ALIGN (1 << 5)
|
||||
|
||||
#define CCP_REVERSE_BUF_SIZE 64
|
||||
|
||||
#define CCP_AES_KEY_KSB_COUNT 1
|
||||
#define CCP_AES_CTX_KSB_COUNT 1
|
||||
|
||||
#define CCP_XTS_AES_KEY_KSB_COUNT 1
|
||||
#define CCP_XTS_AES_CTX_KSB_COUNT 1
|
||||
|
||||
#define CCP_SHA_KSB_COUNT 1
|
||||
|
||||
#define CCP_RSA_MAX_WIDTH 4096
|
||||
|
||||
#define CCP_PASSTHRU_BLOCKSIZE 256
|
||||
#define CCP_PASSTHRU_MASKSIZE 32
|
||||
#define CCP_PASSTHRU_KSB_COUNT 1
|
||||
|
||||
#define CCP_ECC_MODULUS_BYTES 48 /* 384-bits */
|
||||
#define CCP_ECC_MAX_OPERANDS 6
|
||||
#define CCP_ECC_MAX_OUTPUTS 3
|
||||
#define CCP_ECC_SRC_BUF_SIZE 448
|
||||
#define CCP_ECC_DST_BUF_SIZE 192
|
||||
#define CCP_ECC_OPERAND_SIZE 64
|
||||
#define CCP_ECC_OUTPUT_SIZE 64
|
||||
#define CCP_ECC_RESULT_OFFSET 60
|
||||
#define CCP_ECC_RESULT_SUCCESS 0x0001
|
||||
|
||||
|
||||
struct ccp_device;
|
||||
struct ccp_cmd;
|
||||
|
||||
struct ccp_cmd_queue {
|
||||
struct ccp_device *ccp;
|
||||
|
||||
/* Queue identifier */
|
||||
u32 id;
|
||||
|
||||
/* Queue dma pool */
|
||||
struct dma_pool *dma_pool;
|
||||
|
||||
/* Queue reserved KSB regions */
|
||||
u32 ksb_key;
|
||||
u32 ksb_ctx;
|
||||
|
||||
/* Queue processing thread */
|
||||
struct task_struct *kthread;
|
||||
unsigned int active;
|
||||
unsigned int suspended;
|
||||
|
||||
/* Number of free command slots available */
|
||||
unsigned int free_slots;
|
||||
|
||||
/* Interrupt masks */
|
||||
u32 int_ok;
|
||||
u32 int_err;
|
||||
|
||||
/* Register addresses for queue */
|
||||
void __iomem *reg_status;
|
||||
void __iomem *reg_int_status;
|
||||
|
||||
/* Status values from job */
|
||||
u32 int_status;
|
||||
u32 q_status;
|
||||
u32 q_int_status;
|
||||
u32 cmd_error;
|
||||
|
||||
/* Interrupt wait queue */
|
||||
wait_queue_head_t int_queue;
|
||||
unsigned int int_rcvd;
|
||||
} ____cacheline_aligned;
|
||||
|
||||
struct ccp_device {
|
||||
struct device *dev;
|
||||
|
||||
/*
|
||||
* Bus specific device information
|
||||
*/
|
||||
void *dev_specific;
|
||||
int (*get_irq)(struct ccp_device *ccp);
|
||||
void (*free_irq)(struct ccp_device *ccp);
|
||||
|
||||
/*
|
||||
* I/O area used for device communication. The register mapping
|
||||
* starts at an offset into the mapped bar.
|
||||
* The CMD_REQx registers and the Delete_Cmd_Queue_Job register
|
||||
* need to be protected while a command queue thread is accessing
|
||||
* them.
|
||||
*/
|
||||
struct mutex req_mutex ____cacheline_aligned;
|
||||
void __iomem *io_map;
|
||||
void __iomem *io_regs;
|
||||
|
||||
/*
|
||||
* Master lists that all cmds are queued on. Because there can be
|
||||
* more than one CCP command queue that can process a cmd a separate
|
||||
* backlog list is neeeded so that the backlog completion call
|
||||
* completes before the cmd is available for execution.
|
||||
*/
|
||||
spinlock_t cmd_lock ____cacheline_aligned;
|
||||
unsigned int cmd_count;
|
||||
struct list_head cmd;
|
||||
struct list_head backlog;
|
||||
|
||||
/*
|
||||
* The command queues. These represent the queues available on the
|
||||
* CCP that are available for processing cmds
|
||||
*/
|
||||
struct ccp_cmd_queue cmd_q[MAX_HW_QUEUES];
|
||||
unsigned int cmd_q_count;
|
||||
|
||||
/*
|
||||
* Support for the CCP True RNG
|
||||
*/
|
||||
struct hwrng hwrng;
|
||||
unsigned int hwrng_retries;
|
||||
|
||||
/*
|
||||
* A counter used to generate job-ids for cmds submitted to the CCP
|
||||
*/
|
||||
atomic_t current_id ____cacheline_aligned;
|
||||
|
||||
/*
|
||||
* The CCP uses key storage blocks (KSB) to maintain context for certain
|
||||
* operations. To prevent multiple cmds from using the same KSB range
|
||||
* a command queue reserves a KSB range for the duration of the cmd.
|
||||
* Each queue, will however, reserve 2 KSB blocks for operations that
|
||||
* only require single KSB entries (eg. AES context/iv and key) in order
|
||||
* to avoid allocation contention. This will reserve at most 10 KSB
|
||||
* entries, leaving 40 KSB entries available for dynamic allocation.
|
||||
*/
|
||||
struct mutex ksb_mutex ____cacheline_aligned;
|
||||
DECLARE_BITMAP(ksb, KSB_COUNT);
|
||||
wait_queue_head_t ksb_queue;
|
||||
unsigned int ksb_avail;
|
||||
unsigned int ksb_count;
|
||||
u32 ksb_start;
|
||||
|
||||
/* Suspend support */
|
||||
unsigned int suspending;
|
||||
wait_queue_head_t suspend_queue;
|
||||
};
|
||||
|
||||
|
||||
int ccp_pci_init(void);
|
||||
void ccp_pci_exit(void);
|
||||
|
||||
struct ccp_device *ccp_alloc_struct(struct device *dev);
|
||||
int ccp_init(struct ccp_device *ccp);
|
||||
void ccp_destroy(struct ccp_device *ccp);
|
||||
bool ccp_queues_suspended(struct ccp_device *ccp);
|
||||
|
||||
irqreturn_t ccp_irq_handler(int irq, void *data);
|
||||
|
||||
int ccp_run_cmd(struct ccp_cmd_queue *cmd_q, struct ccp_cmd *cmd);
|
||||
|
||||
#endif
|
2020
drivers/crypto/ccp/ccp-ops.c
Normal file
2020
drivers/crypto/ccp/ccp-ops.c
Normal file
File diff suppressed because it is too large
Load diff
360
drivers/crypto/ccp/ccp-pci.c
Normal file
360
drivers/crypto/ccp/ccp-pci.c
Normal file
|
@ -0,0 +1,360 @@
|
|||
/*
|
||||
* AMD Cryptographic Coprocessor (CCP) driver
|
||||
*
|
||||
* Copyright (C) 2013 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Author: Tom Lendacky <thomas.lendacky@amd.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pci_ids.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/ccp.h>
|
||||
|
||||
#include "ccp-dev.h"
|
||||
|
||||
#define IO_BAR 2
|
||||
#define MSIX_VECTORS 2
|
||||
|
||||
struct ccp_msix {
|
||||
u32 vector;
|
||||
char name[16];
|
||||
};
|
||||
|
||||
struct ccp_pci {
|
||||
int msix_count;
|
||||
struct ccp_msix msix[MSIX_VECTORS];
|
||||
};
|
||||
|
||||
static int ccp_get_msix_irqs(struct ccp_device *ccp)
|
||||
{
|
||||
struct ccp_pci *ccp_pci = ccp->dev_specific;
|
||||
struct device *dev = ccp->dev;
|
||||
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
|
||||
struct msix_entry msix_entry[MSIX_VECTORS];
|
||||
unsigned int name_len = sizeof(ccp_pci->msix[0].name) - 1;
|
||||
int v, ret;
|
||||
|
||||
for (v = 0; v < ARRAY_SIZE(msix_entry); v++)
|
||||
msix_entry[v].entry = v;
|
||||
|
||||
while ((ret = pci_enable_msix(pdev, msix_entry, v)) > 0)
|
||||
v = ret;
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ccp_pci->msix_count = v;
|
||||
for (v = 0; v < ccp_pci->msix_count; v++) {
|
||||
/* Set the interrupt names and request the irqs */
|
||||
snprintf(ccp_pci->msix[v].name, name_len, "ccp-%u", v);
|
||||
ccp_pci->msix[v].vector = msix_entry[v].vector;
|
||||
ret = request_irq(ccp_pci->msix[v].vector, ccp_irq_handler,
|
||||
0, ccp_pci->msix[v].name, dev);
|
||||
if (ret) {
|
||||
dev_notice(dev, "unable to allocate MSI-X IRQ (%d)\n",
|
||||
ret);
|
||||
goto e_irq;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
e_irq:
|
||||
while (v--)
|
||||
free_irq(ccp_pci->msix[v].vector, dev);
|
||||
|
||||
pci_disable_msix(pdev);
|
||||
|
||||
ccp_pci->msix_count = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ccp_get_msi_irq(struct ccp_device *ccp)
|
||||
{
|
||||
struct device *dev = ccp->dev;
|
||||
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
|
||||
int ret;
|
||||
|
||||
ret = pci_enable_msi(pdev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = request_irq(pdev->irq, ccp_irq_handler, 0, "ccp", dev);
|
||||
if (ret) {
|
||||
dev_notice(dev, "unable to allocate MSI IRQ (%d)\n", ret);
|
||||
goto e_msi;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
e_msi:
|
||||
pci_disable_msi(pdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ccp_get_irqs(struct ccp_device *ccp)
|
||||
{
|
||||
struct device *dev = ccp->dev;
|
||||
int ret;
|
||||
|
||||
ret = ccp_get_msix_irqs(ccp);
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
/* Couldn't get MSI-X vectors, try MSI */
|
||||
dev_notice(dev, "could not enable MSI-X (%d), trying MSI\n", ret);
|
||||
ret = ccp_get_msi_irq(ccp);
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
/* Couldn't get MSI interrupt */
|
||||
dev_notice(dev, "could not enable MSI (%d)\n", ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ccp_free_irqs(struct ccp_device *ccp)
|
||||
{
|
||||
struct ccp_pci *ccp_pci = ccp->dev_specific;
|
||||
struct device *dev = ccp->dev;
|
||||
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
|
||||
|
||||
if (ccp_pci->msix_count) {
|
||||
while (ccp_pci->msix_count--)
|
||||
free_irq(ccp_pci->msix[ccp_pci->msix_count].vector,
|
||||
dev);
|
||||
pci_disable_msix(pdev);
|
||||
} else {
|
||||
free_irq(pdev->irq, dev);
|
||||
pci_disable_msi(pdev);
|
||||
}
|
||||
}
|
||||
|
||||
static int ccp_find_mmio_area(struct ccp_device *ccp)
|
||||
{
|
||||
struct device *dev = ccp->dev;
|
||||
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
|
||||
resource_size_t io_len;
|
||||
unsigned long io_flags;
|
||||
int bar;
|
||||
|
||||
io_flags = pci_resource_flags(pdev, IO_BAR);
|
||||
io_len = pci_resource_len(pdev, IO_BAR);
|
||||
if ((io_flags & IORESOURCE_MEM) && (io_len >= (IO_OFFSET + 0x800)))
|
||||
return IO_BAR;
|
||||
|
||||
for (bar = 0; bar < PCI_STD_RESOURCE_END; bar++) {
|
||||
io_flags = pci_resource_flags(pdev, bar);
|
||||
io_len = pci_resource_len(pdev, bar);
|
||||
if ((io_flags & IORESOURCE_MEM) &&
|
||||
(io_len >= (IO_OFFSET + 0x800)))
|
||||
return bar;
|
||||
}
|
||||
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
static int ccp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
{
|
||||
struct ccp_device *ccp;
|
||||
struct ccp_pci *ccp_pci;
|
||||
struct device *dev = &pdev->dev;
|
||||
unsigned int bar;
|
||||
int ret;
|
||||
|
||||
ret = -ENOMEM;
|
||||
ccp = ccp_alloc_struct(dev);
|
||||
if (!ccp)
|
||||
goto e_err;
|
||||
|
||||
ccp_pci = kzalloc(sizeof(*ccp_pci), GFP_KERNEL);
|
||||
if (!ccp_pci) {
|
||||
ret = -ENOMEM;
|
||||
goto e_free1;
|
||||
}
|
||||
ccp->dev_specific = ccp_pci;
|
||||
ccp->get_irq = ccp_get_irqs;
|
||||
ccp->free_irq = ccp_free_irqs;
|
||||
|
||||
ret = pci_request_regions(pdev, "ccp");
|
||||
if (ret) {
|
||||
dev_err(dev, "pci_request_regions failed (%d)\n", ret);
|
||||
goto e_free2;
|
||||
}
|
||||
|
||||
ret = pci_enable_device(pdev);
|
||||
if (ret) {
|
||||
dev_err(dev, "pci_enable_device failed (%d)\n", ret);
|
||||
goto e_regions;
|
||||
}
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
ret = ccp_find_mmio_area(ccp);
|
||||
if (ret < 0)
|
||||
goto e_device;
|
||||
bar = ret;
|
||||
|
||||
ret = -EIO;
|
||||
ccp->io_map = pci_iomap(pdev, bar, 0);
|
||||
if (ccp->io_map == NULL) {
|
||||
dev_err(dev, "pci_iomap failed\n");
|
||||
goto e_device;
|
||||
}
|
||||
ccp->io_regs = ccp->io_map + IO_OFFSET;
|
||||
|
||||
ret = dma_set_mask(dev, DMA_BIT_MASK(48));
|
||||
if (ret == 0) {
|
||||
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(48));
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"pci_set_consistent_dma_mask failed (%d)\n",
|
||||
ret);
|
||||
goto e_bar0;
|
||||
}
|
||||
} else {
|
||||
ret = dma_set_mask(dev, DMA_BIT_MASK(32));
|
||||
if (ret) {
|
||||
dev_err(dev, "pci_set_dma_mask failed (%d)\n", ret);
|
||||
goto e_bar0;
|
||||
}
|
||||
}
|
||||
|
||||
dev_set_drvdata(dev, ccp);
|
||||
|
||||
ret = ccp_init(ccp);
|
||||
if (ret)
|
||||
goto e_bar0;
|
||||
|
||||
dev_notice(dev, "enabled\n");
|
||||
|
||||
return 0;
|
||||
|
||||
e_bar0:
|
||||
pci_iounmap(pdev, ccp->io_map);
|
||||
|
||||
e_device:
|
||||
pci_disable_device(pdev);
|
||||
dev_set_drvdata(dev, NULL);
|
||||
|
||||
e_regions:
|
||||
pci_release_regions(pdev);
|
||||
|
||||
e_free2:
|
||||
kfree(ccp_pci);
|
||||
|
||||
e_free1:
|
||||
kfree(ccp);
|
||||
|
||||
e_err:
|
||||
dev_notice(dev, "initialization failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ccp_pci_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ccp_device *ccp = dev_get_drvdata(dev);
|
||||
|
||||
ccp_destroy(ccp);
|
||||
|
||||
pci_iounmap(pdev, ccp->io_map);
|
||||
|
||||
pci_disable_device(pdev);
|
||||
dev_set_drvdata(dev, NULL);
|
||||
|
||||
pci_release_regions(pdev);
|
||||
|
||||
kfree(ccp);
|
||||
|
||||
dev_notice(dev, "disabled\n");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int ccp_pci_suspend(struct pci_dev *pdev, pm_message_t state)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ccp_device *ccp = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
|
||||
spin_lock_irqsave(&ccp->cmd_lock, flags);
|
||||
|
||||
ccp->suspending = 1;
|
||||
|
||||
/* Wake all the queue kthreads to prepare for suspend */
|
||||
for (i = 0; i < ccp->cmd_q_count; i++)
|
||||
wake_up_process(ccp->cmd_q[i].kthread);
|
||||
|
||||
spin_unlock_irqrestore(&ccp->cmd_lock, flags);
|
||||
|
||||
/* Wait for all queue kthreads to say they're done */
|
||||
while (!ccp_queues_suspended(ccp))
|
||||
wait_event_interruptible(ccp->suspend_queue,
|
||||
ccp_queues_suspended(ccp));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ccp_pci_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ccp_device *ccp = dev_get_drvdata(dev);
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
|
||||
spin_lock_irqsave(&ccp->cmd_lock, flags);
|
||||
|
||||
ccp->suspending = 0;
|
||||
|
||||
/* Wake up all the kthreads */
|
||||
for (i = 0; i < ccp->cmd_q_count; i++) {
|
||||
ccp->cmd_q[i].suspended = 0;
|
||||
wake_up_process(ccp->cmd_q[i].kthread);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&ccp->cmd_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static DEFINE_PCI_DEVICE_TABLE(ccp_pci_table) = {
|
||||
{ PCI_VDEVICE(AMD, 0x1537), },
|
||||
/* Last entry must be zero */
|
||||
{ 0, }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, ccp_pci_table);
|
||||
|
||||
static struct pci_driver ccp_pci_driver = {
|
||||
.name = "AMD Cryptographic Coprocessor",
|
||||
.id_table = ccp_pci_table,
|
||||
.probe = ccp_pci_probe,
|
||||
.remove = ccp_pci_remove,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = ccp_pci_suspend,
|
||||
.resume = ccp_pci_resume,
|
||||
#endif
|
||||
};
|
||||
|
||||
int ccp_pci_init(void)
|
||||
{
|
||||
return pci_register_driver(&ccp_pci_driver);
|
||||
}
|
||||
|
||||
void ccp_pci_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&ccp_pci_driver);
|
||||
}
|
525
include/linux/ccp.h
Normal file
525
include/linux/ccp.h
Normal file
|
@ -0,0 +1,525 @@
|
|||
/*
|
||||
* AMD Cryptographic Coprocessor (CCP) driver
|
||||
*
|
||||
* Copyright (C) 2013 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Author: Tom Lendacky <thomas.lendacky@amd.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __CPP_H__
|
||||
#define __CPP_H__
|
||||
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/list.h>
|
||||
#include <crypto/aes.h>
|
||||
#include <crypto/sha.h>
|
||||
|
||||
|
||||
struct ccp_device;
|
||||
struct ccp_cmd;
|
||||
|
||||
/**
|
||||
* ccp_enqueue_cmd - queue an operation for processing by the CCP
|
||||
*
|
||||
* @cmd: ccp_cmd struct to be processed
|
||||
*
|
||||
* Refer to the ccp_cmd struct below for required fields.
|
||||
*
|
||||
* Queue a cmd to be processed by the CCP. If queueing the cmd
|
||||
* would exceed the defined length of the cmd queue the cmd will
|
||||
* only be queued if the CCP_CMD_MAY_BACKLOG flag is set and will
|
||||
* result in a return code of -EBUSY.
|
||||
*
|
||||
* The callback routine specified in the ccp_cmd struct will be
|
||||
* called to notify the caller of completion (if the cmd was not
|
||||
* backlogged) or advancement out of the backlog. If the cmd has
|
||||
* advanced out of the backlog the "err" value of the callback
|
||||
* will be -EINPROGRESS. Any other "err" value during callback is
|
||||
* the result of the operation.
|
||||
*
|
||||
* The cmd has been successfully queued if:
|
||||
* the return code is -EINPROGRESS or
|
||||
* the return code is -EBUSY and CCP_CMD_MAY_BACKLOG flag is set
|
||||
*/
|
||||
int ccp_enqueue_cmd(struct ccp_cmd *cmd);
|
||||
|
||||
|
||||
/***** AES engine *****/
|
||||
/**
|
||||
* ccp_aes_type - AES key size
|
||||
*
|
||||
* @CCP_AES_TYPE_128: 128-bit key
|
||||
* @CCP_AES_TYPE_192: 192-bit key
|
||||
* @CCP_AES_TYPE_256: 256-bit key
|
||||
*/
|
||||
enum ccp_aes_type {
|
||||
CCP_AES_TYPE_128 = 0,
|
||||
CCP_AES_TYPE_192,
|
||||
CCP_AES_TYPE_256,
|
||||
CCP_AES_TYPE__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* ccp_aes_mode - AES operation mode
|
||||
*
|
||||
* @CCP_AES_MODE_ECB: ECB mode
|
||||
* @CCP_AES_MODE_CBC: CBC mode
|
||||
* @CCP_AES_MODE_OFB: OFB mode
|
||||
* @CCP_AES_MODE_CFB: CFB mode
|
||||
* @CCP_AES_MODE_CTR: CTR mode
|
||||
* @CCP_AES_MODE_CMAC: CMAC mode
|
||||
*/
|
||||
enum ccp_aes_mode {
|
||||
CCP_AES_MODE_ECB = 0,
|
||||
CCP_AES_MODE_CBC,
|
||||
CCP_AES_MODE_OFB,
|
||||
CCP_AES_MODE_CFB,
|
||||
CCP_AES_MODE_CTR,
|
||||
CCP_AES_MODE_CMAC,
|
||||
CCP_AES_MODE__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* ccp_aes_mode - AES operation mode
|
||||
*
|
||||
* @CCP_AES_ACTION_DECRYPT: AES decrypt operation
|
||||
* @CCP_AES_ACTION_ENCRYPT: AES encrypt operation
|
||||
*/
|
||||
enum ccp_aes_action {
|
||||
CCP_AES_ACTION_DECRYPT = 0,
|
||||
CCP_AES_ACTION_ENCRYPT,
|
||||
CCP_AES_ACTION__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_aes_engine - CCP AES operation
|
||||
* @type: AES operation key size
|
||||
* @mode: AES operation mode
|
||||
* @action: AES operation (decrypt/encrypt)
|
||||
* @key: key to be used for this AES operation
|
||||
* @key_len: length in bytes of key
|
||||
* @iv: IV to be used for this AES operation
|
||||
* @iv_len: length in bytes of iv
|
||||
* @src: data to be used for this operation
|
||||
* @dst: data produced by this operation
|
||||
* @src_len: length in bytes of data used for this operation
|
||||
* @cmac_final: indicates final operation when running in CMAC mode
|
||||
* @cmac_key: K1/K2 key used in final CMAC operation
|
||||
* @cmac_key_len: length in bytes of cmac_key
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - type, mode, action, key, key_len, src, dst, src_len
|
||||
* - iv, iv_len for any mode other than ECB
|
||||
* - cmac_final for CMAC mode
|
||||
* - cmac_key, cmac_key_len for CMAC mode if cmac_final is non-zero
|
||||
*
|
||||
* The iv variable is used as both input and output. On completion of the
|
||||
* AES operation the new IV overwrites the old IV.
|
||||
*/
|
||||
struct ccp_aes_engine {
|
||||
enum ccp_aes_type type;
|
||||
enum ccp_aes_mode mode;
|
||||
enum ccp_aes_action action;
|
||||
|
||||
struct scatterlist *key;
|
||||
u32 key_len; /* In bytes */
|
||||
|
||||
struct scatterlist *iv;
|
||||
u32 iv_len; /* In bytes */
|
||||
|
||||
struct scatterlist *src, *dst;
|
||||
u32 src_len; /* In bytes */
|
||||
|
||||
u32 cmac_final; /* Indicates final cmac cmd */
|
||||
struct scatterlist *cmac_key; /* K1/K2 cmac key required for
|
||||
* final cmac cmd */
|
||||
u32 cmac_key_len; /* In bytes */
|
||||
};
|
||||
|
||||
/***** XTS-AES engine *****/
|
||||
/**
|
||||
* ccp_xts_aes_unit_size - XTS unit size
|
||||
*
|
||||
* @CCP_XTS_AES_UNIT_SIZE_16: Unit size of 16 bytes
|
||||
* @CCP_XTS_AES_UNIT_SIZE_512: Unit size of 512 bytes
|
||||
* @CCP_XTS_AES_UNIT_SIZE_1024: Unit size of 1024 bytes
|
||||
* @CCP_XTS_AES_UNIT_SIZE_2048: Unit size of 2048 bytes
|
||||
* @CCP_XTS_AES_UNIT_SIZE_4096: Unit size of 4096 bytes
|
||||
*/
|
||||
enum ccp_xts_aes_unit_size {
|
||||
CCP_XTS_AES_UNIT_SIZE_16 = 0,
|
||||
CCP_XTS_AES_UNIT_SIZE_512,
|
||||
CCP_XTS_AES_UNIT_SIZE_1024,
|
||||
CCP_XTS_AES_UNIT_SIZE_2048,
|
||||
CCP_XTS_AES_UNIT_SIZE_4096,
|
||||
CCP_XTS_AES_UNIT_SIZE__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_xts_aes_engine - CCP XTS AES operation
|
||||
* @action: AES operation (decrypt/encrypt)
|
||||
* @unit_size: unit size of the XTS operation
|
||||
* @key: key to be used for this XTS AES operation
|
||||
* @key_len: length in bytes of key
|
||||
* @iv: IV to be used for this XTS AES operation
|
||||
* @iv_len: length in bytes of iv
|
||||
* @src: data to be used for this operation
|
||||
* @dst: data produced by this operation
|
||||
* @src_len: length in bytes of data used for this operation
|
||||
* @final: indicates final XTS operation
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - action, unit_size, key, key_len, iv, iv_len, src, dst, src_len, final
|
||||
*
|
||||
* The iv variable is used as both input and output. On completion of the
|
||||
* AES operation the new IV overwrites the old IV.
|
||||
*/
|
||||
struct ccp_xts_aes_engine {
|
||||
enum ccp_aes_action action;
|
||||
enum ccp_xts_aes_unit_size unit_size;
|
||||
|
||||
struct scatterlist *key;
|
||||
u32 key_len; /* In bytes */
|
||||
|
||||
struct scatterlist *iv;
|
||||
u32 iv_len; /* In bytes */
|
||||
|
||||
struct scatterlist *src, *dst;
|
||||
u32 src_len; /* In bytes */
|
||||
|
||||
u32 final;
|
||||
};
|
||||
|
||||
/***** SHA engine *****/
|
||||
#define CCP_SHA_BLOCKSIZE SHA256_BLOCK_SIZE
|
||||
#define CCP_SHA_CTXSIZE SHA256_DIGEST_SIZE
|
||||
|
||||
/**
|
||||
* ccp_sha_type - type of SHA operation
|
||||
*
|
||||
* @CCP_SHA_TYPE_1: SHA-1 operation
|
||||
* @CCP_SHA_TYPE_224: SHA-224 operation
|
||||
* @CCP_SHA_TYPE_256: SHA-256 operation
|
||||
*/
|
||||
enum ccp_sha_type {
|
||||
CCP_SHA_TYPE_1 = 1,
|
||||
CCP_SHA_TYPE_224,
|
||||
CCP_SHA_TYPE_256,
|
||||
CCP_SHA_TYPE__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_sha_engine - CCP SHA operation
|
||||
* @type: Type of SHA operation
|
||||
* @ctx: current hash value
|
||||
* @ctx_len: length in bytes of hash value
|
||||
* @src: data to be used for this operation
|
||||
* @src_len: length in bytes of data used for this operation
|
||||
* @final: indicates final SHA operation
|
||||
* @msg_bits: total length of the message in bits used in final SHA operation
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - type, ctx, ctx_len, src, src_len, final
|
||||
* - msg_bits if final is non-zero
|
||||
*
|
||||
* The ctx variable is used as both input and output. On completion of the
|
||||
* SHA operation the new hash value overwrites the old hash value.
|
||||
*/
|
||||
struct ccp_sha_engine {
|
||||
enum ccp_sha_type type;
|
||||
|
||||
struct scatterlist *ctx;
|
||||
u32 ctx_len; /* In bytes */
|
||||
|
||||
struct scatterlist *src;
|
||||
u32 src_len; /* In bytes */
|
||||
|
||||
u32 final; /* Indicates final sha cmd */
|
||||
u64 msg_bits; /* Message length in bits required for
|
||||
* final sha cmd */
|
||||
};
|
||||
|
||||
/***** RSA engine *****/
|
||||
/**
|
||||
* struct ccp_rsa_engine - CCP RSA operation
|
||||
* @key_size: length in bits of RSA key
|
||||
* @exp: RSA exponent
|
||||
* @exp_len: length in bytes of exponent
|
||||
* @mod: RSA modulus
|
||||
* @mod_len: length in bytes of modulus
|
||||
* @src: data to be used for this operation
|
||||
* @dst: data produced by this operation
|
||||
* @src_len: length in bytes of data used for this operation
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - key_size, exp, exp_len, mod, mod_len, src, dst, src_len
|
||||
*/
|
||||
struct ccp_rsa_engine {
|
||||
u32 key_size; /* In bits */
|
||||
|
||||
struct scatterlist *exp;
|
||||
u32 exp_len; /* In bytes */
|
||||
|
||||
struct scatterlist *mod;
|
||||
u32 mod_len; /* In bytes */
|
||||
|
||||
struct scatterlist *src, *dst;
|
||||
u32 src_len; /* In bytes */
|
||||
};
|
||||
|
||||
/***** Passthru engine *****/
|
||||
/**
|
||||
* ccp_passthru_bitwise - type of bitwise passthru operation
|
||||
*
|
||||
* @CCP_PASSTHRU_BITWISE_NOOP: no bitwise operation performed
|
||||
* @CCP_PASSTHRU_BITWISE_AND: perform bitwise AND of src with mask
|
||||
* @CCP_PASSTHRU_BITWISE_OR: perform bitwise OR of src with mask
|
||||
* @CCP_PASSTHRU_BITWISE_XOR: perform bitwise XOR of src with mask
|
||||
* @CCP_PASSTHRU_BITWISE_MASK: overwrite with mask
|
||||
*/
|
||||
enum ccp_passthru_bitwise {
|
||||
CCP_PASSTHRU_BITWISE_NOOP = 0,
|
||||
CCP_PASSTHRU_BITWISE_AND,
|
||||
CCP_PASSTHRU_BITWISE_OR,
|
||||
CCP_PASSTHRU_BITWISE_XOR,
|
||||
CCP_PASSTHRU_BITWISE_MASK,
|
||||
CCP_PASSTHRU_BITWISE__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* ccp_passthru_byteswap - type of byteswap passthru operation
|
||||
*
|
||||
* @CCP_PASSTHRU_BYTESWAP_NOOP: no byte swapping performed
|
||||
* @CCP_PASSTHRU_BYTESWAP_32BIT: swap bytes within 32-bit words
|
||||
* @CCP_PASSTHRU_BYTESWAP_256BIT: swap bytes within 256-bit words
|
||||
*/
|
||||
enum ccp_passthru_byteswap {
|
||||
CCP_PASSTHRU_BYTESWAP_NOOP = 0,
|
||||
CCP_PASSTHRU_BYTESWAP_32BIT,
|
||||
CCP_PASSTHRU_BYTESWAP_256BIT,
|
||||
CCP_PASSTHRU_BYTESWAP__LAST,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_passthru_engine - CCP pass-through operation
|
||||
* @bit_mod: bitwise operation to perform
|
||||
* @byte_swap: byteswap operation to perform
|
||||
* @mask: mask to be applied to data
|
||||
* @mask_len: length in bytes of mask
|
||||
* @src: data to be used for this operation
|
||||
* @dst: data produced by this operation
|
||||
* @src_len: length in bytes of data used for this operation
|
||||
* @final: indicate final pass-through operation
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - bit_mod, byte_swap, src, dst, src_len
|
||||
* - mask, mask_len if bit_mod is not CCP_PASSTHRU_BITWISE_NOOP
|
||||
*/
|
||||
struct ccp_passthru_engine {
|
||||
enum ccp_passthru_bitwise bit_mod;
|
||||
enum ccp_passthru_byteswap byte_swap;
|
||||
|
||||
struct scatterlist *mask;
|
||||
u32 mask_len; /* In bytes */
|
||||
|
||||
struct scatterlist *src, *dst;
|
||||
u32 src_len; /* In bytes */
|
||||
|
||||
u32 final;
|
||||
};
|
||||
|
||||
/***** ECC engine *****/
|
||||
#define CCP_ECC_MODULUS_BYTES 48 /* 384-bits */
|
||||
#define CCP_ECC_MAX_OPERANDS 6
|
||||
#define CCP_ECC_MAX_OUTPUTS 3
|
||||
|
||||
/**
|
||||
* ccp_ecc_function - type of ECC function
|
||||
*
|
||||
* @CCP_ECC_FUNCTION_MMUL_384BIT: 384-bit modular multiplication
|
||||
* @CCP_ECC_FUNCTION_MADD_384BIT: 384-bit modular addition
|
||||
* @CCP_ECC_FUNCTION_MINV_384BIT: 384-bit multiplicative inverse
|
||||
* @CCP_ECC_FUNCTION_PADD_384BIT: 384-bit point addition
|
||||
* @CCP_ECC_FUNCTION_PMUL_384BIT: 384-bit point multiplication
|
||||
* @CCP_ECC_FUNCTION_PDBL_384BIT: 384-bit point doubling
|
||||
*/
|
||||
enum ccp_ecc_function {
|
||||
CCP_ECC_FUNCTION_MMUL_384BIT = 0,
|
||||
CCP_ECC_FUNCTION_MADD_384BIT,
|
||||
CCP_ECC_FUNCTION_MINV_384BIT,
|
||||
CCP_ECC_FUNCTION_PADD_384BIT,
|
||||
CCP_ECC_FUNCTION_PMUL_384BIT,
|
||||
CCP_ECC_FUNCTION_PDBL_384BIT,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_ecc_modular_math - CCP ECC modular math parameters
|
||||
* @operand_1: first operand for the modular math operation
|
||||
* @operand_1_len: length of the first operand
|
||||
* @operand_2: second operand for the modular math operation
|
||||
* (not used for CCP_ECC_FUNCTION_MINV_384BIT)
|
||||
* @operand_2_len: length of the second operand
|
||||
* (not used for CCP_ECC_FUNCTION_MINV_384BIT)
|
||||
* @result: result of the modular math operation
|
||||
* @result_len: length of the supplied result buffer
|
||||
*/
|
||||
struct ccp_ecc_modular_math {
|
||||
struct scatterlist *operand_1;
|
||||
unsigned int operand_1_len; /* In bytes */
|
||||
|
||||
struct scatterlist *operand_2;
|
||||
unsigned int operand_2_len; /* In bytes */
|
||||
|
||||
struct scatterlist *result;
|
||||
unsigned int result_len; /* In bytes */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_ecc_point - CCP ECC point definition
|
||||
* @x: the x coordinate of the ECC point
|
||||
* @x_len: the length of the x coordinate
|
||||
* @y: the y coordinate of the ECC point
|
||||
* @y_len: the length of the y coordinate
|
||||
*/
|
||||
struct ccp_ecc_point {
|
||||
struct scatterlist *x;
|
||||
unsigned int x_len; /* In bytes */
|
||||
|
||||
struct scatterlist *y;
|
||||
unsigned int y_len; /* In bytes */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_ecc_point_math - CCP ECC point math parameters
|
||||
* @point_1: the first point of the ECC point math operation
|
||||
* @point_2: the second point of the ECC point math operation
|
||||
* (only used for CCP_ECC_FUNCTION_PADD_384BIT)
|
||||
* @domain_a: the a parameter of the ECC curve
|
||||
* @domain_a_len: the length of the a parameter
|
||||
* @scalar: the scalar parameter for the point match operation
|
||||
* (only used for CCP_ECC_FUNCTION_PMUL_384BIT)
|
||||
* @scalar_len: the length of the scalar parameter
|
||||
* (only used for CCP_ECC_FUNCTION_PMUL_384BIT)
|
||||
* @result: the point resulting from the point math operation
|
||||
*/
|
||||
struct ccp_ecc_point_math {
|
||||
struct ccp_ecc_point point_1;
|
||||
struct ccp_ecc_point point_2;
|
||||
|
||||
struct scatterlist *domain_a;
|
||||
unsigned int domain_a_len; /* In bytes */
|
||||
|
||||
struct scatterlist *scalar;
|
||||
unsigned int scalar_len; /* In bytes */
|
||||
|
||||
struct ccp_ecc_point result;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ccp_ecc_engine - CCP ECC operation
|
||||
* @function: ECC function to perform
|
||||
* @mod: ECC modulus
|
||||
* @mod_len: length in bytes of modulus
|
||||
* @mm: module math parameters
|
||||
* @pm: point math parameters
|
||||
* @ecc_result: result of the ECC operation
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - function, mod, mod_len
|
||||
* - operand, operand_len, operand_count, output, output_len, output_count
|
||||
* - ecc_result
|
||||
*/
|
||||
struct ccp_ecc_engine {
|
||||
enum ccp_ecc_function function;
|
||||
|
||||
struct scatterlist *mod;
|
||||
u32 mod_len; /* In bytes */
|
||||
|
||||
union {
|
||||
struct ccp_ecc_modular_math mm;
|
||||
struct ccp_ecc_point_math pm;
|
||||
} u;
|
||||
|
||||
u16 ecc_result;
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* ccp_engine - CCP operation identifiers
|
||||
*
|
||||
* @CCP_ENGINE_AES: AES operation
|
||||
* @CCP_ENGINE_XTS_AES: 128-bit XTS AES operation
|
||||
* @CCP_ENGINE_RSVD1: unused
|
||||
* @CCP_ENGINE_SHA: SHA operation
|
||||
* @CCP_ENGINE_RSA: RSA operation
|
||||
* @CCP_ENGINE_PASSTHRU: pass-through operation
|
||||
* @CCP_ENGINE_ZLIB_DECOMPRESS: unused
|
||||
* @CCP_ENGINE_ECC: ECC operation
|
||||
*/
|
||||
enum ccp_engine {
|
||||
CCP_ENGINE_AES = 0,
|
||||
CCP_ENGINE_XTS_AES_128,
|
||||
CCP_ENGINE_RSVD1,
|
||||
CCP_ENGINE_SHA,
|
||||
CCP_ENGINE_RSA,
|
||||
CCP_ENGINE_PASSTHRU,
|
||||
CCP_ENGINE_ZLIB_DECOMPRESS,
|
||||
CCP_ENGINE_ECC,
|
||||
CCP_ENGINE__LAST,
|
||||
};
|
||||
|
||||
/* Flag values for flags member of ccp_cmd */
|
||||
#define CCP_CMD_MAY_BACKLOG 0x00000001
|
||||
|
||||
/**
|
||||
* struct ccp_cmd - CPP operation request
|
||||
* @entry: list element (ccp driver use only)
|
||||
* @work: work element used for callbacks (ccp driver use only)
|
||||
* @ccp: CCP device to be run on (ccp driver use only)
|
||||
* @ret: operation return code (ccp driver use only)
|
||||
* @flags: cmd processing flags
|
||||
* @engine: CCP operation to perform
|
||||
* @engine_error: CCP engine return code
|
||||
* @u: engine specific structures, refer to specific engine struct below
|
||||
* @callback: operation completion callback function
|
||||
* @data: parameter value to be supplied to the callback function
|
||||
*
|
||||
* Variables required to be set when calling ccp_enqueue_cmd():
|
||||
* - engine, callback
|
||||
* - See the operation structures below for what is required for each
|
||||
* operation.
|
||||
*/
|
||||
struct ccp_cmd {
|
||||
/* The list_head, work_struct, ccp and ret variables are for use
|
||||
* by the CCP driver only.
|
||||
*/
|
||||
struct list_head entry;
|
||||
struct work_struct work;
|
||||
struct ccp_device *ccp;
|
||||
int ret;
|
||||
|
||||
u32 flags;
|
||||
|
||||
enum ccp_engine engine;
|
||||
u32 engine_error;
|
||||
|
||||
union {
|
||||
struct ccp_aes_engine aes;
|
||||
struct ccp_xts_aes_engine xts;
|
||||
struct ccp_sha_engine sha;
|
||||
struct ccp_rsa_engine rsa;
|
||||
struct ccp_passthru_engine passthru;
|
||||
struct ccp_ecc_engine ecc;
|
||||
} u;
|
||||
|
||||
/* Completion callback support */
|
||||
void (*callback)(void *data, int err);
|
||||
void *data;
|
||||
};
|
||||
|
||||
#endif
|
Loading…
Reference in a new issue