sh-pfc: sh73a0: Add SCIFA and SCIFB pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart
parent
df68a28d17
commit
64d87acb27
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@ -2040,6 +2040,253 @@ static const unsigned int lcd2_sys_1_mux[] = {
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PORT221_LCD2CS__MARK, PORT219_LCD2WR__MARK,
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LCD2RD__MARK, PORT217_LCD2RS_MARK,
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};
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/* - SCIFA0 ----------------------------------------------------------------- */
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static const unsigned int scifa0_data_pins[] = {
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/* RXD, TXD */
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43, 17,
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};
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static const unsigned int scifa0_data_mux[] = {
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SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
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};
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static const unsigned int scifa0_clk_pins[] = {
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/* SCK */
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16,
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};
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static const unsigned int scifa0_clk_mux[] = {
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SCIFA0_SCK_MARK,
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};
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static const unsigned int scifa0_ctrl_pins[] = {
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/* RTS, CTS */
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42, 44,
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};
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static const unsigned int scifa0_ctrl_mux[] = {
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SCIFA0_RTS__MARK, SCIFA0_CTS__MARK,
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};
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/* - SCIFA1 ----------------------------------------------------------------- */
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static const unsigned int scifa1_data_pins[] = {
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/* RXD, TXD */
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228, 225,
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};
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static const unsigned int scifa1_data_mux[] = {
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SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
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};
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static const unsigned int scifa1_clk_pins[] = {
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/* SCK */
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226,
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};
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static const unsigned int scifa1_clk_mux[] = {
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SCIFA1_SCK_MARK,
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};
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static const unsigned int scifa1_ctrl_pins[] = {
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/* RTS, CTS */
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227, 229,
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};
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static const unsigned int scifa1_ctrl_mux[] = {
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SCIFA1_RTS__MARK, SCIFA1_CTS__MARK,
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};
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/* - SCIFA2 ----------------------------------------------------------------- */
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static const unsigned int scifa2_data_0_pins[] = {
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/* RXD, TXD */
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155, 154,
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};
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static const unsigned int scifa2_data_0_mux[] = {
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SCIFA2_RXD1_MARK, SCIFA2_TXD1_MARK,
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};
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static const unsigned int scifa2_clk_0_pins[] = {
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/* SCK */
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158,
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};
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static const unsigned int scifa2_clk_0_mux[] = {
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SCIFA2_SCK1_MARK,
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};
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static const unsigned int scifa2_ctrl_0_pins[] = {
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/* RTS, CTS */
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156, 157,
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};
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static const unsigned int scifa2_ctrl_0_mux[] = {
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SCIFA2_RTS1__MARK, SCIFA2_CTS1__MARK,
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};
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static const unsigned int scifa2_data_1_pins[] = {
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/* RXD, TXD */
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233, 230,
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};
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static const unsigned int scifa2_data_1_mux[] = {
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SCIFA2_RXD2_MARK, SCIFA2_TXD2_MARK,
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};
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static const unsigned int scifa2_clk_1_pins[] = {
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/* SCK */
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232,
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};
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static const unsigned int scifa2_clk_1_mux[] = {
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SCIFA2_SCK2_MARK,
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};
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static const unsigned int scifa2_ctrl_1_pins[] = {
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/* RTS, CTS */
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234, 231,
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};
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static const unsigned int scifa2_ctrl_1_mux[] = {
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SCIFA2_RTS2__MARK, SCIFA2_CTS2__MARK,
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};
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/* - SCIFA3 ----------------------------------------------------------------- */
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static const unsigned int scifa3_data_pins[] = {
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/* RXD, TXD */
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108, 110,
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};
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static const unsigned int scifa3_data_mux[] = {
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SCIFA3_RXD_MARK, SCIFA3_TXD_MARK,
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};
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static const unsigned int scifa3_ctrl_pins[] = {
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/* RTS, CTS */
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109, 107,
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};
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static const unsigned int scifa3_ctrl_mux[] = {
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SCIFA3_RTS__MARK, SCIFA3_CTS__MARK,
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};
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/* - SCIFA4 ----------------------------------------------------------------- */
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static const unsigned int scifa4_data_pins[] = {
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/* RXD, TXD */
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33, 32,
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};
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static const unsigned int scifa4_data_mux[] = {
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SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
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};
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static const unsigned int scifa4_ctrl_pins[] = {
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/* RTS, CTS */
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34, 35,
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};
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static const unsigned int scifa4_ctrl_mux[] = {
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SCIFA4_RTS__MARK, SCIFA4_CTS__MARK,
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};
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/* - SCIFA5 ----------------------------------------------------------------- */
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static const unsigned int scifa5_data_0_pins[] = {
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/* RXD, TXD */
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246, 247,
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};
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static const unsigned int scifa5_data_0_mux[] = {
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PORT246_SCIFA5_RXD_MARK, PORT247_SCIFA5_TXD_MARK,
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};
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static const unsigned int scifa5_clk_0_pins[] = {
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/* SCK */
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248,
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};
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static const unsigned int scifa5_clk_0_mux[] = {
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PORT248_SCIFA5_SCK_MARK,
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};
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static const unsigned int scifa5_ctrl_0_pins[] = {
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/* RTS, CTS */
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245, 244,
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};
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static const unsigned int scifa5_ctrl_0_mux[] = {
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PORT245_SCIFA5_RTS__MARK, PORT244_SCIFA5_CTS__MARK,
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};
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static const unsigned int scifa5_data_1_pins[] = {
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/* RXD, TXD */
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195, 196,
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};
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static const unsigned int scifa5_data_1_mux[] = {
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PORT195_SCIFA5_RXD_MARK, PORT196_SCIFA5_TXD_MARK,
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};
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static const unsigned int scifa5_clk_1_pins[] = {
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/* SCK */
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197,
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};
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static const unsigned int scifa5_clk_1_mux[] = {
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PORT197_SCIFA5_SCK_MARK,
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};
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static const unsigned int scifa5_ctrl_1_pins[] = {
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/* RTS, CTS */
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194, 193,
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};
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static const unsigned int scifa5_ctrl_1_mux[] = {
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PORT194_SCIFA5_RTS__MARK, PORT193_SCIFA5_CTS__MARK,
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};
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static const unsigned int scifa5_data_2_pins[] = {
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/* RXD, TXD */
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162, 160,
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};
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static const unsigned int scifa5_data_2_mux[] = {
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PORT162_SCIFA5_RXD_MARK, PORT160_SCIFA5_TXD_MARK,
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};
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static const unsigned int scifa5_clk_2_pins[] = {
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/* SCK */
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159,
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};
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static const unsigned int scifa5_clk_2_mux[] = {
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PORT159_SCIFA5_SCK_MARK,
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};
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static const unsigned int scifa5_ctrl_2_pins[] = {
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/* RTS, CTS */
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163, 161,
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};
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static const unsigned int scifa5_ctrl_2_mux[] = {
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PORT163_SCIFA5_RTS__MARK, PORT161_SCIFA5_CTS__MARK,
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};
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/* - SCIFA6 ----------------------------------------------------------------- */
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static const unsigned int scifa6_pins[] = {
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/* TXD */
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240,
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};
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static const unsigned int scifa6_mux[] = {
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SCIFA6_TXD_MARK,
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};
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/* - SCIFA7 ----------------------------------------------------------------- */
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static const unsigned int scifa7_data_pins[] = {
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/* RXD, TXD */
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12, 18,
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};
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static const unsigned int scifa7_data_mux[] = {
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SCIFA7_RXD_MARK, SCIFA7_TXD_MARK,
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};
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static const unsigned int scifa7_ctrl_pins[] = {
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/* RTS, CTS */
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19, 13,
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};
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static const unsigned int scifa7_ctrl_mux[] = {
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SCIFA7_RTS__MARK, SCIFA7_CTS__MARK,
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};
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/* - SCIFB ------------------------------------------------------------------ */
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static const unsigned int scifb_data_0_pins[] = {
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/* RXD, TXD */
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162, 160,
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};
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static const unsigned int scifb_data_0_mux[] = {
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PORT162_SCIFB_RXD_MARK, PORT160_SCIFB_TXD_MARK,
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};
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static const unsigned int scifb_clk_0_pins[] = {
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/* SCK */
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159,
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};
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static const unsigned int scifb_clk_0_mux[] = {
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PORT159_SCIFB_SCK_MARK,
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};
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static const unsigned int scifb_ctrl_0_pins[] = {
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/* RTS, CTS */
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163, 161,
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};
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static const unsigned int scifb_ctrl_0_mux[] = {
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PORT163_SCIFB_RTS__MARK, PORT161_SCIFB_CTS__MARK,
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};
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static const unsigned int scifb_data_1_pins[] = {
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/* RXD, TXD */
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246, 247,
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};
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static const unsigned int scifb_data_1_mux[] = {
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PORT246_SCIFB_RXD_MARK, PORT247_SCIFB_TXD_MARK,
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};
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static const unsigned int scifb_clk_1_pins[] = {
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/* SCK */
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248,
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};
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static const unsigned int scifb_clk_1_mux[] = {
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PORT248_SCIFB_SCK_MARK,
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};
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static const unsigned int scifb_ctrl_1_pins[] = {
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/* RTS, CTS */
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245, 244,
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};
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static const unsigned int scifb_ctrl_1_mux[] = {
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PORT245_SCIFB_RTS__MARK, PORT244_SCIFB_CTS__MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(lcd_data8),
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@ -2062,6 +2309,40 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(lcd2_sync_1),
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SH_PFC_PIN_GROUP(lcd2_sys_0),
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SH_PFC_PIN_GROUP(lcd2_sys_1),
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SH_PFC_PIN_GROUP(scifa0_data),
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SH_PFC_PIN_GROUP(scifa0_clk),
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SH_PFC_PIN_GROUP(scifa0_ctrl),
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SH_PFC_PIN_GROUP(scifa1_data),
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SH_PFC_PIN_GROUP(scifa1_clk),
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SH_PFC_PIN_GROUP(scifa1_ctrl),
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SH_PFC_PIN_GROUP(scifa2_data_0),
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SH_PFC_PIN_GROUP(scifa2_clk_0),
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SH_PFC_PIN_GROUP(scifa2_ctrl_0),
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SH_PFC_PIN_GROUP(scifa2_data_1),
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SH_PFC_PIN_GROUP(scifa2_clk_1),
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SH_PFC_PIN_GROUP(scifa2_ctrl_1),
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SH_PFC_PIN_GROUP(scifa3_data),
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SH_PFC_PIN_GROUP(scifa3_ctrl),
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SH_PFC_PIN_GROUP(scifa4_data),
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SH_PFC_PIN_GROUP(scifa4_ctrl),
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SH_PFC_PIN_GROUP(scifa5_data_0),
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SH_PFC_PIN_GROUP(scifa5_clk_0),
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SH_PFC_PIN_GROUP(scifa5_ctrl_0),
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SH_PFC_PIN_GROUP(scifa5_data_1),
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SH_PFC_PIN_GROUP(scifa5_clk_1),
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SH_PFC_PIN_GROUP(scifa5_ctrl_1),
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SH_PFC_PIN_GROUP(scifa5_data_2),
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SH_PFC_PIN_GROUP(scifa5_clk_2),
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SH_PFC_PIN_GROUP(scifa5_ctrl_2),
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SH_PFC_PIN_GROUP(scifa6),
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SH_PFC_PIN_GROUP(scifa7_data),
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SH_PFC_PIN_GROUP(scifa7_ctrl),
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SH_PFC_PIN_GROUP(scifb_data_0),
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SH_PFC_PIN_GROUP(scifb_clk_0),
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SH_PFC_PIN_GROUP(scifb_ctrl_0),
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SH_PFC_PIN_GROUP(scifb_data_1),
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SH_PFC_PIN_GROUP(scifb_clk_1),
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SH_PFC_PIN_GROUP(scifb_ctrl_1),
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};
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static const char * const lcd_groups[] = {
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@ -2090,9 +2371,79 @@ static const char * const lcd2_groups[] = {
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"lcd2_sys_1",
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};
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static const char * const scifa0_groups[] = {
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"scifa0_data",
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"scifa0_clk",
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"scifa0_ctrl",
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};
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static const char * const scifa1_groups[] = {
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"scifa1_data",
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"scifa1_clk",
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"scifa1_ctrl",
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};
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static const char * const scifa2_groups[] = {
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"scifa2_data_0",
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"scifa2_clk_0",
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"scifa2_ctrl_0",
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"scifa2_data_1",
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"scifa2_clk_1",
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"scifa2_ctrl_1",
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};
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static const char * const scifa3_groups[] = {
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"scifa3_data",
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"scifa3_ctrl",
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};
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static const char * const scifa4_groups[] = {
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"scifa4_data",
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"scifa4_ctrl",
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};
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static const char * const scifa5_groups[] = {
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"scifa5_data_0",
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"scifa5_clk_0",
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"scifa5_ctrl_0",
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"scifa5_data_1",
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"scifa5_clk_1",
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"scifa5_ctrl_1",
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"scifa5_data_2",
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"scifa5_clk_2",
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"scifa5_ctrl_2",
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};
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static const char * const scifa6_groups[] = {
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"scifa6",
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};
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static const char * const scifa7_groups[] = {
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"scifa7_data",
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"scifa7_ctrl",
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};
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static const char * const scifb_groups[] = {
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"scifb_data_0",
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"scifb_clk_0",
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"scifb_ctrl_0",
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"scifb_data_1",
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"scifb_clk_1",
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"scifb_ctrl_1",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(lcd),
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SH_PFC_FUNCTION(lcd2),
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SH_PFC_FUNCTION(scifa0),
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SH_PFC_FUNCTION(scifa1),
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SH_PFC_FUNCTION(scifa2),
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SH_PFC_FUNCTION(scifa3),
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SH_PFC_FUNCTION(scifa4),
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SH_PFC_FUNCTION(scifa5),
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SH_PFC_FUNCTION(scifa6),
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SH_PFC_FUNCTION(scifa7),
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SH_PFC_FUNCTION(scifb),
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};
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#define PINMUX_FN_BASE GPIO_FN_VBUS_0
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