gpio/samsung: Add device tree support for EXYNOS4
As gpio chips get registered, a device tree node which represents the gpio chip is searched and attached to it. A translate function is also provided to convert the gpio specifier into actual platform settings for pin function selection, pull up/down and driver strength settings. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> [kgene.kim@samsung.com: fixed build error] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Documentation/devicetree/bindings/gpio/gpio-samsung.txt
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40
Documentation/devicetree/bindings/gpio/gpio-samsung.txt
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@ -0,0 +1,40 @@
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Samsung Exynos4 GPIO Controller
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Required properties:
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- compatible: Compatible property value should be "samsung,exynos4-gpio>".
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- reg: Physical base address of the controller and length of memory mapped
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region.
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- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
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should be the following with values derived from the SoC user manual.
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<[phandle of the gpio controller node]
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[pin number within the gpio controller]
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[mux function]
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[pull up/down]
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[drive strength]>
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Values for gpio specifier:
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- Pin number: is a value between 0 to 7.
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- Pull Up/Down: 0 - Pull Up/Down Disabled.
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1 - Pull Down Enabled.
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3 - Pull Up Enabled.
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- Drive Strength: 0 - 1x,
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1 - 3x,
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2 - 2x,
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3 - 4x
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- gpio-controller: Specifies that the node is a gpio controller.
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- #address-cells: should be 1.
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- #size-cells: should be 1.
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Example:
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gpa0: gpio-controller@11400000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "samsung,exynos4-gpio";
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reg = <0x11400000 0x20>;
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#gpio-cells = <4>;
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gpio-controller;
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};
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@ -24,6 +24,9 @@
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#include <linux/interrupt.h>
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#include <linux/sysdev.h>
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#include <linux/ioport.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <linux/of_address.h>
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#include <asm/irq.h>
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@ -2374,6 +2377,63 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
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#endif
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};
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#if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF)
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static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np,
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const void *gpio_spec, u32 *flags)
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{
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const __be32 *gpio = gpio_spec;
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const u32 n = be32_to_cpup(gpio);
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unsigned int pin = gc->base + be32_to_cpu(gpio[0]);
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if (WARN_ON(gc->of_gpio_n_cells < 4))
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return -EINVAL;
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if (n > gc->ngpio)
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return -EINVAL;
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if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1]))))
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pr_warn("gpio_xlate: failed to set pin function\n");
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if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2])))
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pr_warn("gpio_xlate: failed to set pin pull up/down\n");
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if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3])))
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pr_warn("gpio_xlate: failed to set pin drive strength\n");
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return n;
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}
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static const struct of_device_id exynos4_gpio_dt_match[] __initdata = {
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{ .compatible = "samsung,exynos4-gpio", },
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{}
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};
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static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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struct gpio_chip *gc = &chip->chip;
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u64 address;
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if (!of_have_populated_dt())
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return;
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address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset;
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gc->of_node = of_find_matching_node_by_address(NULL,
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exynos4_gpio_dt_match, address);
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if (!gc->of_node) {
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pr_info("gpio: device tree node not found for gpio controller"
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" with base address %08llx\n", address);
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return;
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}
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gc->of_gpio_n_cells = 4;
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gc->of_xlate = exynos4_gpio_xlate;
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}
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#elif defined(CONFIG_ARCH_EXYNOS4)
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static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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return;
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}
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#endif /* defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) */
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/* TODO: cleanup soc_is_* */
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static __init int samsung_gpiolib_init(void)
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{
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@ -2455,6 +2515,10 @@ static __init int samsung_gpiolib_init(void)
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chip->config = &exynos4_gpio_cfg;
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chip->group = group++;
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}
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#ifdef CONFIG_CPU_EXYNOS4210
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exynos4_gpiolib_attach_ofnode(chip,
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EXYNOS4_PA_GPIO1, i * 0x20);
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#endif
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}
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samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1);
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@ -2467,6 +2531,10 @@ static __init int samsung_gpiolib_init(void)
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chip->config = &exynos4_gpio_cfg;
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chip->group = group++;
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}
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#ifdef CONFIG_CPU_EXYNOS4210
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exynos4_gpiolib_attach_ofnode(chip,
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EXYNOS4_PA_GPIO2, i * 0x20);
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#endif
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}
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samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2);
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@ -2479,6 +2547,10 @@ static __init int samsung_gpiolib_init(void)
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chip->config = &exynos4_gpio_cfg;
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chip->group = group++;
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}
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#ifdef CONFIG_CPU_EXYNOS4210
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exynos4_gpiolib_attach_ofnode(chip,
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EXYNOS4_PA_GPIO3, i * 0x20);
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#endif
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}
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samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3);
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