USB: ehci tdi : let's tdi_reset set host mode
tdi_reset is already taking care of setting host mode for tdi devices. Don't duplicate code in platform driver. Make ehci_halt a nop if the controller is not in host mode (otherwise it will fail), and let's ehci_reset do the tdi_reset. We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt knows we are a tdi device. Before the setup routine was doing : - put controller in host mode - ehci_halt - ehci_init - hcd->has_tt = 1; - ehci_reset Now we do : - hcd->has_tt = 1; - ehci_halt - ehci_init - ehci_reset PS : now we handle correctly the device -> host transition. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -233,8 +233,6 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
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mpc83xx_setup_phy(ehci, pdata->phy_mode, 1);
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}
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/* put controller in host mode. */
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ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
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#ifdef CONFIG_PPC_85xx
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out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
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out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
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@ -270,6 +268,8 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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hcd->has_tt = 1;
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retval = ehci_halt(ehci);
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if (retval)
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return retval;
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@ -279,8 +279,6 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
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if (retval)
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return retval;
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hcd->has_tt = 1;
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ehci->sbrn = 0x20;
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ehci_reset(ehci);
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@ -27,7 +27,6 @@
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#define PORT_PTS_SERIAL (3<<30)
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#define PORT_PTS_PTW (1<<28)
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#define FSL_SOC_USB_PORTSC2 0x188
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#define FSL_SOC_USB_USBMODE 0x1a8
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#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
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#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
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#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
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@ -194,6 +194,17 @@ static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
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return -ETIMEDOUT;
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}
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/* check TDI/ARC silicon is in host mode */
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static int tdi_in_host_mode (struct ehci_hcd *ehci)
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{
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u32 __iomem *reg_ptr;
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u32 tmp;
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reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
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tmp = ehci_readl(ehci, reg_ptr);
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return (tmp & 3) == USBMODE_CM_HC;
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}
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/* force HC to halt state from unknown (EHCI spec section 2.3) */
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static int ehci_halt (struct ehci_hcd *ehci)
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{
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@ -202,6 +213,10 @@ static int ehci_halt (struct ehci_hcd *ehci)
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/* disable any irqs left enabled by previous code */
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ehci_writel(ehci, 0, &ehci->regs->intr_enable);
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if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
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return 0;
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}
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if ((temp & STS_HALT) != 0)
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return 0;
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@ -26,9 +26,6 @@
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#include <mach/mxc_ehci.h>
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#define ULPI_VIEWPORT_OFFSET 0x170
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#define PORTSC_OFFSET 0x184
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#define USBMODE_OFFSET 0x1a8
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#define USBMODE_CM_HOST 3
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struct ehci_mxc_priv {
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struct clk *usbclk, *ahbclk;
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@ -51,6 +48,8 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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hcd->has_tt = 1;
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retval = ehci_halt(ehci);
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if (retval)
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return retval;
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@ -60,8 +59,6 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
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if (retval)
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return retval;
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hcd->has_tt = 1;
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ehci->sbrn = 0x20;
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ehci_reset(ehci);
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@ -191,12 +188,8 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev)
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clk_enable(priv->ahbclk);
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}
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/* set USBMODE to host mode */
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temp = readl(hcd->regs + USBMODE_OFFSET);
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writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);
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/* set up the PORTSCx register */
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writel(pdata->portsc, hcd->regs + PORTSC_OFFSET);
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ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
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mdelay(10);
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/* setup specific usb hw */
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