omap: Serial: Define register access modes in LCR
Access to some registers depends on register access mode Three different modes are available for OMAP (at least) • Operational mode LCR_REG[7] = 0x0 • Configuration mode A LCR_REG[7] = 0x1 and LCR_REG[7:0]! = 0xBF • Configuration mode B LCR_REG[7] = 0x1 and LCR_REG[7:0] = 0xBF Define access modes and remove redefinitions and magic numbers in serial drivers (and later in bluetooth driver). Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@nokia.com> Acked-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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498cb95175
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662b083a87
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@ -219,7 +219,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart)
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return;
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return;
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lcr = serial_read_reg(uart, UART_LCR);
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lcr = serial_read_reg(uart, UART_LCR);
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serial_write_reg(uart, UART_LCR, 0xBF);
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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uart->dll = serial_read_reg(uart, UART_DLL);
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uart->dll = serial_read_reg(uart, UART_DLL);
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uart->dlh = serial_read_reg(uart, UART_DLM);
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uart->dlh = serial_read_reg(uart, UART_DLM);
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serial_write_reg(uart, UART_LCR, lcr);
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serial_write_reg(uart, UART_LCR, lcr);
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@ -227,7 +227,7 @@ static void omap_uart_save_context(struct omap_uart_state *uart)
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uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
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uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
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uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
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uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
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uart->wer = serial_read_reg(uart, UART_OMAP_WER);
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uart->wer = serial_read_reg(uart, UART_OMAP_WER);
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serial_write_reg(uart, UART_LCR, 0x80);
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
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uart->mcr = serial_read_reg(uart, UART_MCR);
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uart->mcr = serial_read_reg(uart, UART_MCR);
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serial_write_reg(uart, UART_LCR, lcr);
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serial_write_reg(uart, UART_LCR, lcr);
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@ -251,19 +251,19 @@ static void omap_uart_restore_context(struct omap_uart_state *uart)
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else
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else
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serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
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serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
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serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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efr = serial_read_reg(uart, UART_EFR);
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efr = serial_read_reg(uart, UART_EFR);
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serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
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serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
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serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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serial_write_reg(uart, UART_IER, 0x0);
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serial_write_reg(uart, UART_IER, 0x0);
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serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_write_reg(uart, UART_DLL, uart->dll);
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serial_write_reg(uart, UART_DLL, uart->dll);
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serial_write_reg(uart, UART_DLM, uart->dlh);
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serial_write_reg(uart, UART_DLM, uart->dlh);
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serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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serial_write_reg(uart, UART_IER, uart->ier);
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serial_write_reg(uart, UART_IER, uart->ier);
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serial_write_reg(uart, UART_LCR, 0x80);
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_write_reg(uart, UART_MCR, uart->mcr);
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serial_write_reg(uart, UART_MCR, uart->mcr);
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serial_write_reg(uart, UART_LCR, 0xBF); /* Config B mode */
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serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_write_reg(uart, UART_EFR, efr);
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serial_write_reg(uart, UART_EFR, efr);
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serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
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serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
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serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
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serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
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@ -33,15 +33,6 @@
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#define OMAP_MODE13X_SPEED 230400
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#define OMAP_MODE13X_SPEED 230400
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/*
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* LCR = 0XBF: Switch to Configuration Mode B.
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* In configuration mode b allow access
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* to EFR,DLL,DLH.
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* Reference OMAP TRM Chapter 17
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* Section: 1.4.3 Mode Selection
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*/
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#define OMAP_UART_LCR_CONF_MDB 0XBF
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/* WER = 0x7F
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/* WER = 0x7F
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* Enable module level wakeup in WER reg
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* Enable module level wakeup in WER reg
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*/
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*/
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@ -653,13 +653,13 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
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{
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{
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if (p->capabilities & UART_CAP_SLEEP) {
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if (p->capabilities & UART_CAP_SLEEP) {
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if (p->capabilities & UART_CAP_EFR) {
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if (p->capabilities & UART_CAP_EFR) {
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serial_outp(p, UART_LCR, 0xBF);
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serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_outp(p, UART_EFR, UART_EFR_ECB);
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serial_outp(p, UART_EFR, UART_EFR_ECB);
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serial_outp(p, UART_LCR, 0);
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serial_outp(p, UART_LCR, 0);
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}
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}
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serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
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serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
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if (p->capabilities & UART_CAP_EFR) {
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if (p->capabilities & UART_CAP_EFR) {
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serial_outp(p, UART_LCR, 0xBF);
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serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_outp(p, UART_EFR, 0);
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serial_outp(p, UART_EFR, 0);
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serial_outp(p, UART_LCR, 0);
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serial_outp(p, UART_LCR, 0);
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}
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}
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@ -752,7 +752,7 @@ static int size_fifo(struct uart_8250_port *up)
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
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serial_outp(up, UART_MCR, UART_MCR_LOOP);
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serial_outp(up, UART_MCR, UART_MCR_LOOP);
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serial_outp(up, UART_LCR, UART_LCR_DLAB);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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old_dl = serial_dl_read(up);
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old_dl = serial_dl_read(up);
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serial_dl_write(up, 0x0001);
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serial_dl_write(up, 0x0001);
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serial_outp(up, UART_LCR, 0x03);
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serial_outp(up, UART_LCR, 0x03);
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@ -764,7 +764,7 @@ static int size_fifo(struct uart_8250_port *up)
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serial_inp(up, UART_RX);
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serial_inp(up, UART_RX);
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serial_outp(up, UART_FCR, old_fcr);
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serial_outp(up, UART_FCR, old_fcr);
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serial_outp(up, UART_MCR, old_mcr);
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serial_outp(up, UART_MCR, old_mcr);
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serial_outp(up, UART_LCR, UART_LCR_DLAB);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_dl_write(up, old_dl);
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serial_dl_write(up, old_dl);
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serial_outp(up, UART_LCR, old_lcr);
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serial_outp(up, UART_LCR, old_lcr);
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@ -782,7 +782,7 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
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unsigned int id;
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unsigned int id;
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old_lcr = serial_inp(p, UART_LCR);
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old_lcr = serial_inp(p, UART_LCR);
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serial_outp(p, UART_LCR, UART_LCR_DLAB);
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serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);
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old_dll = serial_inp(p, UART_DLL);
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old_dll = serial_inp(p, UART_DLL);
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old_dlm = serial_inp(p, UART_DLM);
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old_dlm = serial_inp(p, UART_DLM);
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@ -836,7 +836,7 @@ static void autoconfig_has_efr(struct uart_8250_port *up)
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* recommended for new designs).
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* recommended for new designs).
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*/
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*/
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up->acr = 0;
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up->acr = 0;
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serial_out(up, UART_LCR, 0xBF);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_out(up, UART_EFR, UART_EFR_ECB);
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serial_out(up, UART_EFR, UART_EFR_ECB);
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serial_out(up, UART_LCR, 0x00);
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serial_out(up, UART_LCR, 0x00);
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id1 = serial_icr_read(up, UART_ID1);
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id1 = serial_icr_read(up, UART_ID1);
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@ -945,7 +945,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* Check for presence of the EFR when DLAB is set.
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* Check for presence of the EFR when DLAB is set.
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* Only ST16C650V1 UARTs pass this test.
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* Only ST16C650V1 UARTs pass this test.
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*/
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*/
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serial_outp(up, UART_LCR, UART_LCR_DLAB);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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if (serial_in(up, UART_EFR) == 0) {
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if (serial_in(up, UART_EFR) == 0) {
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serial_outp(up, UART_EFR, 0xA8);
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serial_outp(up, UART_EFR, 0xA8);
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if (serial_in(up, UART_EFR) != 0) {
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if (serial_in(up, UART_EFR) != 0) {
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@ -963,7 +963,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* Maybe it requires 0xbf to be written to the LCR.
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* Maybe it requires 0xbf to be written to the LCR.
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* (other ST16C650V2 UARTs, TI16C752A, etc)
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* (other ST16C650V2 UARTs, TI16C752A, etc)
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*/
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*/
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serial_outp(up, UART_LCR, 0xBF);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
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if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
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DEBUG_AUTOCONF("EFRv2 ");
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DEBUG_AUTOCONF("EFRv2 ");
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autoconfig_has_efr(up);
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autoconfig_has_efr(up);
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@ -1024,7 +1024,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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status1 = serial_in(up, UART_IIR) >> 5;
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status1 = serial_in(up, UART_IIR) >> 5;
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_outp(up, UART_LCR, UART_LCR_DLAB);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
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status2 = serial_in(up, UART_IIR) >> 5;
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status2 = serial_in(up, UART_IIR) >> 5;
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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@ -1183,7 +1183,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
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* We also initialise the EFR (if any) to zero for later. The
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* We also initialise the EFR (if any) to zero for later. The
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* EFR occupies the same register location as the FCR and IIR.
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* EFR occupies the same register location as the FCR and IIR.
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*/
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*/
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serial_outp(up, UART_LCR, 0xBF);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_outp(up, UART_EFR, 0);
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serial_outp(up, UART_EFR, 0);
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serial_outp(up, UART_LCR, 0);
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serial_outp(up, UART_LCR, 0);
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@ -1952,7 +1952,7 @@ static int serial8250_startup(struct uart_port *port)
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if (up->port.type == PORT_16C950) {
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if (up->port.type == PORT_16C950) {
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/* Wake up and initialize UART */
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/* Wake up and initialize UART */
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up->acr = 0;
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up->acr = 0;
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serial_outp(up, UART_LCR, 0xBF);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_outp(up, UART_EFR, UART_EFR_ECB);
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serial_outp(up, UART_EFR, UART_EFR_ECB);
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serial_outp(up, UART_IER, 0);
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serial_outp(up, UART_IER, 0);
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serial_outp(up, UART_LCR, 0);
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serial_outp(up, UART_LCR, 0);
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@ -2002,7 +2002,7 @@ static int serial8250_startup(struct uart_port *port)
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if (up->port.type == PORT_16850) {
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if (up->port.type == PORT_16850) {
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unsigned char fctr;
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unsigned char fctr;
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serial_outp(up, UART_LCR, 0xbf);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
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fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
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serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
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serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
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@ -2363,7 +2363,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
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if (termios->c_cflag & CRTSCTS)
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if (termios->c_cflag & CRTSCTS)
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efr |= UART_EFR_CTS;
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efr |= UART_EFR_CTS;
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serial_outp(up, UART_LCR, 0xBF);
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serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_outp(up, UART_EFR, efr);
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serial_outp(up, UART_EFR, efr);
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}
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}
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@ -570,7 +570,7 @@ serial_omap_configure_xonxoff
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unsigned char efr = 0;
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unsigned char efr = 0;
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up->lcr = serial_in(up, UART_LCR);
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up->lcr = serial_in(up, UART_LCR);
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serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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up->efr = serial_in(up, UART_EFR);
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up->efr = serial_in(up, UART_EFR);
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serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
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serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
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@ -598,7 +598,7 @@ serial_omap_configure_xonxoff
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efr |= OMAP_UART_SW_RX;
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efr |= OMAP_UART_SW_RX;
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serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
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serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
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serial_out(up, UART_LCR, UART_LCR_DLAB);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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up->mcr = serial_in(up, UART_MCR);
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up->mcr = serial_in(up, UART_MCR);
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@ -612,14 +612,14 @@ serial_omap_configure_xonxoff
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up->mcr |= UART_MCR_XONANY;
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up->mcr |= UART_MCR_XONANY;
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serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
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serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
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serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
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serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
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/* Enable special char function UARTi.EFR_REG[5] and
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/* Enable special char function UARTi.EFR_REG[5] and
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* load the new software flow control mode IXON or IXOFF
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* load the new software flow control mode IXON or IXOFF
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* and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
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* and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
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*/
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*/
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serial_out(up, UART_EFR, efr | UART_EFR_SCD);
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serial_out(up, UART_EFR, efr | UART_EFR_SCD);
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serial_out(up, UART_LCR, UART_LCR_DLAB);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
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serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
|
||||||
serial_out(up, UART_LCR, up->lcr);
|
serial_out(up, UART_LCR, up->lcr);
|
||||||
|
@ -724,22 +724,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||||
* baud clock is not running
|
* baud clock is not running
|
||||||
* DLL_REG and DLH_REG set to 0.
|
* DLL_REG and DLH_REG set to 0.
|
||||||
*/
|
*/
|
||||||
serial_out(up, UART_LCR, UART_LCR_DLAB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||||
serial_out(up, UART_DLL, 0);
|
serial_out(up, UART_DLL, 0);
|
||||||
serial_out(up, UART_DLM, 0);
|
serial_out(up, UART_DLM, 0);
|
||||||
serial_out(up, UART_LCR, 0);
|
serial_out(up, UART_LCR, 0);
|
||||||
|
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
|
|
||||||
up->efr = serial_in(up, UART_EFR);
|
up->efr = serial_in(up, UART_EFR);
|
||||||
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
||||||
|
|
||||||
serial_out(up, UART_LCR, UART_LCR_DLAB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||||
up->mcr = serial_in(up, UART_MCR);
|
up->mcr = serial_in(up, UART_MCR);
|
||||||
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
|
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
|
||||||
/* FIFO ENABLE, DMA MODE */
|
/* FIFO ENABLE, DMA MODE */
|
||||||
serial_out(up, UART_FCR, up->fcr);
|
serial_out(up, UART_FCR, up->fcr);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
|
|
||||||
if (up->use_dma) {
|
if (up->use_dma) {
|
||||||
serial_out(up, UART_TI752_TLR, 0);
|
serial_out(up, UART_TI752_TLR, 0);
|
||||||
|
@ -748,27 +748,27 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||||
}
|
}
|
||||||
|
|
||||||
serial_out(up, UART_EFR, up->efr);
|
serial_out(up, UART_EFR, up->efr);
|
||||||
serial_out(up, UART_LCR, UART_LCR_DLAB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||||
serial_out(up, UART_MCR, up->mcr);
|
serial_out(up, UART_MCR, up->mcr);
|
||||||
|
|
||||||
/* Protocol, Baud Rate, and Interrupt Settings */
|
/* Protocol, Baud Rate, and Interrupt Settings */
|
||||||
|
|
||||||
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
|
|
||||||
up->efr = serial_in(up, UART_EFR);
|
up->efr = serial_in(up, UART_EFR);
|
||||||
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
||||||
|
|
||||||
serial_out(up, UART_LCR, 0);
|
serial_out(up, UART_LCR, 0);
|
||||||
serial_out(up, UART_IER, 0);
|
serial_out(up, UART_IER, 0);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
|
|
||||||
serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
|
serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
|
||||||
serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
|
serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
|
||||||
|
|
||||||
serial_out(up, UART_LCR, 0);
|
serial_out(up, UART_LCR, 0);
|
||||||
serial_out(up, UART_IER, up->ier);
|
serial_out(up, UART_IER, up->ier);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
|
|
||||||
serial_out(up, UART_EFR, up->efr);
|
serial_out(up, UART_EFR, up->efr);
|
||||||
serial_out(up, UART_LCR, cval);
|
serial_out(up, UART_LCR, cval);
|
||||||
|
@ -782,18 +782,18 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
||||||
|
|
||||||
if (termios->c_cflag & CRTSCTS) {
|
if (termios->c_cflag & CRTSCTS) {
|
||||||
efr |= (UART_EFR_CTS | UART_EFR_RTS);
|
efr |= (UART_EFR_CTS | UART_EFR_RTS);
|
||||||
serial_out(up, UART_LCR, UART_LCR_DLAB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||||
|
|
||||||
up->mcr = serial_in(up, UART_MCR);
|
up->mcr = serial_in(up, UART_MCR);
|
||||||
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
|
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
|
||||||
|
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
up->efr = serial_in(up, UART_EFR);
|
up->efr = serial_in(up, UART_EFR);
|
||||||
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
|
||||||
|
|
||||||
serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
|
serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
|
||||||
serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
|
serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
|
||||||
serial_out(up, UART_LCR, UART_LCR_DLAB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||||
serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
|
serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
|
||||||
serial_out(up, UART_LCR, cval);
|
serial_out(up, UART_LCR, cval);
|
||||||
}
|
}
|
||||||
|
@ -815,13 +815,13 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
|
||||||
unsigned char efr;
|
unsigned char efr;
|
||||||
|
|
||||||
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
|
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
efr = serial_in(up, UART_EFR);
|
efr = serial_in(up, UART_EFR);
|
||||||
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
|
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
|
||||||
serial_out(up, UART_LCR, 0);
|
serial_out(up, UART_LCR, 0);
|
||||||
|
|
||||||
serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
|
serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
|
||||||
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
|
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||||
serial_out(up, UART_EFR, efr);
|
serial_out(up, UART_EFR, efr);
|
||||||
serial_out(up, UART_LCR, 0);
|
serial_out(up, UART_LCR, 0);
|
||||||
/* Enable module level wake up */
|
/* Enable module level wake up */
|
||||||
|
|
|
@ -99,6 +99,13 @@
|
||||||
#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
|
#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
|
||||||
#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
|
#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Access to some registers depends on register access / configuration
|
||||||
|
* mode.
|
||||||
|
*/
|
||||||
|
#define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configutation mode A */
|
||||||
|
#define UART_LCR_CONF_MODE_B 0xBF /* Configutation mode B */
|
||||||
|
|
||||||
#define UART_MCR 4 /* Out: Modem Control Register */
|
#define UART_MCR 4 /* Out: Modem Control Register */
|
||||||
#define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */
|
#define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */
|
||||||
#define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */
|
#define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */
|
||||||
|
|
Loading…
Reference in a new issue