mtd: sh_flctl: Restructure the hardware ECC handling
There are multiple reasons for a rewrite: - a race exists: when _4ECCEND is set, _4ECCFA may become true too meanwhile, which is lost and a non-correctable error is treated as correctable. - the ECC statistics don't get properly propagated to the base code. - empty pages would get marked as corrupted The rewrite resolves the issues and I hope it gives a more explicit code flow structure. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -165,27 +165,56 @@ static void wait_wfifo_ready(struct sh_flctl *flctl)
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timeout_error(flctl, __func__);
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}
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static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number)
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static enum flctl_ecc_res_t wait_recfifo_ready
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(struct sh_flctl *flctl, int sector_number)
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{
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uint32_t timeout = LOOP_TIMEOUT_MAX;
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int checked[4];
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void __iomem *ecc_reg[4];
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int i;
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int state = FL_SUCCESS;
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uint32_t data, size;
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memset(checked, 0, sizeof(checked));
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/*
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* First this loops checks in FLDTCNTR if we are ready to read out the
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* oob data. This is the case if either all went fine without errors or
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* if the bottom part of the loop corrected the errors or marked them as
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* uncorrectable and the controller is given time to push the data into
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* the FIFO.
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*/
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while (timeout--) {
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/* check if all is ok and we can read out the OOB */
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size = readl(FLDTCNTR(flctl)) >> 24;
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if (size & 0xFF)
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return 0; /* success */
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if (readl(FL4ECCCR(flctl)) & _4ECCFA)
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return 1; /* can't correct */
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if ((size & 0xFF) == 4)
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return state;
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/* check if a correction code has been calculated */
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if (!(readl(FL4ECCCR(flctl)) & _4ECCEND)) {
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/*
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* either we wait for the fifo to be filled or a
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* correction pattern is being generated
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*/
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udelay(1);
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if (!(readl(FL4ECCCR(flctl)) & _4ECCEND))
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continue;
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}
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/* check for an uncorrectable error */
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if (readl(FL4ECCCR(flctl)) & _4ECCFA) {
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/* check if we face a non-empty page */
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for (i = 0; i < 512; i++) {
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if (flctl->done_buff[i] != 0xff) {
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state = FL_ERROR; /* can't correct */
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break;
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}
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}
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if (state == FL_SUCCESS)
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dev_dbg(&flctl->pdev->dev,
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"reading empty sector %d, ecc error ignored\n",
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sector_number);
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writel(0, FL4ECCCR(flctl));
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continue;
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}
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/* start error correction */
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ecc_reg[0] = FL4ECCRESULT0(flctl);
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@ -194,11 +223,11 @@ static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number)
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ecc_reg[3] = FL4ECCRESULT3(flctl);
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for (i = 0; i < 3; i++) {
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data = readl(ecc_reg[i]);
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if (data != INIT_FL4ECCRESULT_VAL && !checked[i]) {
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uint8_t org;
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int index;
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data = readl(ecc_reg[i]);
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if (flctl->page_size)
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index = (512 * sector_number) +
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(data >> 16);
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@ -207,15 +236,13 @@ static int wait_recfifo_ready(struct sh_flctl *flctl, int sector_number)
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org = flctl->done_buff[index];
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flctl->done_buff[index] = org ^ (data & 0xFF);
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checked[i] = 1;
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}
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}
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state = FL_REPAIRABLE;
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writel(0, FL4ECCCR(flctl));
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}
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timeout_error(flctl, __func__);
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return 1; /* timeout */
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return FL_TIMEOUT; /* timeout */
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}
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static void wait_wecfifo_ready(struct sh_flctl *flctl)
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@ -259,20 +286,23 @@ static void read_fiforeg(struct sh_flctl *flctl, int rlen, int offset)
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}
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}
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static int read_ecfiforeg(struct sh_flctl *flctl, uint8_t *buff, int sector)
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static enum flctl_ecc_res_t read_ecfiforeg
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(struct sh_flctl *flctl, uint8_t *buff, int sector)
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{
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int i;
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enum flctl_ecc_res_t res;
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unsigned long *ecc_buf = (unsigned long *)buff;
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void *fifo_addr = (void *)FLECFIFO(flctl);
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res = wait_recfifo_ready(flctl , sector);
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if (res != FL_ERROR) {
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for (i = 0; i < 4; i++) {
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if (wait_recfifo_ready(flctl , sector))
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return 1;
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ecc_buf[i] = readl(fifo_addr);
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ecc_buf[i] = readl(FLECFIFO(flctl));
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ecc_buf[i] = be32_to_cpu(ecc_buf[i]);
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}
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}
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return 0;
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return res;
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}
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static void write_fiforeg(struct sh_flctl *flctl, int rlen, int offset)
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@ -367,6 +397,7 @@ static void execmd_read_page_sector(struct mtd_info *mtd, int page_addr)
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{
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struct sh_flctl *flctl = mtd_to_flctl(mtd);
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int sector, page_sectors;
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enum flctl_ecc_res_t ecc_result;
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page_sectors = flctl->page_size ? 4 : 1;
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@ -382,17 +413,27 @@ static void execmd_read_page_sector(struct mtd_info *mtd, int page_addr)
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start_translation(flctl);
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for (sector = 0; sector < page_sectors; sector++) {
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int ret;
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read_fiforeg(flctl, 512, 512 * sector);
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ret = read_ecfiforeg(flctl,
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ecc_result = read_ecfiforeg(flctl,
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&flctl->done_buff[mtd->writesize + 16 * sector],
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sector);
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if (ret)
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flctl->hwecc_cant_correct[sector] = 1;
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writel(0x0, FL4ECCCR(flctl));
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switch (ecc_result) {
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case FL_REPAIRABLE:
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dev_info(&flctl->pdev->dev,
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"applied ecc on page 0x%x", page_addr);
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flctl->mtd.ecc_stats.corrected++;
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break;
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case FL_ERROR:
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dev_warn(&flctl->pdev->dev,
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"page 0x%x contains corrupted data\n",
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page_addr);
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flctl->mtd.ecc_stats.failed++;
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break;
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default:
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;
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}
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}
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wait_completion(flctl);
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@ -129,9 +129,15 @@
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#define _4ECCEND (0x1 << 1) /* 4 symbols end */
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#define _4ECCEXST (0x1 << 0) /* 4 symbols exist */
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#define INIT_FL4ECCRESULT_VAL 0x03FF03FF
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#define LOOP_TIMEOUT_MAX 0x00010000
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enum flctl_ecc_res_t {
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FL_SUCCESS,
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FL_REPAIRABLE,
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FL_ERROR,
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FL_TIMEOUT
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};
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struct sh_flctl {
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struct mtd_info mtd;
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struct nand_chip chip;
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@ -151,8 +157,6 @@ struct sh_flctl {
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uint32_t flcmncr_base; /* base value of FLCMNCR */
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uint32_t flintdmacr_base; /* irq enable bits */
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int hwecc_cant_correct[4];
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unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */
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unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
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unsigned holden:1; /* Hardware has FLHOLDCR and HOLDEN is set */
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