bnx2x: Support reading I2C EEPROM SFF8472
Add full support for "ethtool -m" command. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
1d6f3cd898
commit
669d69967e
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@ -1393,10 +1393,9 @@ static int bnx2x_get_module_eeprom(struct net_device *dev,
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u8 *data)
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{
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struct bnx2x *bp = netdev_priv(dev);
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int rc = 0, phy_idx;
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int rc = -EINVAL, phy_idx;
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u8 *user_data = data;
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int remaining_len = ee->len, xfer_size;
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unsigned int page_off = ee->offset;
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unsigned int start_addr = ee->offset, xfer_size = 0;
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if (!netif_running(dev)) {
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DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM,
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@ -1405,21 +1404,52 @@ static int bnx2x_get_module_eeprom(struct net_device *dev,
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}
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phy_idx = bnx2x_get_cur_phy_idx(bp);
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bnx2x_acquire_phy_lock(bp);
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while (!rc && remaining_len > 0) {
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xfer_size = (remaining_len > SFP_EEPROM_PAGE_SIZE) ?
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SFP_EEPROM_PAGE_SIZE : remaining_len;
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/* Read A0 section */
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if (start_addr < ETH_MODULE_SFF_8079_LEN) {
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/* Limit transfer size to the A0 section boundary */
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if (start_addr + ee->len > ETH_MODULE_SFF_8079_LEN)
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xfer_size = ETH_MODULE_SFF_8079_LEN - start_addr;
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else
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xfer_size = ee->len;
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bnx2x_acquire_phy_lock(bp);
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rc = bnx2x_read_sfp_module_eeprom(&bp->link_params.phy[phy_idx],
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&bp->link_params,
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page_off,
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I2C_DEV_ADDR_A0,
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start_addr,
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xfer_size,
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user_data);
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remaining_len -= xfer_size;
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bnx2x_release_phy_lock(bp);
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if (rc) {
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DP(BNX2X_MSG_ETHTOOL, "Failed reading A0 section\n");
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return -EINVAL;
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}
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user_data += xfer_size;
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page_off += xfer_size;
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start_addr += xfer_size;
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}
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bnx2x_release_phy_lock(bp);
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/* Read A2 section */
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if ((start_addr >= ETH_MODULE_SFF_8079_LEN) &&
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(start_addr < ETH_MODULE_SFF_8472_LEN)) {
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xfer_size = ee->len - xfer_size;
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/* Limit transfer size to the A2 section boundary */
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if (start_addr + xfer_size > ETH_MODULE_SFF_8472_LEN)
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xfer_size = ETH_MODULE_SFF_8472_LEN - start_addr;
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start_addr -= ETH_MODULE_SFF_8079_LEN;
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bnx2x_acquire_phy_lock(bp);
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rc = bnx2x_read_sfp_module_eeprom(&bp->link_params.phy[phy_idx],
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&bp->link_params,
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I2C_DEV_ADDR_A2,
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start_addr,
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xfer_size,
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user_data);
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bnx2x_release_phy_lock(bp);
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if (rc) {
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DP(BNX2X_MSG_ETHTOOL, "Failed reading A2 section\n");
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return -EINVAL;
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}
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}
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return rc;
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}
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@ -1427,24 +1457,50 @@ static int bnx2x_get_module_info(struct net_device *dev,
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struct ethtool_modinfo *modinfo)
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{
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struct bnx2x *bp = netdev_priv(dev);
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int phy_idx;
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int phy_idx, rc;
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u8 sff8472_comp, diag_type;
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if (!netif_running(dev)) {
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DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM,
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DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM,
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"cannot access eeprom when the interface is down\n");
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return -EAGAIN;
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}
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phy_idx = bnx2x_get_cur_phy_idx(bp);
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switch (bp->link_params.phy[phy_idx].media_type) {
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case ETH_PHY_SFPP_10G_FIBER:
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case ETH_PHY_SFP_1G_FIBER:
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case ETH_PHY_DA_TWINAX:
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bnx2x_acquire_phy_lock(bp);
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rc = bnx2x_read_sfp_module_eeprom(&bp->link_params.phy[phy_idx],
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&bp->link_params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_SFF_8472_COMP_ADDR,
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SFP_EEPROM_SFF_8472_COMP_SIZE,
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&sff8472_comp);
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bnx2x_release_phy_lock(bp);
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if (rc) {
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DP(BNX2X_MSG_ETHTOOL, "Failed reading SFF-8472 comp field\n");
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return -EINVAL;
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}
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bnx2x_acquire_phy_lock(bp);
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rc = bnx2x_read_sfp_module_eeprom(&bp->link_params.phy[phy_idx],
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&bp->link_params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_DIAG_TYPE_ADDR,
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SFP_EEPROM_DIAG_TYPE_SIZE,
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&diag_type);
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bnx2x_release_phy_lock(bp);
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if (rc) {
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DP(BNX2X_MSG_ETHTOOL, "Failed reading Diag Type field\n");
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return -EINVAL;
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}
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if (!sff8472_comp ||
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(diag_type & SFP_EEPROM_DIAG_ADDR_CHANGE_REQ)) {
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modinfo->type = ETH_MODULE_SFF_8079;
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modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
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return 0;
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default:
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return -EOPNOTSUPP;
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} else {
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modinfo->type = ETH_MODULE_SFF_8472;
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modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
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}
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return 0;
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}
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static int bnx2x_nvram_write_dword(struct bnx2x *bp, u32 offset, u32 val,
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@ -27,6 +27,10 @@
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#include "bnx2x.h"
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#include "bnx2x_cmn.h"
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typedef int (*read_sfp_module_eeprom_func_p)(struct bnx2x_phy *phy,
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struct link_params *params,
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u8 dev_addr, u16 addr, u8 byte_cnt,
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u8 *o_buf, u8);
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/********************************************************/
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#define ETH_HLEN 14
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/* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
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@ -3128,11 +3132,6 @@ static int bnx2x_bsc_read(struct link_params *params,
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int rc = 0;
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struct bnx2x *bp = params->bp;
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if ((sl_devid != 0xa0) && (sl_devid != 0xa2)) {
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DP(NETIF_MSG_LINK, "invalid sl_devid 0x%x\n", sl_devid);
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return -EINVAL;
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}
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if (xfer_cnt > 16) {
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DP(NETIF_MSG_LINK, "invalid xfer_cnt %d. Max is 16 bytes\n",
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xfer_cnt);
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@ -7770,7 +7769,8 @@ static void bnx2x_sfp_set_transmitter(struct link_params *params,
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static int bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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struct link_params *params,
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u16 addr, u8 byte_cnt, u8 *o_buf)
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u8 dev_addr, u16 addr, u8 byte_cnt,
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u8 *o_buf, u8 is_init)
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{
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struct bnx2x *bp = params->bp;
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u16 val = 0;
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@ -7783,7 +7783,7 @@ static int bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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/* Set the read command byte count */
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bnx2x_cl45_write(bp, phy,
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MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT,
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(byte_cnt | 0xa000));
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(byte_cnt | (dev_addr << 8)));
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/* Set the read command address */
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bnx2x_cl45_write(bp, phy,
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@ -7857,6 +7857,7 @@ static void bnx2x_warpcore_power_module(struct link_params *params,
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}
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static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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struct link_params *params,
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u8 dev_addr,
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u16 addr, u8 byte_cnt,
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u8 *o_buf, u8 is_init)
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{
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@ -7881,7 +7882,7 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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usleep_range(1000, 2000);
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bnx2x_warpcore_power_module(params, 1);
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}
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rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt,
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rc = bnx2x_bsc_read(params, phy, dev_addr, addr32, 0, byte_cnt,
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data_array);
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} while ((rc != 0) && (++cnt < I2C_WA_RETRY_CNT));
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@ -7897,7 +7898,8 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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struct link_params *params,
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u16 addr, u8 byte_cnt, u8 *o_buf)
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u8 dev_addr, u16 addr, u8 byte_cnt,
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u8 *o_buf, u8 is_init)
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{
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struct bnx2x *bp = params->bp;
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u16 val, i;
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@ -7908,6 +7910,15 @@ static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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return -EINVAL;
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}
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/* Set 2-wire transfer rate of SFP+ module EEPROM
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* to 100Khz since some DACs(direct attached cables) do
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* not work at 400Khz.
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*/
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bnx2x_cl45_write(bp, phy,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR,
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((dev_addr << 8) | 1));
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/* Need to read from 1.8000 to clear it */
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bnx2x_cl45_read(bp, phy,
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MDIO_PMA_DEVAD,
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@ -7980,26 +7991,44 @@ static int bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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return -EINVAL;
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}
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int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
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struct link_params *params, u16 addr,
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u8 byte_cnt, u8 *o_buf)
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struct link_params *params, u8 dev_addr,
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u16 addr, u16 byte_cnt, u8 *o_buf)
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{
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int rc = -EOPNOTSUPP;
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int rc = 0;
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struct bnx2x *bp = params->bp;
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u8 xfer_size;
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u8 *user_data = o_buf;
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read_sfp_module_eeprom_func_p read_func;
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if ((dev_addr != 0xa0) && (dev_addr != 0xa2)) {
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DP(NETIF_MSG_LINK, "invalid dev_addr 0x%x\n", dev_addr);
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return -EINVAL;
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}
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switch (phy->type) {
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
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rc = bnx2x_8726_read_sfp_module_eeprom(phy, params, addr,
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byte_cnt, o_buf);
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break;
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read_func = bnx2x_8726_read_sfp_module_eeprom;
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break;
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727:
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8722:
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rc = bnx2x_8727_read_sfp_module_eeprom(phy, params, addr,
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byte_cnt, o_buf);
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break;
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read_func = bnx2x_8727_read_sfp_module_eeprom;
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break;
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case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT:
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rc = bnx2x_warpcore_read_sfp_module_eeprom(phy, params, addr,
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byte_cnt, o_buf, 0);
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break;
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read_func = bnx2x_warpcore_read_sfp_module_eeprom;
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break;
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default:
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return -EOPNOTSUPP;
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}
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while (!rc && (byte_cnt > 0)) {
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xfer_size = (byte_cnt > SFP_EEPROM_PAGE_SIZE) ?
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SFP_EEPROM_PAGE_SIZE : byte_cnt;
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rc = read_func(phy, params, dev_addr, addr, xfer_size,
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user_data, 0);
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byte_cnt -= xfer_size;
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user_data += xfer_size;
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addr += xfer_size;
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}
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return rc;
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}
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@ -8016,6 +8045,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
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/* First check for copper cable */
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if (bnx2x_read_sfp_module_eeprom(phy,
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params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_CON_TYPE_ADDR,
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2,
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(u8 *)val) != 0) {
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@ -8033,6 +8063,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
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*/
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if (bnx2x_read_sfp_module_eeprom(phy,
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params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_FC_TX_TECH_ADDR,
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1,
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&copper_module_type) != 0) {
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@ -8117,6 +8148,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy,
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u8 options[SFP_EEPROM_OPTIONS_SIZE];
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if (bnx2x_read_sfp_module_eeprom(phy,
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params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_OPTIONS_ADDR,
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SFP_EEPROM_OPTIONS_SIZE,
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options) != 0) {
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@ -8183,6 +8215,7 @@ static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
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/* Format the warning message */
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if (bnx2x_read_sfp_module_eeprom(phy,
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params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_VENDOR_NAME_ADDR,
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SFP_EEPROM_VENDOR_NAME_SIZE,
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(u8 *)vendor_name))
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@ -8191,6 +8224,7 @@ static int bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
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vendor_name[SFP_EEPROM_VENDOR_NAME_SIZE] = '\0';
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if (bnx2x_read_sfp_module_eeprom(phy,
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params,
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I2C_DEV_ADDR_A0,
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SFP_EEPROM_PART_NO_ADDR,
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SFP_EEPROM_PART_NO_SIZE,
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(u8 *)vendor_pn))
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@ -8221,12 +8255,13 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,
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for (timeout = 0; timeout < 60; timeout++) {
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if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT)
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rc = bnx2x_warpcore_read_sfp_module_eeprom(phy,
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params, 1,
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1, &val, 1);
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rc = bnx2x_warpcore_read_sfp_module_eeprom(
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phy, params, I2C_DEV_ADDR_A0, 1, 1, &val,
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1);
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else
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rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1,
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&val);
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rc = bnx2x_read_sfp_module_eeprom(phy, params,
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I2C_DEV_ADDR_A0,
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1, 1, &val);
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if (rc == 0) {
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DP(NETIF_MSG_LINK,
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"SFP+ module initialization took %d ms\n",
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@ -8235,7 +8270,8 @@ static int bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,
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}
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usleep_range(5000, 10000);
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}
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rc = bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val);
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rc = bnx2x_read_sfp_module_eeprom(phy, params, I2C_DEV_ADDR_A0,
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1, 1, &val);
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return rc;
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}
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@ -8392,15 +8428,6 @@ static void bnx2x_8727_specific_func(struct bnx2x_phy *phy,
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bnx2x_cl45_write(bp, phy,
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MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_PCS_OPT_CTRL,
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val);
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/* Set 2-wire transfer rate of SFP+ module EEPROM
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* to 100Khz since some DACs(direct attached cables) do
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* not work at 400Khz.
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*/
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bnx2x_cl45_write(bp, phy,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR,
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0xa001);
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break;
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default:
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DP(NETIF_MSG_LINK, "Function 0x%x not supported by 8727\n",
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@ -41,6 +41,9 @@
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#define SPEED_AUTO_NEG 0
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#define SPEED_20000 20000
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#define I2C_DEV_ADDR_A0 0xa0
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#define I2C_DEV_ADDR_A2 0xa2
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#define SFP_EEPROM_PAGE_SIZE 16
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#define SFP_EEPROM_VENDOR_NAME_ADDR 0x14
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#define SFP_EEPROM_VENDOR_NAME_SIZE 16
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@ -54,6 +57,15 @@
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#define SFP_EEPROM_SERIAL_SIZE 16
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#define SFP_EEPROM_DATE_ADDR 0x54 /* ASCII YYMMDD */
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#define SFP_EEPROM_DATE_SIZE 6
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#define SFP_EEPROM_DIAG_TYPE_ADDR 0x5c
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#define SFP_EEPROM_DIAG_TYPE_SIZE 1
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#define SFP_EEPROM_DIAG_ADDR_CHANGE_REQ (1<<2)
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#define SFP_EEPROM_SFF_8472_COMP_ADDR 0x5e
|
||||
#define SFP_EEPROM_SFF_8472_COMP_SIZE 1
|
||||
|
||||
#define SFP_EEPROM_A2_CHECKSUM_RANGE 0x5e
|
||||
#define SFP_EEPROM_A2_CC_DMI_ADDR 0x5f
|
||||
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||||
#define PWR_FLT_ERR_MSG_LEN 250
|
||||
|
||||
#define XGXS_EXT_PHY_TYPE(ext_phy_config) \
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|
@ -420,8 +432,8 @@ void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy);
|
|||
|
||||
/* Read "byte_cnt" bytes from address "addr" from the SFP+ EEPROM */
|
||||
int bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
|
||||
struct link_params *params, u16 addr,
|
||||
u8 byte_cnt, u8 *o_buf);
|
||||
struct link_params *params, u8 dev_addr,
|
||||
u16 addr, u16 byte_cnt, u8 *o_buf);
|
||||
|
||||
void bnx2x_hw_reset_phy(struct link_params *params);
|
||||
|
||||
|
|
Loading…
Reference in a new issue