clk: si5351: Fix clkout rate computation.
Rate was incorrectly computed because we read from wrong divider register. Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: stable@kernel.org
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@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
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unsigned char reg;
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unsigned char rdiv;
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if (hwdata->num > 5)
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if (hwdata->num <= 5)
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reg = si5351_msynth_params_address(hwdata->num) + 2;
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else
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reg = SI5351_CLK6_7_OUTPUT_DIVIDER;
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