tg3: Enable GPHY APD on select devices
GPHY Autopowerdown (APD) is a way to save power when energy is not detected on the wire. At the moment, only the 5784 and 5761 are capable of enabling this mode. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1474,6 +1474,34 @@ static void tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
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tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
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}
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static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
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{
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u32 reg;
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if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
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return;
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reg = MII_TG3_MISC_SHDW_WREN |
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MII_TG3_MISC_SHDW_SCR5_SEL |
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MII_TG3_MISC_SHDW_SCR5_LPED |
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MII_TG3_MISC_SHDW_SCR5_DLPTLM |
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MII_TG3_MISC_SHDW_SCR5_SDTL |
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MII_TG3_MISC_SHDW_SCR5_C125OE;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 || !enable)
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reg |= MII_TG3_MISC_SHDW_SCR5_DLLAPD;
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tg3_writephy(tp, MII_TG3_MISC_SHDW, reg);
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reg = MII_TG3_MISC_SHDW_WREN |
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MII_TG3_MISC_SHDW_APD_SEL |
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MII_TG3_MISC_SHDW_APD_WKTM_84MS;
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if (enable)
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reg |= MII_TG3_MISC_SHDW_APD_ENABLE;
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tg3_writephy(tp, MII_TG3_MISC_SHDW, reg);
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}
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static void tg3_phy_toggle_automdix(struct tg3 *tp, int enable)
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{
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u32 phy;
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@ -1816,16 +1844,15 @@ static int tg3_phy_reset(struct tg3 *tp)
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udelay(40);
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tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val);
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}
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/* Disable GPHY autopowerdown. */
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tg3_writephy(tp, MII_TG3_MISC_SHDW,
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MII_TG3_MISC_SHDW_WREN |
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MII_TG3_MISC_SHDW_APD_SEL |
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MII_TG3_MISC_SHDW_APD_WKTM_84MS);
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}
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tg3_phy_apply_otp(tp);
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if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
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tg3_phy_toggle_apd(tp, true);
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else
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tg3_phy_toggle_apd(tp, false);
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out:
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if (tp->tg3_flags2 & TG3_FLG2_PHY_ADC_BUG) {
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tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
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@ -10264,6 +10291,10 @@ static int tg3_test_loopback(struct tg3 *tp)
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if (err)
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return TG3_LOOPBACK_FAILED;
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/* Turn off gphy autopowerdown. */
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if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
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tg3_phy_toggle_apd(tp, false);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) {
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@ -10308,6 +10339,10 @@ static int tg3_test_loopback(struct tg3 *tp)
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err |= TG3_PHY_LOOPBACK_FAILED;
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}
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/* Re-enable gphy autopowerdown. */
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if (tp->tg3_flags3 & TG3_FLG3_PHY_ENABLE_APD)
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tg3_phy_toggle_apd(tp, true);
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return err;
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}
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@ -11596,6 +11631,11 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
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if (cfg2 & (1 << 18))
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tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
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GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX &&
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(cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
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tp->tg3_flags3 |= TG3_FLG3_PHY_ENABLE_APD;
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if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
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u32 cfg3;
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@ -1822,6 +1822,7 @@
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#define NIC_SRAM_DATA_CFG_2 0x00000d38
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#define NIC_SRAM_DATA_CFG_2_APD_EN 0x00000400
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#define SHASTA_EXT_LED_MODE_MASK 0x00018000
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#define SHASTA_EXT_LED_LEGACY 0x00000000
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#define SHASTA_EXT_LED_SHARED 0x00008000
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@ -2619,6 +2620,7 @@ struct tg3 {
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#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200
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#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400
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#define TG3_FLG3_CLKREQ_BUG 0x00000800
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#define TG3_FLG3_PHY_ENABLE_APD 0x00001000
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struct timer_list timer;
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u16 timer_counter;
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