memory: emif: add interrupt and temperature handling
Add an ISR for EMIF that: 1. reports details of access errors 2. takes action on thermal events Also clear all interrupts on shut-down. Pending IRQs may casue problems during warm-reset. Temperature handling: EMIF can be configured to poll the temperature level of an LPDDR2 device from the MR4 mode register in the device. EMIF generates an interrupt whenever it identifies a temperature level change between two consecutive pollings. Some of the timing parameters need to be de-rated at high temperatures. The interrupt handler takes care of doing this and also takes care of going back to nominal settings when temperature falls back to nominal levels. Signed-off-by: Aneesh V <aneesh@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Benoit Cousson <b-cousson@ti.com> [santosh.shilimkar@ti.com: Moved to drivers/memory from drivers/misc] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -544,6 +544,42 @@ static u32 get_pwr_mgmt_ctrl(u32 freq, struct emif_data *emif, u32 ip_rev)
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return pwr_mgmt_ctrl;
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}
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/*
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* Get the temperature level of the EMIF instance:
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* Reads the MR4 register of attached SDRAM parts to find out the temperature
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* level. If there are two parts attached(one on each CS), then the temperature
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* level for the EMIF instance is the higher of the two temperatures.
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*/
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static void get_temperature_level(struct emif_data *emif)
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{
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u32 temp, temperature_level;
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void __iomem *base;
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base = emif->base;
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/* Read mode register 4 */
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writel(DDR_MR4, base + EMIF_LPDDR2_MODE_REG_CONFIG);
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temperature_level = readl(base + EMIF_LPDDR2_MODE_REG_DATA);
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temperature_level = (temperature_level & MR4_SDRAM_REF_RATE_MASK) >>
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MR4_SDRAM_REF_RATE_SHIFT;
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if (emif->plat_data->device_info->cs1_used) {
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writel(DDR_MR4 | CS_MASK, base + EMIF_LPDDR2_MODE_REG_CONFIG);
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temp = readl(base + EMIF_LPDDR2_MODE_REG_DATA);
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temp = (temp & MR4_SDRAM_REF_RATE_MASK)
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>> MR4_SDRAM_REF_RATE_SHIFT;
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temperature_level = max(temp, temperature_level);
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}
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/* treat everything less than nominal(3) in MR4 as nominal */
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if (unlikely(temperature_level < SDRAM_TEMP_NOMINAL))
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temperature_level = SDRAM_TEMP_NOMINAL;
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/* if we get reserved value in MR4 persist with the existing value */
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if (likely(temperature_level != SDRAM_TEMP_RESERVED_4))
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emif->temperature_level = temperature_level;
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}
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/*
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* Program EMIF shadow registers that are not dependent on temperature
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* or voltage
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@ -627,6 +663,158 @@ out:
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writel(ref_ctrl, base + EMIF_SDRAM_REFRESH_CTRL_SHDW);
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}
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static irqreturn_t handle_temp_alert(void __iomem *base, struct emif_data *emif)
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{
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u32 old_temp_level;
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irqreturn_t ret = IRQ_HANDLED;
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spin_lock_irqsave(&emif_lock, irq_state);
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old_temp_level = emif->temperature_level;
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get_temperature_level(emif);
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if (unlikely(emif->temperature_level == old_temp_level)) {
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goto out;
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} else if (!emif->curr_regs) {
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dev_err(emif->dev, "temperature alert before registers are calculated, not de-rating timings\n");
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goto out;
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}
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if (emif->temperature_level < old_temp_level ||
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emif->temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) {
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/*
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* Temperature coming down - defer handling to thread OR
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* Temperature far too high - do kernel_power_off() from
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* thread context
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*/
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ret = IRQ_WAKE_THREAD;
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} else {
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/* Temperature is going up - handle immediately */
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setup_temperature_sensitive_regs(emif, emif->curr_regs);
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do_freq_update();
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}
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out:
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spin_unlock_irqrestore(&emif_lock, irq_state);
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return ret;
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}
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static irqreturn_t emif_interrupt_handler(int irq, void *dev_id)
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{
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u32 interrupts;
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struct emif_data *emif = dev_id;
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void __iomem *base = emif->base;
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struct device *dev = emif->dev;
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irqreturn_t ret = IRQ_HANDLED;
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/* Save the status and clear it */
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interrupts = readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);
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writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);
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/*
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* Handle temperature alert
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* Temperature alert should be same for all ports
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* So, it's enough to process it only for one of the ports
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*/
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if (interrupts & TA_SYS_MASK)
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ret = handle_temp_alert(base, emif);
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if (interrupts & ERR_SYS_MASK)
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dev_err(dev, "Access error from SYS port - %x\n", interrupts);
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if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) {
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/* Save the status and clear it */
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interrupts = readl(base + EMIF_LL_OCP_INTERRUPT_STATUS);
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writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_STATUS);
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if (interrupts & ERR_LL_MASK)
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dev_err(dev, "Access error from LL port - %x\n",
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interrupts);
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}
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return ret;
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}
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static irqreturn_t emif_threaded_isr(int irq, void *dev_id)
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{
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struct emif_data *emif = dev_id;
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if (emif->temperature_level == SDRAM_TEMP_VERY_HIGH_SHUTDOWN) {
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dev_emerg(emif->dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n");
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kernel_power_off();
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return IRQ_HANDLED;
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}
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spin_lock_irqsave(&emif_lock, irq_state);
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if (emif->curr_regs) {
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setup_temperature_sensitive_regs(emif, emif->curr_regs);
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do_freq_update();
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} else {
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dev_err(emif->dev, "temperature alert before registers are calculated, not de-rating timings\n");
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}
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spin_unlock_irqrestore(&emif_lock, irq_state);
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return IRQ_HANDLED;
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}
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static void clear_all_interrupts(struct emif_data *emif)
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{
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void __iomem *base = emif->base;
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writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS),
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base + EMIF_SYSTEM_OCP_INTERRUPT_STATUS);
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if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE)
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writel(readl(base + EMIF_LL_OCP_INTERRUPT_STATUS),
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base + EMIF_LL_OCP_INTERRUPT_STATUS);
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}
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static void disable_and_clear_all_interrupts(struct emif_data *emif)
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{
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void __iomem *base = emif->base;
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/* Disable all interrupts */
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writel(readl(base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET),
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base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_CLEAR);
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if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE)
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writel(readl(base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET),
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base + EMIF_LL_OCP_INTERRUPT_ENABLE_CLEAR);
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/* Clear all interrupts */
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clear_all_interrupts(emif);
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}
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static int __init_or_module setup_interrupts(struct emif_data *emif, u32 irq)
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{
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u32 interrupts, type;
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void __iomem *base = emif->base;
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type = emif->plat_data->device_info->type;
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clear_all_interrupts(emif);
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/* Enable interrupts for SYS interface */
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interrupts = EN_ERR_SYS_MASK;
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if (type == DDR_TYPE_LPDDR2_S2 || type == DDR_TYPE_LPDDR2_S4)
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interrupts |= EN_TA_SYS_MASK;
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writel(interrupts, base + EMIF_SYSTEM_OCP_INTERRUPT_ENABLE_SET);
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/* Enable interrupts for LL interface */
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if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) {
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/* TA need not be enabled for LL */
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interrupts = EN_ERR_LL_MASK;
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writel(interrupts, base + EMIF_LL_OCP_INTERRUPT_ENABLE_SET);
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}
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/* setup IRQ handlers */
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return devm_request_threaded_irq(emif->dev, irq,
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emif_interrupt_handler,
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emif_threaded_isr,
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0, dev_name(emif->dev),
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emif);
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}
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static void get_default_timings(struct emif_data *emif)
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{
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struct emif_platform_data *pd = emif->plat_data;
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@ -803,6 +991,7 @@ static int __init_or_module emif_probe(struct platform_device *pdev)
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{
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struct emif_data *emif;
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struct resource *res;
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int irq;
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emif = get_device_details(pdev);
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if (!emif) {
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goto error;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(emif->dev, "%s: error getting IRQ resource - %d\n",
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__func__, irq);
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goto error;
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}
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disable_and_clear_all_interrupts(emif);
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setup_interrupts(emif, irq);
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/* One-time actions taken on probing the first device */
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if (!emif1) {
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emif1 = emif;
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*/
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}
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dev_info(&pdev->dev, "%s: device configured with addr = %p\n",
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__func__, emif->base);
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dev_info(&pdev->dev, "%s: device configured with addr = %p and IRQ%d\n",
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__func__, emif->base, irq);
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return 0;
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error:
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return -ENODEV;
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}
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static void emif_shutdown(struct platform_device *pdev)
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{
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struct emif_data *emif = platform_get_drvdata(pdev);
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disable_and_clear_all_interrupts(emif);
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}
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static int get_emif_reg_values(struct emif_data *emif, u32 freq,
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struct emif_regs *regs)
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{
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@ -1154,6 +1360,7 @@ static void __attribute__((unused)) freq_post_notify_handling(void)
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}
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static struct platform_driver emif_driver = {
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.shutdown = emif_shutdown,
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.driver = {
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.name = "emif",
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},
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