[CG6]: code cleanup
This patch: - corrects coding style errors pointed by Lindent and checkpatch - replaces space chunks with tabs - removes one redundant include - improves indentations of defines - removes from comments leftovers from skeletonfb - adds __devinit attribute to two init functions Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Krzysztof Helt
David S. Miller
parent
d773b33972
commit
6993bea1b6
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@ -19,7 +19,6 @@
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#include <linux/mm.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/of_device.h>
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#include <asm/fbio.h>
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@ -65,41 +64,41 @@ static struct fb_ops cg6_ops = {
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* The FBC could be the frame buffer control
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* The FHC could is the frame buffer hardware control.
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*/
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#define CG6_ROM_OFFSET 0x0UL
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#define CG6_BROOKTREE_OFFSET 0x200000UL
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#define CG6_DHC_OFFSET 0x240000UL
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#define CG6_ALT_OFFSET 0x280000UL
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#define CG6_FHC_OFFSET 0x300000UL
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#define CG6_THC_OFFSET 0x301000UL
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#define CG6_FBC_OFFSET 0x700000UL
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#define CG6_TEC_OFFSET 0x701000UL
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#define CG6_RAM_OFFSET 0x800000UL
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#define CG6_ROM_OFFSET 0x0UL
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#define CG6_BROOKTREE_OFFSET 0x200000UL
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#define CG6_DHC_OFFSET 0x240000UL
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#define CG6_ALT_OFFSET 0x280000UL
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#define CG6_FHC_OFFSET 0x300000UL
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#define CG6_THC_OFFSET 0x301000UL
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#define CG6_FBC_OFFSET 0x700000UL
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#define CG6_TEC_OFFSET 0x701000UL
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#define CG6_RAM_OFFSET 0x800000UL
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/* FHC definitions */
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#define CG6_FHC_FBID_SHIFT 24
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#define CG6_FHC_FBID_MASK 255
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#define CG6_FHC_REV_SHIFT 20
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#define CG6_FHC_REV_MASK 15
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#define CG6_FHC_FROP_DISABLE (1 << 19)
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#define CG6_FHC_ROW_DISABLE (1 << 18)
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#define CG6_FHC_SRC_DISABLE (1 << 17)
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#define CG6_FHC_DST_DISABLE (1 << 16)
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#define CG6_FHC_RESET (1 << 15)
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#define CG6_FHC_LITTLE_ENDIAN (1 << 13)
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#define CG6_FHC_RES_MASK (3 << 11)
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#define CG6_FHC_1024 (0 << 11)
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#define CG6_FHC_1152 (1 << 11)
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#define CG6_FHC_1280 (2 << 11)
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#define CG6_FHC_1600 (3 << 11)
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#define CG6_FHC_CPU_MASK (3 << 9)
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#define CG6_FHC_CPU_SPARC (0 << 9)
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#define CG6_FHC_CPU_68020 (1 << 9)
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#define CG6_FHC_CPU_386 (2 << 9)
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#define CG6_FHC_TEST (1 << 8)
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#define CG6_FHC_TEST_X_SHIFT 4
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#define CG6_FHC_TEST_X_MASK 15
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#define CG6_FHC_TEST_Y_SHIFT 0
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#define CG6_FHC_TEST_Y_MASK 15
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#define CG6_FHC_FBID_SHIFT 24
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#define CG6_FHC_FBID_MASK 255
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#define CG6_FHC_REV_SHIFT 20
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#define CG6_FHC_REV_MASK 15
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#define CG6_FHC_FROP_DISABLE (1 << 19)
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#define CG6_FHC_ROW_DISABLE (1 << 18)
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#define CG6_FHC_SRC_DISABLE (1 << 17)
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#define CG6_FHC_DST_DISABLE (1 << 16)
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#define CG6_FHC_RESET (1 << 15)
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#define CG6_FHC_LITTLE_ENDIAN (1 << 13)
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#define CG6_FHC_RES_MASK (3 << 11)
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#define CG6_FHC_1024 (0 << 11)
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#define CG6_FHC_1152 (1 << 11)
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#define CG6_FHC_1280 (2 << 11)
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#define CG6_FHC_1600 (3 << 11)
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#define CG6_FHC_CPU_MASK (3 << 9)
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#define CG6_FHC_CPU_SPARC (0 << 9)
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#define CG6_FHC_CPU_68020 (1 << 9)
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#define CG6_FHC_CPU_386 (2 << 9)
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#define CG6_FHC_TEST (1 << 8)
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#define CG6_FHC_TEST_X_SHIFT 4
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#define CG6_FHC_TEST_X_MASK 15
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#define CG6_FHC_TEST_Y_SHIFT 0
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#define CG6_FHC_TEST_Y_MASK 15
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/* FBC mode definitions */
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#define CG6_FBC_BLIT_IGNORE 0x00000000
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@ -150,17 +149,17 @@ static struct fb_ops cg6_ops = {
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#define CG6_FBC_INDEX_MASK 0x00000030
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/* THC definitions */
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#define CG6_THC_MISC_REV_SHIFT 16
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#define CG6_THC_MISC_REV_MASK 15
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#define CG6_THC_MISC_RESET (1 << 12)
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#define CG6_THC_MISC_VIDEO (1 << 10)
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#define CG6_THC_MISC_SYNC (1 << 9)
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#define CG6_THC_MISC_VSYNC (1 << 8)
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#define CG6_THC_MISC_SYNC_ENAB (1 << 7)
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#define CG6_THC_MISC_CURS_RES (1 << 6)
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#define CG6_THC_MISC_INT_ENAB (1 << 5)
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#define CG6_THC_MISC_INT (1 << 4)
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#define CG6_THC_MISC_INIT 0x9f
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#define CG6_THC_MISC_REV_SHIFT 16
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#define CG6_THC_MISC_REV_MASK 15
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#define CG6_THC_MISC_RESET (1 << 12)
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#define CG6_THC_MISC_VIDEO (1 << 10)
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#define CG6_THC_MISC_SYNC (1 << 9)
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#define CG6_THC_MISC_VSYNC (1 << 8)
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#define CG6_THC_MISC_SYNC_ENAB (1 << 7)
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#define CG6_THC_MISC_CURS_RES (1 << 6)
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#define CG6_THC_MISC_INT_ENAB (1 << 5)
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#define CG6_THC_MISC_INT (1 << 4)
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#define CG6_THC_MISC_INIT 0x9f
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/* The contents are unknown */
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struct cg6_tec {
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@ -170,25 +169,25 @@ struct cg6_tec {
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};
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struct cg6_thc {
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u32 thc_pad0[512];
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u32 thc_hs; /* hsync timing */
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u32 thc_hsdvs;
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u32 thc_hd;
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u32 thc_vs; /* vsync timing */
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u32 thc_vd;
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u32 thc_refresh;
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u32 thc_misc;
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u32 thc_pad1[56];
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u32 thc_cursxy; /* cursor x,y position (16 bits each) */
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u32 thc_cursmask[32]; /* cursor mask bits */
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u32 thc_cursbits[32]; /* what to show where mask enabled */
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u32 thc_pad0[512];
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u32 thc_hs; /* hsync timing */
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u32 thc_hsdvs;
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u32 thc_hd;
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u32 thc_vs; /* vsync timing */
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u32 thc_vd;
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u32 thc_refresh;
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u32 thc_misc;
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u32 thc_pad1[56];
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u32 thc_cursxy; /* cursor x,y position (16 bits each) */
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u32 thc_cursmask[32]; /* cursor mask bits */
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u32 thc_cursbits[32]; /* what to show where mask enabled */
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};
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struct cg6_fbc {
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u32 xxx0[1];
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u32 mode;
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u32 clip;
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u32 xxx1[1];
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u32 xxx1[1];
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u32 s;
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u32 draw;
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u32 blit;
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@ -243,10 +242,10 @@ struct cg6_fbc {
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};
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struct bt_regs {
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u32 addr;
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u32 color_map;
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u32 control;
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u32 cursor;
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u32 addr;
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u32 color_map;
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u32 control;
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u32 cursor;
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};
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struct cg6_par {
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@ -267,7 +266,7 @@ struct cg6_par {
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static int cg6_sync(struct fb_info *info)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct cg6_fbc __iomem *fbc = par->fbc;
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int limit = 10000;
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@ -281,16 +280,14 @@ static int cg6_sync(struct fb_info *info)
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}
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/**
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* cg6_fillrect - REQUIRED function. Can use generic routines if
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* non acclerated hardware and packed pixel based.
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* Draws a rectangle on the screen.
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* cg6_fillrect - Draws a rectangle on the screen.
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*
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* @info: frame buffer structure that represents a single frame buffer
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* @rect: structure defining the rectagle and operation.
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* @info: frame buffer structure that represents a single frame buffer
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* @rect: structure defining the rectagle and operation.
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*/
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static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct cg6_fbc __iomem *fbc = par->fbc;
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unsigned long flags;
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s32 val;
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@ -316,16 +313,14 @@ static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
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}
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/**
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* cg6_imageblit - REQUIRED function. Can use generic routines if
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* non acclerated hardware and packed pixel based.
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* Copies a image from system memory to the screen.
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* cg6_imageblit - Copies a image from system memory to the screen.
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*
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* @info: frame buffer structure that represents a single frame buffer
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* @image: structure defining the image.
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* @info: frame buffer structure that represents a single frame buffer
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* @image: structure defining the image.
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*/
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static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct cg6_fbc __iomem *fbc = par->fbc;
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const u8 *data = image->data;
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unsigned long flags;
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@ -363,7 +358,7 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
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sbus_writel(y, &fbc->y0);
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sbus_writel(x, &fbc->x0);
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sbus_writel(x + 32 - 1, &fbc->x1);
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val = ((u32)data[0] << 24) |
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((u32)data[1] << 16) |
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((u32)data[2] << 8) |
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@ -404,19 +399,20 @@ static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
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}
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/**
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* cg6_setcolreg - Optional function. Sets a color register.
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* @regno: boolean, 0 copy local, 1 get_user() function
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* @red: frame buffer colormap structure
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* @green: The green value which can be up to 16 bits wide
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* @blue: The blue value which can be up to 16 bits wide.
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* @transp: If supported the alpha value which can be up to 16 bits wide.
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* @info: frame buffer info structure
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* cg6_setcolreg - Sets a color register.
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*
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* @regno: boolean, 0 copy local, 1 get_user() function
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* @red: frame buffer colormap structure
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* @green: The green value which can be up to 16 bits wide
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* @blue: The blue value which can be up to 16 bits wide.
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* @transp: If supported the alpha value which can be up to 16 bits wide.
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* @info: frame buffer info structure
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*/
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static int cg6_setcolreg(unsigned regno,
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unsigned red, unsigned green, unsigned blue,
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unsigned transp, struct fb_info *info)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct bt_regs __iomem *bt = par->bt;
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unsigned long flags;
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@ -440,25 +436,24 @@ static int cg6_setcolreg(unsigned regno,
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}
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/**
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* cg6_blank - Optional function. Blanks the display.
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* @blank_mode: the blank mode we want.
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* @info: frame buffer structure that represents a single frame buffer
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* cg6_blank - Blanks the display.
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*
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* @blank_mode: the blank mode we want.
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* @info: frame buffer structure that represents a single frame buffer
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*/
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static int
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cg6_blank(int blank, struct fb_info *info)
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static int cg6_blank(int blank, struct fb_info *info)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct cg6_thc __iomem *thc = par->thc;
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&par->lock, flags);
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val = sbus_readl(&thc->thc_misc);
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switch (blank) {
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case FB_BLANK_UNBLANK: /* Unblanking */
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val = sbus_readl(&thc->thc_misc);
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val |= CG6_THC_MISC_VIDEO;
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sbus_writel(val, &thc->thc_misc);
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par->flags &= ~CG6_FLAG_BLANKED;
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break;
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@ -466,13 +461,12 @@ cg6_blank(int blank, struct fb_info *info)
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case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
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case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
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case FB_BLANK_POWERDOWN: /* Poweroff */
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val = sbus_readl(&thc->thc_misc);
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val &= ~CG6_THC_MISC_VIDEO;
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sbus_writel(val, &thc->thc_misc);
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par->flags |= CG6_FLAG_BLANKED;
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break;
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}
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sbus_writel(val, &thc->thc_misc);
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spin_unlock_irqrestore(&par->lock, flags);
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return 0;
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@ -533,7 +527,7 @@ static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
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static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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return sbusfb_ioctl_helper(cmd, arg, info,
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FBTYPE_SUNFAST_COLOR, 8, par->fbsize);
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@ -543,15 +537,14 @@ static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
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* Initialisation
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*/
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static void
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cg6_init_fix(struct fb_info *info, int linebytes)
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static void __devinit cg6_init_fix(struct fb_info *info, int linebytes)
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{
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struct cg6_par *par = (struct cg6_par *)info->par;
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const char *cg6_cpu_name, *cg6_card_name;
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u32 conf;
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conf = sbus_readl(par->fhc);
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switch(conf & CG6_FHC_CPU_MASK) {
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switch (conf & CG6_FHC_CPU_MASK) {
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case CG6_FHC_CPU_SPARC:
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cg6_cpu_name = "sparc";
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break;
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@ -563,21 +556,19 @@ cg6_init_fix(struct fb_info *info, int linebytes)
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break;
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};
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if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
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if (par->fbsize <= 0x100000) {
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if (par->fbsize <= 0x100000)
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cg6_card_name = "TGX";
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} else {
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else
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cg6_card_name = "TGX+";
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}
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} else {
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if (par->fbsize <= 0x100000) {
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if (par->fbsize <= 0x100000)
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cg6_card_name = "GX";
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} else {
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else
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cg6_card_name = "GX+";
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}
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}
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sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
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info->fix.id[sizeof(info->fix.id)-1] = 0;
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info->fix.id[sizeof(info->fix.id) - 1] = 0;
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info->fix.type = FB_TYPE_PACKED_PIXELS;
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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@ -588,28 +579,28 @@ cg6_init_fix(struct fb_info *info, int linebytes)
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}
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/* Initialize Brooktree DAC */
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static void cg6_bt_init(struct cg6_par *par)
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static void __devinit cg6_bt_init(struct cg6_par *par)
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{
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struct bt_regs __iomem *bt = par->bt;
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sbus_writel(0x04 << 24, &bt->addr); /* color planes */
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sbus_writel(0x04 << 24, &bt->addr); /* color planes */
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sbus_writel(0xff << 24, &bt->control);
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sbus_writel(0x05 << 24, &bt->addr);
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sbus_writel(0x00 << 24, &bt->control);
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sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */
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sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */
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sbus_writel(0x73 << 24, &bt->control);
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sbus_writel(0x07 << 24, &bt->addr);
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sbus_writel(0x00 << 24, &bt->control);
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}
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static void cg6_chip_init(struct fb_info *info)
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static void __devinit cg6_chip_init(struct fb_info *info)
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{
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struct cg6_par *par = (struct cg6_par *) info->par;
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struct cg6_par *par = (struct cg6_par *)info->par;
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struct cg6_tec __iomem *tec = par->tec;
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struct cg6_fbc __iomem *fbc = par->fbc;
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u32 rev, conf, mode;
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int i;
|
||||
|
||||
|
||||
/* Turn off stuff in the Transform Engine. */
|
||||
sbus_writel(0, &tec->tec_matrix);
|
||||
sbus_writel(0, &tec->tec_clip);
|
||||
|
|
@ -635,13 +626,13 @@ static void cg6_chip_init(struct fb_info *info)
|
|||
i = sbus_readl(&fbc->s);
|
||||
} while (i & 0x10000000);
|
||||
mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
|
||||
CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
|
||||
CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
|
||||
CG6_FBC_BDISP_MASK);
|
||||
CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
|
||||
CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
|
||||
CG6_FBC_BDISP_MASK);
|
||||
mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
|
||||
CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
|
||||
CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
|
||||
CG6_FBC_BDISP_0);
|
||||
CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
|
||||
CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
|
||||
CG6_FBC_BDISP_0);
|
||||
sbus_writel(mode, &fbc->mode);
|
||||
|
||||
sbus_writel(0, &fbc->clip);
|
||||
|
|
@ -671,7 +662,8 @@ static void cg6_unmap_regs(struct of_device *op, struct fb_info *info,
|
|||
of_iounmap(&op->resource[0], info->screen_base, par->fbsize);
|
||||
}
|
||||
|
||||
static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *match)
|
||||
static int __devinit cg6_probe(struct of_device *op,
|
||||
const struct of_device_id *match)
|
||||
{
|
||||
struct device_node *dp = op->node;
|
||||
struct fb_info *info;
|
||||
|
|
@ -705,22 +697,22 @@ static int __devinit cg6_probe(struct of_device *op, const struct of_device_id *
|
|||
par->fbsize *= 4;
|
||||
|
||||
par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
|
||||
4096, "cgsix fbc");
|
||||
4096, "cgsix fbc");
|
||||
par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
|
||||
sizeof(struct cg6_tec), "cgsix tec");
|
||||
sizeof(struct cg6_tec), "cgsix tec");
|
||||
par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
|
||||
sizeof(struct cg6_thc), "cgsix thc");
|
||||
sizeof(struct cg6_thc), "cgsix thc");
|
||||
par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
|
||||
sizeof(struct bt_regs), "cgsix dac");
|
||||
sizeof(struct bt_regs), "cgsix dac");
|
||||
par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
|
||||
sizeof(u32), "cgsix fhc");
|
||||
sizeof(u32), "cgsix fhc");
|
||||
|
||||
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
|
||||
FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
|
||||
FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
|
||||
info->fbops = &cg6_ops;
|
||||
|
||||
info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
|
||||
par->fbsize, "cgsix ram");
|
||||
info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
|
||||
par->fbsize, "cgsix ram");
|
||||
if (!par->fbc || !par->tec || !par->thc ||
|
||||
!par->bt || !par->fhc || !info->screen_base)
|
||||
goto out_unmap_regs;
|
||||
|
|
|
|||
Loading…
Reference in a new issue