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dmaengine: shdma: Add more register documentation

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Also add a few definitions that were missing.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2014-06-20 14:37:38 +02:00 committed by Simon Horman
parent 7171511eae
commit 6b32fafee2
3 changed files with 38 additions and 34 deletions
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36
arch/sh/include/asm/dma-register.h
View file

@ -13,17 +13,17 @@
#ifndef DMA_REGISTER_H #ifndef DMA_REGISTER_H
#define DMA_REGISTER_H #define DMA_REGISTER_H
/* DMA register */ /* DMA registers */
#define SAR 0x00 #define SAR 0x00 /* Source Address Register */
#define DAR 0x04 #define DAR 0x04 /* Destination Address Register */
#define TCR 0x08 #define TCR 0x08 /* Transfer Count Register */
#define CHCR 0x0C #define CHCR 0x0C /* Channel Control Register */
#define DMAOR 0x40 #define DMAOR 0x40 /* DMA Operation Register */
/* DMAOR definitions */ /* DMAOR definitions */
#define DMAOR_AE 0x00000004 #define DMAOR_AE 0x00000004 /* Address Error Flag */
#define DMAOR_NMIF 0x00000002 #define DMAOR_NMIF 0x00000002
#define DMAOR_DME 0x00000001 #define DMAOR_DME 0x00000001 /* DMA Master Enable */
/* Definitions for the SuperH DMAC */ /* Definitions for the SuperH DMAC */
#define REQ_L 0x00000000 #define REQ_L 0x00000000
@ -34,18 +34,20 @@
#define ACK_W 0x00020000 #define ACK_W 0x00020000
#define ACK_H 0x00000000 #define ACK_H 0x00000000
#define ACK_L 0x00010000 #define ACK_L 0x00010000
#define DM_INC 0x00004000 #define DM_INC 0x00004000 /* Destination addresses are incremented */
#define DM_DEC 0x00008000 #define DM_DEC 0x00008000 /* Destination addresses are decremented */
#define DM_FIX 0x0000c000 #define DM_FIX 0x0000c000 /* Destination address is fixed */
#define SM_INC 0x00001000 #define SM_INC 0x00001000 /* Source addresses are incremented */
#define SM_DEC 0x00002000 #define SM_DEC 0x00002000 /* Source addresses are decremented */
#define SM_FIX 0x00003000 #define SM_FIX 0x00003000 /* Source address is fixed */
#define RS_IN 0x00000200 #define RS_IN 0x00000200
#define RS_OUT 0x00000300 #define RS_OUT 0x00000300
#define RS_AUTO 0x00000400 /* Auto Request */
#define RS_ERS 0x00000800 /* DMA extended resource selector */
#define TS_BLK 0x00000040 #define TS_BLK 0x00000040
#define TM_BUR 0x00000020 #define TM_BUR 0x00000020
#define CHCR_DE 0x00000001 #define CHCR_DE 0x00000001 /* DMA Enable */
#define CHCR_TE 0x00000002 #define CHCR_TE 0x00000002 /* Transfer End Flag */
#define CHCR_IE 0x00000004 #define CHCR_IE 0x00000004 /* Interrupt Enable */
#endif #endif

12
drivers/dma/sh/shdmac.c
View file

@ -38,12 +38,12 @@
#include "../dmaengine.h" #include "../dmaengine.h"
#include "shdma.h" #include "shdma.h"
/* DMA register */ /* DMA registers */
#define SAR 0x00 #define SAR 0x00 /* Source Address Register */
#define DAR 0x04 #define DAR 0x04 /* Destination Address Register */
#define TCR 0x08 #define TCR 0x08 /* Transfer Count Register */
#define CHCR 0x0C #define CHCR 0x0C /* Channel Control Register */
#define DMAOR 0x40 #define DMAOR 0x40 /* DMA Operation Register */
#define TEND 0x18 /* USB-DMAC */ #define TEND 0x18 /* USB-DMAC */

24
include/linux/sh_dma.h
View file

@ -95,19 +95,21 @@ struct sh_dmae_pdata {
}; };
/* DMAOR definitions */ /* DMAOR definitions */
#define DMAOR_AE 0x00000004 #define DMAOR_AE 0x00000004 /* Address Error Flag */
#define DMAOR_NMIF 0x00000002 #define DMAOR_NMIF 0x00000002
#define DMAOR_DME 0x00000001 #define DMAOR_DME 0x00000001 /* DMA Master Enable */
/* Definitions for the SuperH DMAC */ /* Definitions for the SuperH DMAC */
#define DM_INC 0x00004000 #define DM_INC 0x00004000 /* Destination addresses are incremented */
#define DM_DEC 0x00008000 #define DM_DEC 0x00008000 /* Destination addresses are decremented */
#define DM_FIX 0x0000c000 #define DM_FIX 0x0000c000 /* Destination address is fixed */
#define SM_INC 0x00001000 #define SM_INC 0x00001000 /* Source addresses are incremented */
#define SM_DEC 0x00002000 #define SM_DEC 0x00002000 /* Source addresses are decremented */
#define SM_FIX 0x00003000 #define SM_FIX 0x00003000 /* Source address is fixed */
#define CHCR_DE 0x00000001 #define RS_AUTO 0x00000400 /* Auto Request */
#define CHCR_TE 0x00000002 #define RS_ERS 0x00000800 /* DMA extended resource selector */
#define CHCR_IE 0x00000004 #define CHCR_DE 0x00000001 /* DMA Enable */
#define CHCR_TE 0x00000002 /* Transfer End Flag */
#define CHCR_IE 0x00000004 /* Interrupt Enable */
#endif #endif