Merge commit 'v3.16' into next
James Morris
commit
6c8ff877cd
5
.mailmap
5
.mailmap
|
|
@ -62,6 +62,11 @@ Jeff Garzik <jgarzik@pretzel.yyz.us>
|
|||
Jens Axboe <axboe@suse.de>
|
||||
Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
|
||||
John Stultz <johnstul@us.ibm.com>
|
||||
<josh@joshtriplett.org> <josh@freedesktop.org>
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||||
<josh@joshtriplett.org> <josh@kernel.org>
|
||||
<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
|
||||
<josh@joshtriplett.org> <josht@us.ibm.com>
|
||||
<josh@joshtriplett.org> <josht@vnet.ibm.com>
|
||||
Juha Yrjola <at solidboot.com>
|
||||
Juha Yrjola <juha.yrjola@nokia.com>
|
||||
Juha Yrjola <juha.yrjola@solidboot.com>
|
||||
|
|
|
|||
7
CREDITS
7
CREDITS
|
|
@ -3511,10 +3511,11 @@ S: MacGregor A.C.T 2615
|
|||
S: Australia
|
||||
|
||||
N: Josh Triplett
|
||||
E: josh@freedesktop.org
|
||||
P: 1024D/D0FE7AFB B24A 65C9 1D71 2AC2 DE87 CA26 189B 9946 D0FE 7AFB
|
||||
D: rcutorture maintainer
|
||||
E: josh@joshtriplett.org
|
||||
P: 4096R/8AFF873D 758E 5042 E397 4BA3 3A9C 1E67 0ED9 A3DF 8AFF 873D
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||||
D: RCU and rcutorture
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||||
D: lock annotations, finding and fixing lock bugs
|
||||
D: kernel tinification
|
||||
|
||||
N: Winfried Trümper
|
||||
E: winni@xpilot.org
|
||||
|
|
|
|||
|
|
@ -60,12 +60,6 @@ If the driver needs to perform more complex initialization like getting and
|
|||
configuring GPIOs it can get its ACPI handle and extract this information
|
||||
from ACPI tables.
|
||||
|
||||
Currently the kernel is not able to automatically determine from which ACPI
|
||||
device it should make the corresponding platform device so we need to add
|
||||
the ACPI device explicitly to acpi_platform_device_ids list defined in
|
||||
drivers/acpi/acpi_platform.c. This limitation is only for the platform
|
||||
devices, SPI and I2C devices are created automatically as described below.
|
||||
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||||
DMA support
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||||
~~~~~~~~~~~
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||||
DMA controllers enumerated via ACPI should be registered in the system to
|
||||
|
|
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|||
|
|
@ -8,10 +8,12 @@ Both required and optional properties listed below must be defined
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|||
under node /cpus/cpu@0.
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||||
|
||||
Required properties:
|
||||
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
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||||
for details
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||||
- None
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||||
|
||||
Optional properties:
|
||||
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt for
|
||||
details. OPPs *must* be supplied either via DT, i.e. this property, or
|
||||
populated at runtime.
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||||
- clock-latency: Specify the possible maximum transition latency for clock,
|
||||
in unit of nanoseconds.
|
||||
- voltage-tolerance: Specify the CPU voltage tolerance in percentage.
|
||||
|
|
|
|||
|
|
@ -281,6 +281,19 @@ gestures can normally be extracted from it.
|
|||
If INPUT_PROP_SEMI_MT is not set, the device is assumed to be a true MT
|
||||
device.
|
||||
|
||||
INPUT_PROP_TOPBUTTONPAD:
|
||||
-----------------------
|
||||
Some laptops, most notably the Lenovo *40 series provide a trackstick
|
||||
device but do not have physical buttons associated with the trackstick
|
||||
device. Instead, the top area of the touchpad is marked to show
|
||||
visual/haptic areas for left, middle, right buttons intended to be used
|
||||
with the trackstick.
|
||||
|
||||
If INPUT_PROP_TOPBUTTONPAD is set, userspace should emulate buttons
|
||||
accordingly. This property does not affect kernel behavior.
|
||||
The kernel does not provide button emulation for such devices but treats
|
||||
them as any other INPUT_PROP_BUTTONPAD device.
|
||||
|
||||
Guidelines:
|
||||
==========
|
||||
The guidelines below ensure proper single-touch and multi-finger functionality.
|
||||
|
|
|
|||
|
|
@ -2812,6 +2812,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
leaf rcu_node structure. Useful for very large
|
||||
systems.
|
||||
|
||||
rcutree.jiffies_till_sched_qs= [KNL]
|
||||
Set required age in jiffies for a
|
||||
given grace period before RCU starts
|
||||
soliciting quiescent-state help from
|
||||
rcu_note_context_switch().
|
||||
|
||||
rcutree.jiffies_till_first_fqs= [KNL]
|
||||
Set delay from grace-period initialization to
|
||||
first attempt to force quiescent states.
|
||||
|
|
@ -3548,7 +3554,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
the allocated input device; If set to 0, video driver
|
||||
will only send out the event without touching backlight
|
||||
brightness level.
|
||||
default: 0
|
||||
default: 1
|
||||
|
||||
virtio_mmio.device=
|
||||
[VMMIO] Memory mapped virtio (platform) device.
|
||||
|
|
|
|||
24
MAINTAINERS
24
MAINTAINERS
|
|
@ -156,7 +156,6 @@ F: drivers/net/hamradio/6pack.c
|
|||
|
||||
8169 10/100/1000 GIGABIT ETHERNET DRIVER
|
||||
M: Realtek linux nic maintainers <nic_swsd@realtek.com>
|
||||
M: Francois Romieu <romieu@fr.zoreil.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/realtek/r8169.c
|
||||
|
|
@ -4511,8 +4510,7 @@ S: Supported
|
|||
F: drivers/idle/i7300_idle.c
|
||||
|
||||
IEEE 802.15.4 SUBSYSTEM
|
||||
M: Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
|
||||
M: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
|
||||
M: Alexander Aring <alex.aring@gmail.com>
|
||||
L: linux-zigbee-devel@lists.sourceforge.net (moderated for non-subscribers)
|
||||
W: http://apps.sourceforge.net/trac/linux-zigbee
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lowpan/lowpan.git
|
||||
|
|
@ -6958,6 +6956,12 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
S: Maintained
|
||||
F: drivers/pinctrl/pinctrl-at91.c
|
||||
|
||||
PIN CONTROLLER - RENESAS
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-sh@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/sh-pfc/
|
||||
|
||||
PIN CONTROLLER - SAMSUNG
|
||||
M: Tomasz Figa <t.figa@samsung.com>
|
||||
M: Thomas Abraham <thomas.abraham@linaro.org>
|
||||
|
|
@ -7420,7 +7424,7 @@ S: Orphan
|
|||
F: drivers/net/wireless/ray*
|
||||
|
||||
RCUTORTURE MODULE
|
||||
M: Josh Triplett <josh@freedesktop.org>
|
||||
M: Josh Triplett <josh@joshtriplett.org>
|
||||
M: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
@ -8033,6 +8037,16 @@ F: drivers/ata/
|
|||
F: include/linux/ata.h
|
||||
F: include/linux/libata.h
|
||||
|
||||
SERIAL ATA AHCI PLATFORM devices support
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
M: Tejun Heo <tj@kernel.org>
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
|
||||
S: Supported
|
||||
F: drivers/ata/ahci_platform.c
|
||||
F: drivers/ata/libahci_platform.c
|
||||
F: include/linux/ahci_platform.h
|
||||
|
||||
SERVER ENGINES 10Gbps iSCSI - BladeEngine 2 DRIVER
|
||||
M: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
|
|
@ -8920,7 +8934,7 @@ M: Stephen Warren <swarren@wwwdotorg.org>
|
|||
M: Thierry Reding <thierry.reding@gmail.com>
|
||||
L: linux-tegra@vger.kernel.org
|
||||
Q: http://patchwork.ozlabs.org/project/linux-tegra/list/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git
|
||||
S: Supported
|
||||
N: [^a-z]tegra
|
||||
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 16
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION =
|
||||
NAME = Shuffling Zombie Juror
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -688,6 +688,8 @@ KBUILD_CFLAGS += -fomit-frame-pointer
|
|||
endif
|
||||
endif
|
||||
|
||||
KBUILD_CFLAGS += $(call cc-option, -fno-var-tracking-assignments)
|
||||
|
||||
ifdef CONFIG_DEBUG_INFO
|
||||
KBUILD_CFLAGS += -g
|
||||
KBUILD_AFLAGS += -Wa,-gdwarf-2
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@ config ARM
|
|||
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
||||
select ARCH_HAVE_CUSTOM_GPIO_H
|
||||
select ARCH_MIGHT_HAVE_PC_PARPORT
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
select ARCH_USE_BUILTIN_BSWAP
|
||||
select ARCH_USE_CMPXCHG_LOCKREF
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
|
|
@ -312,7 +313,7 @@ config ARCH_MULTIPLATFORM
|
|||
config ARCH_INTEGRATOR
|
||||
bool "ARM Ltd. Integrator family"
|
||||
select ARM_AMBA
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select ARM_PATCH_PHYS_VIRT if MMU
|
||||
select AUTO_ZRELADDR
|
||||
select COMMON_CLK
|
||||
select COMMON_CLK_VERSATILE
|
||||
|
|
@ -658,7 +659,7 @@ config ARCH_MSM
|
|||
config ARCH_SHMOBILE_LEGACY
|
||||
bool "Renesas ARM SoCs (non-multiplatform)"
|
||||
select ARCH_SHMOBILE
|
||||
select ARM_PATCH_PHYS_VIRT
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||||
select ARM_PATCH_PHYS_VIRT if MMU
|
||||
select CLKDEV_LOOKUP
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_ARM_SCU if SMP
|
||||
|
|
|
|||
|
|
@ -925,7 +925,7 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00500000 0x00100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
|
||||
<&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -1124,6 +1124,7 @@
|
|||
compatible = "atmel,at91sam9rl-pwm";
|
||||
reg = <0xf8034000 0x300>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
clocks = <&pwm_clk>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1155,8 +1156,7 @@
|
|||
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
|
||||
<&uhpck>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -73,7 +73,7 @@
|
|||
|
||||
L2: l2-cache {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xfc10000 0x100000>;
|
||||
reg = <0x100000 0x100000>;
|
||||
interrupts = <0 15 4>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
|
|
|
|||
|
|
@ -353,7 +353,7 @@
|
|||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
|
||||
compatible = "ti,twl4030-power-n900";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -540,9 +540,9 @@
|
|||
#clock-cells = <0>;
|
||||
clock-output-names = "sd1";
|
||||
};
|
||||
sd2_clk: sd3_clk@e615007c {
|
||||
sd2_clk: sd3_clk@e615026c {
|
||||
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
|
||||
reg = <0 0xe615007c 0 4>;
|
||||
reg = <0 0xe615026c 0 4>;
|
||||
clocks = <&pll1_div2_clk>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "sd2";
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "ste-nomadik-stn8815.dtsi"
|
||||
#include "ste-nomadik-stn8815.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Calao Systems USB-S8815";
|
||||
|
|
|
|||
|
|
@ -1,7 +1,9 @@
|
|||
/*
|
||||
* Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
|
||||
*/
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -842,8 +844,7 @@
|
|||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
cd-gpios = <&gpio3 15 0x1>;
|
||||
cd-inverted;
|
||||
cd-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
|
||||
vmmc-supply = <&vmmc_regulator>;
|
||||
|
|
|
|||
|
|
@ -137,7 +137,7 @@ static int aesbs_cbc_encrypt(struct blkcipher_desc *desc,
|
|||
dst += AES_BLOCK_SIZE;
|
||||
} while (--blocks);
|
||||
}
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
|
@ -158,7 +158,7 @@ static int aesbs_cbc_decrypt(struct blkcipher_desc *desc,
|
|||
bsaes_cbc_encrypt(walk.src.virt.addr, walk.dst.virt.addr,
|
||||
walk.nbytes, &ctx->dec, walk.iv);
|
||||
kernel_neon_end();
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
while (walk.nbytes) {
|
||||
u32 blocks = walk.nbytes / AES_BLOCK_SIZE;
|
||||
|
|
@ -182,7 +182,7 @@ static int aesbs_cbc_decrypt(struct blkcipher_desc *desc,
|
|||
dst += AES_BLOCK_SIZE;
|
||||
src += AES_BLOCK_SIZE;
|
||||
} while (--blocks);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
|
@ -268,7 +268,7 @@ static int aesbs_xts_encrypt(struct blkcipher_desc *desc,
|
|||
bsaes_xts_encrypt(walk.src.virt.addr, walk.dst.virt.addr,
|
||||
walk.nbytes, &ctx->enc, walk.iv);
|
||||
kernel_neon_end();
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
|
@ -292,7 +292,7 @@ static int aesbs_xts_decrypt(struct blkcipher_desc *desc,
|
|||
bsaes_xts_decrypt(walk.src.virt.addr, walk.dst.virt.addr,
|
||||
walk.nbytes, &ctx->dec, walk.iv);
|
||||
kernel_neon_end();
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ struct machine_desc {
|
|||
struct smp_operations *smp; /* SMP operations */
|
||||
bool (*smp_init)(void);
|
||||
void (*fixup)(struct tag *, char **);
|
||||
void (*dt_fixup)(void);
|
||||
void (*init_meminfo)(void);
|
||||
void (*reserve)(void);/* reserve mem blocks */
|
||||
void (*map_io)(void);/* IO mapping function */
|
||||
|
|
|
|||
|
|
@ -212,7 +212,7 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
|
|||
mdesc_best = &__mach_desc_GENERIC_DT;
|
||||
#endif
|
||||
|
||||
if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys)))
|
||||
if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
|
||||
return NULL;
|
||||
|
||||
mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
|
||||
|
|
@ -237,6 +237,12 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
|
|||
dump_machine_table(); /* does not return */
|
||||
}
|
||||
|
||||
/* We really don't want to do this, but sometimes firmware provides buggy data */
|
||||
if (mdesc->dt_fixup)
|
||||
mdesc->dt_fixup();
|
||||
|
||||
early_init_dt_scan_nodes();
|
||||
|
||||
/* Change machine number to match the mdesc we're using */
|
||||
__machine_arch_type = mdesc->nr;
|
||||
|
||||
|
|
|
|||
|
|
@ -94,13 +94,19 @@ ENTRY(iwmmxt_task_enable)
|
|||
|
||||
mrc p15, 0, r2, c2, c0, 0
|
||||
mov r2, r2 @ cpwait
|
||||
bl concan_save
|
||||
|
||||
teq r1, #0 @ test for last ownership
|
||||
mov lr, r9 @ normal exit from exception
|
||||
beq concan_load @ no owner, skip save
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
#endif
|
||||
4: dec_preempt_count r10, r3
|
||||
mov pc, r9 @ normal exit from exception
|
||||
|
||||
concan_save:
|
||||
|
||||
teq r1, #0 @ test for last ownership
|
||||
beq concan_load @ no owner, skip save
|
||||
|
||||
tmrc r2, wCon
|
||||
|
||||
@ CUP? wCx
|
||||
|
|
@ -138,7 +144,7 @@ concan_dump:
|
|||
wstrd wR15, [r1, #MMX_WR15]
|
||||
|
||||
2: teq r0, #0 @ anything to load?
|
||||
beq 3f
|
||||
moveq pc, lr @ if not, return
|
||||
|
||||
concan_load:
|
||||
|
||||
|
|
@ -171,14 +177,9 @@ concan_load:
|
|||
@ clear CUP/MUP (only if r1 != 0)
|
||||
teq r1, #0
|
||||
mov r2, #0
|
||||
beq 3f
|
||||
tmcr wCon, r2
|
||||
moveq pc, lr
|
||||
|
||||
3:
|
||||
#ifdef CONFIG_PREEMPT_COUNT
|
||||
get_thread_info r10
|
||||
#endif
|
||||
4: dec_preempt_count r10, r3
|
||||
tmcr wCon, r2
|
||||
mov pc, lr
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -160,12 +160,16 @@ static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr)
|
|||
static struct undef_hook kgdb_brkpt_hook = {
|
||||
.instr_mask = 0xffffffff,
|
||||
.instr_val = KGDB_BREAKINST,
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_val = SVC_MODE,
|
||||
.fn = kgdb_brk_fn
|
||||
};
|
||||
|
||||
static struct undef_hook kgdb_compiled_brkpt_hook = {
|
||||
.instr_mask = 0xffffffff,
|
||||
.instr_val = KGDB_COMPILED_BREAK,
|
||||
.cpsr_mask = MODE_MASK,
|
||||
.cpsr_val = SVC_MODE,
|
||||
.fn = kgdb_compiled_brk_fn
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ void store_cpu_topology(unsigned int cpuid)
|
|||
cpu_topology[cpuid].socket_id, mpidr);
|
||||
}
|
||||
|
||||
static inline const int cpu_corepower_flags(void)
|
||||
static inline int cpu_corepower_flags(void)
|
||||
{
|
||||
return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -335,6 +335,15 @@ static void __init exynos_reserve(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
static void __init exynos_dt_fixup(void)
|
||||
{
|
||||
/*
|
||||
* Some versions of uboot pass garbage entries in the memory node,
|
||||
* use the old CONFIG_ARM_NR_BANKS
|
||||
*/
|
||||
of_fdt_limit_memory(8);
|
||||
}
|
||||
|
||||
DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
|
||||
/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
|
||||
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
|
||||
|
|
@ -348,4 +357,5 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
|
|||
.dt_compat = exynos_dt_compat,
|
||||
.restart = exynos_restart,
|
||||
.reserve = exynos_reserve,
|
||||
.dt_fixup = exynos_dt_fixup,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -40,15 +40,17 @@ static inline void cpu_leave_lowpower(void)
|
|||
|
||||
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
||||
{
|
||||
u32 mpidr = cpu_logical_map(cpu);
|
||||
u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||
|
||||
for (;;) {
|
||||
|
||||
/* make cpu1 to be turned off at next WFI command */
|
||||
if (cpu == 1)
|
||||
exynos_cpu_power_down(cpu);
|
||||
/* Turn the CPU off on next WFI instruction. */
|
||||
exynos_cpu_power_down(core_id);
|
||||
|
||||
wfi();
|
||||
|
||||
if (pen_release == cpu_logical_map(cpu)) {
|
||||
if (pen_release == core_id) {
|
||||
/*
|
||||
* OK, proper wakeup, we're done
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -90,7 +90,8 @@ static void exynos_secondary_init(unsigned int cpu)
|
|||
static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
unsigned long timeout;
|
||||
unsigned long phys_cpu = cpu_logical_map(cpu);
|
||||
u32 mpidr = cpu_logical_map(cpu);
|
||||
u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||
int ret = -ENOSYS;
|
||||
|
||||
/*
|
||||
|
|
@ -104,17 +105,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
* the holding pen - release it, then wait for it to flag
|
||||
* that it has been released by resetting pen_release.
|
||||
*
|
||||
* Note that "pen_release" is the hardware CPU ID, whereas
|
||||
* Note that "pen_release" is the hardware CPU core ID, whereas
|
||||
* "cpu" is Linux's internal ID.
|
||||
*/
|
||||
write_pen_release(phys_cpu);
|
||||
write_pen_release(core_id);
|
||||
|
||||
if (!exynos_cpu_power_state(cpu)) {
|
||||
exynos_cpu_power_up(cpu);
|
||||
if (!exynos_cpu_power_state(core_id)) {
|
||||
exynos_cpu_power_up(core_id);
|
||||
timeout = 10;
|
||||
|
||||
/* wait max 10 ms until cpu1 is on */
|
||||
while (exynos_cpu_power_state(cpu) != S5P_CORE_LOCAL_PWR_EN) {
|
||||
while (exynos_cpu_power_state(core_id)
|
||||
!= S5P_CORE_LOCAL_PWR_EN) {
|
||||
if (timeout-- == 0)
|
||||
break;
|
||||
|
||||
|
|
@ -145,20 +147,20 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
* Try to set boot address using firmware first
|
||||
* and fall back to boot register if it fails.
|
||||
*/
|
||||
ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
|
||||
ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);
|
||||
if (ret && ret != -ENOSYS)
|
||||
goto fail;
|
||||
if (ret == -ENOSYS) {
|
||||
void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
|
||||
void __iomem *boot_reg = cpu_boot_reg(core_id);
|
||||
|
||||
if (IS_ERR(boot_reg)) {
|
||||
ret = PTR_ERR(boot_reg);
|
||||
goto fail;
|
||||
}
|
||||
__raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
|
||||
__raw_writel(boot_addr, cpu_boot_reg(core_id));
|
||||
}
|
||||
|
||||
call_firmware_op(cpu_boot, phys_cpu);
|
||||
call_firmware_op(cpu_boot, core_id);
|
||||
|
||||
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
|
||||
|
||||
|
|
@ -227,22 +229,24 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
|
|||
* boot register if it fails.
|
||||
*/
|
||||
for (i = 1; i < max_cpus; ++i) {
|
||||
unsigned long phys_cpu;
|
||||
unsigned long boot_addr;
|
||||
u32 mpidr;
|
||||
u32 core_id;
|
||||
int ret;
|
||||
|
||||
phys_cpu = cpu_logical_map(i);
|
||||
mpidr = cpu_logical_map(i);
|
||||
core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||
boot_addr = virt_to_phys(exynos4_secondary_startup);
|
||||
|
||||
ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr);
|
||||
ret = call_firmware_op(set_cpu_boot_addr, core_id, boot_addr);
|
||||
if (ret && ret != -ENOSYS)
|
||||
break;
|
||||
if (ret == -ENOSYS) {
|
||||
void __iomem *boot_reg = cpu_boot_reg(phys_cpu);
|
||||
void __iomem *boot_reg = cpu_boot_reg(core_id);
|
||||
|
||||
if (IS_ERR(boot_reg))
|
||||
break;
|
||||
__raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
|
||||
__raw_writel(boot_addr, cpu_boot_reg(core_id));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ static const char *cko_sels[] = { "cko1", "cko2", };
|
|||
static const char *lvds_sels[] = {
|
||||
"dummy", "dummy", "dummy", "dummy", "dummy", "dummy",
|
||||
"pll4_audio", "pll5_video", "pll8_mlb", "enet_ref",
|
||||
"pcie_ref", "sata_ref",
|
||||
"pcie_ref_125m", "sata_ref_100m",
|
||||
};
|
||||
|
||||
enum mx6q_clks {
|
||||
|
|
@ -491,7 +491,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
|||
|
||||
/* All existing boards with PCIe use LVDS1 */
|
||||
if (IS_ENABLED(CONFIG_PCI_IMX6))
|
||||
clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
|
||||
clk_set_parent(clk[lvds1_sel], clk[sata_ref_100m]);
|
||||
|
||||
/* Set initial power mode */
|
||||
imx6q_set_lpm(WAIT_CLOCKED);
|
||||
|
|
|
|||
|
|
@ -292,6 +292,10 @@ static struct notifier_block mvebu_hwcc_nb = {
|
|||
.notifier_call = mvebu_hwcc_notifier,
|
||||
};
|
||||
|
||||
static struct notifier_block mvebu_hwcc_pci_nb = {
|
||||
.notifier_call = mvebu_hwcc_notifier,
|
||||
};
|
||||
|
||||
static void __init armada_370_coherency_init(struct device_node *np)
|
||||
{
|
||||
struct resource res;
|
||||
|
|
@ -427,7 +431,7 @@ static int __init coherency_pci_init(void)
|
|||
{
|
||||
if (coherency_available())
|
||||
bus_register_notifier(&pci_bus_type,
|
||||
&mvebu_hwcc_nb);
|
||||
&mvebu_hwcc_pci_nb);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,8 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
|
||||
__CPUINIT
|
||||
#define CPU_RESUME_ADDR_REG 0xf10182d4
|
||||
|
||||
|
|
@ -22,13 +24,18 @@
|
|||
.global armada_375_smp_cpu1_enable_code_end
|
||||
|
||||
armada_375_smp_cpu1_enable_code_start:
|
||||
ldr r0, [pc, #4]
|
||||
ARM_BE8(setend be)
|
||||
adr r0, 1f
|
||||
ldr r0, [r0]
|
||||
ldr r1, [r0]
|
||||
ARM_BE8(rev r1, r1)
|
||||
mov pc, r1
|
||||
1:
|
||||
.word CPU_RESUME_ADDR_REG
|
||||
armada_375_smp_cpu1_enable_code_end:
|
||||
|
||||
ENTRY(mvebu_cortex_a9_secondary_startup)
|
||||
ARM_BE8(setend be)
|
||||
bl v7_invalidate_l1
|
||||
b secondary_startup
|
||||
ENDPROC(mvebu_cortex_a9_secondary_startup)
|
||||
|
|
|
|||
|
|
@ -201,12 +201,12 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
|
|||
|
||||
/* Test the CR_C bit and set it if it was cleared */
|
||||
asm volatile(
|
||||
"mrc p15, 0, %0, c1, c0, 0 \n\t"
|
||||
"tst %0, #(1 << 2) \n\t"
|
||||
"orreq %0, %0, #(1 << 2) \n\t"
|
||||
"mcreq p15, 0, %0, c1, c0, 0 \n\t"
|
||||
"mrc p15, 0, r0, c1, c0, 0 \n\t"
|
||||
"tst r0, #(1 << 2) \n\t"
|
||||
"orreq r0, r0, #(1 << 2) \n\t"
|
||||
"mcreq p15, 0, r0, c1, c0, 0 \n\t"
|
||||
"isb "
|
||||
: : "r" (0));
|
||||
: : : "r0");
|
||||
|
||||
pr_warn("Failed to suspend the system\n");
|
||||
|
||||
|
|
|
|||
|
|
@ -50,6 +50,16 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
|
|||
soc_is_omap54xx() || soc_is_dra7xx())
|
||||
return 1;
|
||||
|
||||
if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
|
||||
ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
|
||||
if (cpu_is_omap24xx())
|
||||
return 0;
|
||||
else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
|
||||
* which require H/W based ECC error detection */
|
||||
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
|
||||
|
|
@ -57,14 +67,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
|
|||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
|
||||
* and AM33xx derivates. Other chips may be added if confirmed to work.
|
||||
*/
|
||||
if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
|
||||
(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
|
||||
return 0;
|
||||
|
||||
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
|
||||
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -168,6 +168,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)
|
|||
smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX;
|
||||
break;
|
||||
|
||||
case L310_POWER_CTRL:
|
||||
pr_info_once("OMAP L2C310: ROM does not support power control setting\n");
|
||||
return;
|
||||
|
||||
default:
|
||||
WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg);
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -461,12 +461,21 @@ void __init dma_contiguous_remap(void)
|
|||
map.type = MT_MEMORY_DMA_READY;
|
||||
|
||||
/*
|
||||
* Clear previous low-memory mapping
|
||||
* Clear previous low-memory mapping to ensure that the
|
||||
* TLB does not see any conflicting entries, then flush
|
||||
* the TLB of the old entries before creating new mappings.
|
||||
*
|
||||
* This ensures that any speculatively loaded TLB entries
|
||||
* (even though they may be rare) can not cause any problems,
|
||||
* and ensures that this code is architecturally compliant.
|
||||
*/
|
||||
for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
|
||||
addr += PMD_SIZE)
|
||||
pmd_clear(pmd_off_k(addr));
|
||||
|
||||
flush_tlb_kernel_range(__phys_to_virt(start),
|
||||
__phys_to_virt(end));
|
||||
|
||||
iotable_init(&map, 1);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -9,6 +9,11 @@
|
|||
#include <asm/sections.h>
|
||||
#include <asm/system_info.h>
|
||||
|
||||
/*
|
||||
* Note: accesses outside of the kernel image and the identity map area
|
||||
* are not supported on any CPU using the idmap tables as its current
|
||||
* page tables.
|
||||
*/
|
||||
pgd_t *idmap_pgd;
|
||||
phys_addr_t (*arch_virt_to_idmap) (unsigned long x);
|
||||
|
||||
|
|
@ -25,6 +30,13 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
|
|||
pr_warning("Failed to allocate identity pmd.\n");
|
||||
return;
|
||||
}
|
||||
/*
|
||||
* Copy the original PMD to ensure that the PMD entries for
|
||||
* the kernel image are preserved.
|
||||
*/
|
||||
if (!pud_none(*pud))
|
||||
memcpy(pmd, pmd_offset(pud, 0),
|
||||
PTRS_PER_PMD * sizeof(pmd_t));
|
||||
pud_populate(&init_mm, pud, pmd);
|
||||
pmd += pmd_index(addr);
|
||||
} else
|
||||
|
|
|
|||
|
|
@ -1406,8 +1406,8 @@ void __init early_paging_init(const struct machine_desc *mdesc,
|
|||
return;
|
||||
|
||||
/* remap kernel code and data */
|
||||
map_start = init_mm.start_code;
|
||||
map_end = init_mm.brk;
|
||||
map_start = init_mm.start_code & PMD_MASK;
|
||||
map_end = ALIGN(init_mm.brk, PMD_SIZE);
|
||||
|
||||
/* get a handle on things... */
|
||||
pgd0 = pgd_offset_k(0);
|
||||
|
|
@ -1442,7 +1442,7 @@ void __init early_paging_init(const struct machine_desc *mdesc,
|
|||
}
|
||||
|
||||
/* remap pmds for kernel mapping */
|
||||
phys = __pa(map_start) & PMD_MASK;
|
||||
phys = __pa(map_start);
|
||||
do {
|
||||
*pmdk++ = __pmd(phys | pmdprot);
|
||||
phys += PMD_SIZE;
|
||||
|
|
|
|||
|
|
@ -51,3 +51,8 @@ int arch_gnttab_map_status(uint64_t *frames, unsigned long nr_gframes,
|
|||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
int arch_gnttab_init(unsigned long nr_shared, unsigned long nr_status)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@ config ARM64
|
|||
select ARCH_HAS_OPP
|
||||
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
||||
select ARCH_USE_CMPXCHG_LOCKREF
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
|
||||
select ARCH_WANT_FRAME_POINTERS
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ static int ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) {
|
||||
aes_ecb_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key_enc, rounds, blocks, first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
return err;
|
||||
|
|
@ -128,7 +128,7 @@ static int ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) {
|
||||
aes_ecb_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key_dec, rounds, blocks, first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
return err;
|
||||
|
|
@ -151,7 +151,7 @@ static int cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
aes_cbc_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key_enc, rounds, blocks, walk.iv,
|
||||
first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
return err;
|
||||
|
|
@ -174,7 +174,7 @@ static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
aes_cbc_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key_dec, rounds, blocks, walk.iv,
|
||||
first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
return err;
|
||||
|
|
@ -243,7 +243,7 @@ static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
aes_xts_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key1.key_enc, rounds, blocks,
|
||||
(u8 *)ctx->key2.key_enc, walk.iv, first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
|
||||
|
|
@ -267,7 +267,7 @@ static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
|
|||
aes_xts_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
|
||||
(u8 *)ctx->key1.key_dec, rounds, blocks,
|
||||
(u8 *)ctx->key2.key_enc, walk.iv, first);
|
||||
err = blkcipher_walk_done(desc, &walk, 0);
|
||||
err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
|
||||
}
|
||||
kernel_neon_end();
|
||||
|
||||
|
|
|
|||
|
|
@ -12,8 +12,6 @@
|
|||
#include <linux/efi.h>
|
||||
#include <linux/libfdt.h>
|
||||
#include <asm/sections.h>
|
||||
#include <generated/compile.h>
|
||||
#include <generated/utsrelease.h>
|
||||
|
||||
/*
|
||||
* AArch64 requires the DTB to be 8-byte aligned in the first 512MiB from
|
||||
|
|
|
|||
|
|
@ -60,6 +60,17 @@ static int __init early_initrd(char *p)
|
|||
early_param("initrd", early_initrd);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Return the maximum physical address for ZONE_DMA (DMA_BIT_MASK(32)). It
|
||||
* currently assumes that for memory starting above 4G, 32-bit devices will
|
||||
* use a DMA offset.
|
||||
*/
|
||||
static phys_addr_t max_zone_dma_phys(void)
|
||||
{
|
||||
phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
|
||||
return min(offset + (1ULL << 32), memblock_end_of_DRAM());
|
||||
}
|
||||
|
||||
static void __init zone_sizes_init(unsigned long min, unsigned long max)
|
||||
{
|
||||
struct memblock_region *reg;
|
||||
|
|
@ -70,9 +81,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
|
|||
|
||||
/* 4GB maximum for 32-bit only capable devices */
|
||||
if (IS_ENABLED(CONFIG_ZONE_DMA)) {
|
||||
unsigned long max_dma_phys =
|
||||
(unsigned long)(dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1);
|
||||
max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
|
||||
max_dma = PFN_DOWN(max_zone_dma_phys());
|
||||
zone_size[ZONE_DMA] = max_dma - min;
|
||||
}
|
||||
zone_size[ZONE_NORMAL] = max - max_dma;
|
||||
|
|
@ -146,7 +155,7 @@ void __init arm64_memblock_init(void)
|
|||
|
||||
/* 4GB maximum for 32-bit only capable devices */
|
||||
if (IS_ENABLED(CONFIG_ZONE_DMA))
|
||||
dma_phys_limit = dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1;
|
||||
dma_phys_limit = max_zone_dma_phys();
|
||||
dma_contiguous_reserve(dma_phys_limit);
|
||||
|
||||
memblock_allow_resize();
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ CONFIG_I2C_CHARDEV=y
|
|||
CONFIG_I2C_BLACKFIN_TWI=y
|
||||
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BFIN_V3=y
|
||||
CONFIG_SPI_ADI_V3=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ SECTIONS
|
|||
|
||||
.text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
|
||||
#else
|
||||
.init.data : AT(__data_lma + __data_len)
|
||||
.init.data : AT(__data_lma + __data_len + 32)
|
||||
{
|
||||
__sinitdata = .;
|
||||
INIT_DATA
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/portmux.h>
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/portmux.h>
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/portmux.h>
|
||||
|
|
|
|||
|
|
@ -2118,7 +2118,7 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
|
|||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL, "rotary"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0", "pinctrl-adi2.0", NULL, "can0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.1", "pinctrl-adi2.0", NULL, "can1"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf54x-lq043", "pinctrl-adi2.0", NULL, "ppi0_24b"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf54x-lq043", "pinctrl-adi2.0", "ppi0_24bgrp", "ppi0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0", "pinctrl-adi2.0", NULL, "sport0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0", "pinctrl-adi2.0", NULL, "sport0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.0", "pinctrl-adi2.0", NULL, "sport0"),
|
||||
|
|
@ -2140,7 +2140,9 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
|
|||
PIN_MAP_MUX_GROUP_DEFAULT("pata-bf54x", "pinctrl-adi2.0", NULL, "atapi_alter"),
|
||||
#endif
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf5xx-nand.0", "pinctrl-adi2.0", NULL, "nfc0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf54x-keys", "pinctrl-adi2.0", NULL, "keys_4x4"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf54x-keys", "pinctrl-adi2.0", "keys_4x4grp", "keys"),
|
||||
PIN_MAP_MUX_GROUP("bf54x-keys", "4bit", "pinctrl-adi2.0", "keys_4x4grp", "keys"),
|
||||
PIN_MAP_MUX_GROUP("bf54x-keys", "8bit", "pinctrl-adi2.0", "keys_8x8grp", "keys"),
|
||||
};
|
||||
|
||||
static int __init ezkit_init(void)
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@
|
|||
#include <linux/spi/flash.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/i2c-pca-platform.h>
|
||||
#include <linux/delay.h>
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#endif
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
#include <asm/portmux.h>
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/spi/spi.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/bfin5xx_spi.h>
|
||||
|
|
|
|||
|
|
@ -698,8 +698,6 @@ int bf609_nor_flash_init(struct platform_device *pdev)
|
|||
{
|
||||
#define CONFIG_SMC_GCTL_VAL 0x00000010
|
||||
|
||||
if (!devm_pinctrl_get_select_default(&pdev->dev))
|
||||
return -EBUSY;
|
||||
bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
|
||||
bfin_write32(SMC_B0CTL, 0x01002011);
|
||||
bfin_write32(SMC_B0TIM, 0x08170977);
|
||||
|
|
@ -709,7 +707,6 @@ int bf609_nor_flash_init(struct platform_device *pdev)
|
|||
|
||||
void bf609_nor_flash_exit(struct platform_device *pdev)
|
||||
{
|
||||
devm_pinctrl_put(pdev->dev.pins->p);
|
||||
bfin_write32(SMC_GCTL, 0);
|
||||
}
|
||||
|
||||
|
|
@ -2058,15 +2055,14 @@ static struct pinctrl_map __initdata bfin_pinmux_map[] = {
|
|||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL, "rotary"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0", "pinctrl-adi2.0", NULL, "can0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("physmap-flash.0", "pinctrl-adi2.0", NULL, "smc0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2", "pinctrl-adi2.0", NULL, "ppi2_16b"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0", "pinctrl-adi2.0", NULL, "ppi0_16b"),
|
||||
#if IS_ENABLED(CONFIG_VIDEO_MT9M114)
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL, "ppi0_8b"),
|
||||
#elif IS_ENABLED(CONFIG_VIDEO_VS6624)
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL, "ppi0_16b"),
|
||||
#else
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL, "ppi0_24b"),
|
||||
#endif
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2", "pinctrl-adi2.0", "ppi2_16bgrp", "ppi2"),
|
||||
PIN_MAP_MUX_GROUP("bfin_display.0", "8bit", "pinctrl-adi2.0", "ppi2_8bgrp", "ppi2"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0", "pinctrl-adi2.0", "ppi2_16bgrp", "ppi2"),
|
||||
PIN_MAP_MUX_GROUP("bfin_display.0", "16bit", "pinctrl-adi2.0", "ppi2_16bgrp", "ppi2"),
|
||||
PIN_MAP_MUX_GROUP("bfin_capture.0", "8bit", "pinctrl-adi2.0", "ppi0_8bgrp", "ppi0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", "ppi0_16bgrp", "ppi0"),
|
||||
PIN_MAP_MUX_GROUP("bfin_capture.0", "16bit", "pinctrl-adi2.0", "ppi0_16bgrp", "ppi0"),
|
||||
PIN_MAP_MUX_GROUP("bfin_capture.0", "24bit", "pinctrl-adi2.0", "ppi0_24bgrp", "ppi0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0", "pinctrl-adi2.0", NULL, "sport0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0", "pinctrl-adi2.0", NULL, "sport0"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.1", "pinctrl-adi2.0", NULL, "sport1"),
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#define __MACH_BF609_PM_H__
|
||||
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
extern int bfin609_pm_enter(suspend_state_t state);
|
||||
extern int bf609_pm_prepare(void);
|
||||
|
|
@ -19,6 +20,6 @@ void bf609_hibernate(void);
|
|||
void bfin_sec_raise_irq(unsigned int sid);
|
||||
void coreb_enable(void);
|
||||
|
||||
int bf609_nor_flash_init(void);
|
||||
void bf609_nor_flash_exit(void);
|
||||
int bf609_nor_flash_init(struct platform_device *pdev);
|
||||
void bf609_nor_flash_exit(struct platform_device *pdev);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -291,13 +291,13 @@ static struct bfin_cpu_pm_fns bf609_cpu_pm = {
|
|||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
static int smc_pm_syscore_suspend(void)
|
||||
{
|
||||
bf609_nor_flash_exit();
|
||||
bf609_nor_flash_exit(NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void smc_pm_syscore_resume(void)
|
||||
{
|
||||
bf609_nor_flash_init();
|
||||
bf609_nor_flash_init(NULL);
|
||||
}
|
||||
|
||||
static struct syscore_ops smc_pm_syscore_ops = {
|
||||
|
|
|
|||
|
|
@ -1208,8 +1208,6 @@ int __init init_arch_irq(void)
|
|||
|
||||
bfin_sec_set_priority(CONFIG_SEC_IRQ_PRIORITY_LEVELS, sec_int_priority);
|
||||
|
||||
bfin_sec_set_priority(CONFIG_SEC_IRQ_PRIORITY_LEVELS, sec_int_priority);
|
||||
|
||||
/* Enable interrupts IVG7-15 */
|
||||
bfin_irq_flags |= IMASK_IVG15 |
|
||||
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
|
||||
|
|
|
|||
|
|
@ -69,8 +69,6 @@
|
|||
#define SA_NOMASK SA_NODEFER
|
||||
#define SA_ONESHOT SA_RESETHAND
|
||||
|
||||
#define SA_RESTORER 0x04000000 /* obsolete -- ignored */
|
||||
|
||||
#define MINSIGSTKSZ 2048
|
||||
#define SIGSTKSZ 8192
|
||||
|
||||
|
|
|
|||
|
|
@ -728,7 +728,6 @@ static void __init pagetable_init(void)
|
|||
#endif
|
||||
|
||||
empty_zero_page = alloc_bootmem_pages(PAGE_SIZE);
|
||||
memset(empty_zero_page, 0, PAGE_SIZE);
|
||||
}
|
||||
|
||||
static void __init gateway_init(void)
|
||||
|
|
|
|||
|
|
@ -145,6 +145,7 @@ config PPC
|
|||
select HAVE_IRQ_EXIT_ON_IRQ_STACK
|
||||
select ARCH_USE_CMPXCHG_LOCKREF if PPC64
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
|
||||
config GENERIC_CSUM
|
||||
def_bool CPU_LITTLE_ENDIAN
|
||||
|
|
|
|||
|
|
@ -447,6 +447,7 @@ extern const char *powerpc_base_platform;
|
|||
CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \
|
||||
CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP)
|
||||
#define CPU_FTRS_POWER8E (CPU_FTRS_POWER8 | CPU_FTR_PMAO_BUG)
|
||||
#define CPU_FTRS_POWER8_DD1 (CPU_FTRS_POWER8 & ~CPU_FTR_DBELL)
|
||||
#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
|
||||
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
|
||||
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
|
||||
|
|
|
|||
|
|
@ -198,8 +198,10 @@ static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
|
|||
return rb;
|
||||
}
|
||||
|
||||
static inline unsigned long hpte_page_size(unsigned long h, unsigned long l)
|
||||
static inline unsigned long __hpte_page_size(unsigned long h, unsigned long l,
|
||||
bool is_base_size)
|
||||
{
|
||||
|
||||
int size, a_psize;
|
||||
/* Look at the 8 bit LP value */
|
||||
unsigned int lp = (l >> LP_SHIFT) & ((1 << LP_BITS) - 1);
|
||||
|
|
@ -214,14 +216,27 @@ static inline unsigned long hpte_page_size(unsigned long h, unsigned long l)
|
|||
continue;
|
||||
|
||||
a_psize = __hpte_actual_psize(lp, size);
|
||||
if (a_psize != -1)
|
||||
if (a_psize != -1) {
|
||||
if (is_base_size)
|
||||
return 1ul << mmu_psize_defs[size].shift;
|
||||
return 1ul << mmu_psize_defs[a_psize].shift;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline unsigned long hpte_page_size(unsigned long h, unsigned long l)
|
||||
{
|
||||
return __hpte_page_size(h, l, 0);
|
||||
}
|
||||
|
||||
static inline unsigned long hpte_base_page_size(unsigned long h, unsigned long l)
|
||||
{
|
||||
return __hpte_page_size(h, l, 1);
|
||||
}
|
||||
|
||||
static inline unsigned long hpte_rpn(unsigned long ptel, unsigned long psize)
|
||||
{
|
||||
return ((ptel & HPTE_R_RPN) & ~(psize - 1)) >> PAGE_SHIFT;
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
*/
|
||||
#include <asm/pgtable-ppc64.h>
|
||||
#include <asm/bug.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* Segment table
|
||||
|
|
@ -496,7 +497,7 @@ extern void slb_set_size(u16 size);
|
|||
*/
|
||||
struct subpage_prot_table {
|
||||
unsigned long maxaddr; /* only addresses < this are protected */
|
||||
unsigned int **protptrs[2];
|
||||
unsigned int **protptrs[(TASK_SIZE_USER64 >> 43)];
|
||||
unsigned int *low_prot[4];
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -277,6 +277,8 @@ n:
|
|||
.globl n; \
|
||||
n:
|
||||
|
||||
#define _GLOBAL_TOC(name) _GLOBAL(name)
|
||||
|
||||
#define _KPROBE(n) \
|
||||
.section ".kprobes.text","a"; \
|
||||
.globl n; \
|
||||
|
|
|
|||
|
|
@ -527,6 +527,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.machine_check_early = __machine_check_early_realmode_p8,
|
||||
.platform = "power8",
|
||||
},
|
||||
{ /* Power8 DD1: Does not support doorbell IPIs */
|
||||
.pvr_mask = 0xffffff00,
|
||||
.pvr_value = 0x004d0100,
|
||||
.cpu_name = "POWER8 (raw)",
|
||||
.cpu_features = CPU_FTRS_POWER8_DD1,
|
||||
.cpu_user_features = COMMON_USER_POWER8,
|
||||
.cpu_user_features2 = COMMON_USER2_POWER8,
|
||||
.mmu_features = MMU_FTRS_POWER8,
|
||||
.icache_bsize = 128,
|
||||
.dcache_bsize = 128,
|
||||
.num_pmcs = 6,
|
||||
.pmc_type = PPC_PMC_IBM,
|
||||
.oprofile_cpu_type = "ppc64/power8",
|
||||
.oprofile_type = PPC_OPROFILE_INVALID,
|
||||
.cpu_setup = __setup_cpu_power8,
|
||||
.cpu_restore = __restore_cpu_power8,
|
||||
.flush_tlb = __flush_tlb_power8,
|
||||
.machine_check_early = __machine_check_early_realmode_p8,
|
||||
.platform = "power8",
|
||||
},
|
||||
{ /* Power8 */
|
||||
.pvr_mask = 0xffff0000,
|
||||
.pvr_value = 0x004d0000,
|
||||
|
|
|
|||
|
|
@ -611,17 +611,19 @@ static void rtas_flash_firmware(int reboot_type)
|
|||
for (f = flist; f; f = next) {
|
||||
/* Translate data addrs to absolute */
|
||||
for (i = 0; i < f->num_blocks; i++) {
|
||||
f->blocks[i].data = (char *)__pa(f->blocks[i].data);
|
||||
f->blocks[i].data = (char *)cpu_to_be64(__pa(f->blocks[i].data));
|
||||
image_size += f->blocks[i].length;
|
||||
f->blocks[i].length = cpu_to_be64(f->blocks[i].length);
|
||||
}
|
||||
next = f->next;
|
||||
/* Don't translate NULL pointer for last entry */
|
||||
if (f->next)
|
||||
f->next = (struct flash_block_list *)__pa(f->next);
|
||||
f->next = (struct flash_block_list *)cpu_to_be64(__pa(f->next));
|
||||
else
|
||||
f->next = NULL;
|
||||
/* make num_blocks into the version/length field */
|
||||
f->num_blocks = (FLASH_BLOCK_LIST_VERSION << 56) | ((f->num_blocks+1)*16);
|
||||
f->num_blocks = cpu_to_be64(f->num_blocks);
|
||||
}
|
||||
|
||||
printk(KERN_ALERT "FLASH: flash image is %ld bytes\n", image_size);
|
||||
|
|
|
|||
|
|
@ -747,7 +747,7 @@ int setup_profiling_timer(unsigned int multiplier)
|
|||
|
||||
#ifdef CONFIG_SCHED_SMT
|
||||
/* cpumask of CPUs with asymetric SMT dependancy */
|
||||
static const int powerpc_smt_flags(void)
|
||||
static int powerpc_smt_flags(void)
|
||||
{
|
||||
int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
|
||||
|
||||
|
|
|
|||
|
|
@ -1562,7 +1562,7 @@ static ssize_t kvm_htab_write(struct file *file, const char __user *buf,
|
|||
goto out;
|
||||
}
|
||||
if (!rma_setup && is_vrma_hpte(v)) {
|
||||
unsigned long psize = hpte_page_size(v, r);
|
||||
unsigned long psize = hpte_base_page_size(v, r);
|
||||
unsigned long senc = slb_pgsize_encoding(psize);
|
||||
unsigned long lpcr;
|
||||
|
||||
|
|
|
|||
|
|
@ -814,13 +814,10 @@ long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v,
|
|||
r = hpte[i+1];
|
||||
|
||||
/*
|
||||
* Check the HPTE again, including large page size
|
||||
* Since we don't currently allow any MPSS (mixed
|
||||
* page-size segment) page sizes, it is sufficient
|
||||
* to check against the actual page size.
|
||||
* Check the HPTE again, including base page size
|
||||
*/
|
||||
if ((v & valid) && (v & mask) == val &&
|
||||
hpte_page_size(v, r) == (1ul << pshift))
|
||||
hpte_base_page_size(v, r) == (1ul << pshift))
|
||||
/* Return with the HPTE still locked */
|
||||
return (hash << 3) + (i >> 1);
|
||||
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@
|
|||
*
|
||||
* LR = return address to continue at after eventually re-enabling MMU
|
||||
*/
|
||||
_GLOBAL(kvmppc_hv_entry_trampoline)
|
||||
_GLOBAL_TOC(kvmppc_hv_entry_trampoline)
|
||||
mflr r0
|
||||
std r0, PPC_LR_STKOFF(r1)
|
||||
stdu r1, -112(r1)
|
||||
|
|
|
|||
|
|
@ -25,7 +25,11 @@
|
|||
#include <asm/exception-64s.h>
|
||||
|
||||
#if defined(CONFIG_PPC_BOOK3S_64)
|
||||
#if defined(_CALL_ELF) && _CALL_ELF == 2
|
||||
#define FUNC(name) name
|
||||
#else
|
||||
#define FUNC(name) GLUE(.,name)
|
||||
#endif
|
||||
#define GET_SHADOW_VCPU(reg) addi reg, r13, PACA_SVCPU
|
||||
|
||||
#elif defined(CONFIG_PPC_BOOK3S_32)
|
||||
|
|
|
|||
|
|
@ -36,7 +36,11 @@
|
|||
|
||||
#if defined(CONFIG_PPC_BOOK3S_64)
|
||||
|
||||
#if defined(_CALL_ELF) && _CALL_ELF == 2
|
||||
#define FUNC(name) name
|
||||
#else
|
||||
#define FUNC(name) GLUE(.,name)
|
||||
#endif
|
||||
|
||||
#elif defined(CONFIG_PPC_BOOK3S_32)
|
||||
|
||||
|
|
@ -146,7 +150,7 @@ kvmppc_handler_skip_ins:
|
|||
* On entry, r4 contains the guest shadow MSR
|
||||
* MSR.EE has to be 0 when calling this function
|
||||
*/
|
||||
_GLOBAL(kvmppc_entry_trampoline)
|
||||
_GLOBAL_TOC(kvmppc_entry_trampoline)
|
||||
mfmsr r5
|
||||
LOAD_REG_ADDR(r7, kvmppc_handler_trampoline_enter)
|
||||
toreal(r7)
|
||||
|
|
|
|||
|
|
@ -23,20 +23,20 @@ static void kvm_rtas_set_xive(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
|||
u32 irq, server, priority;
|
||||
int rc;
|
||||
|
||||
if (args->nargs != 3 || args->nret != 1) {
|
||||
if (be32_to_cpu(args->nargs) != 3 || be32_to_cpu(args->nret) != 1) {
|
||||
rc = -3;
|
||||
goto out;
|
||||
}
|
||||
|
||||
irq = args->args[0];
|
||||
server = args->args[1];
|
||||
priority = args->args[2];
|
||||
irq = be32_to_cpu(args->args[0]);
|
||||
server = be32_to_cpu(args->args[1]);
|
||||
priority = be32_to_cpu(args->args[2]);
|
||||
|
||||
rc = kvmppc_xics_set_xive(vcpu->kvm, irq, server, priority);
|
||||
if (rc)
|
||||
rc = -3;
|
||||
out:
|
||||
args->rets[0] = rc;
|
||||
args->rets[0] = cpu_to_be32(rc);
|
||||
}
|
||||
|
||||
static void kvm_rtas_get_xive(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
||||
|
|
@ -44,12 +44,12 @@ static void kvm_rtas_get_xive(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
|||
u32 irq, server, priority;
|
||||
int rc;
|
||||
|
||||
if (args->nargs != 1 || args->nret != 3) {
|
||||
if (be32_to_cpu(args->nargs) != 1 || be32_to_cpu(args->nret) != 3) {
|
||||
rc = -3;
|
||||
goto out;
|
||||
}
|
||||
|
||||
irq = args->args[0];
|
||||
irq = be32_to_cpu(args->args[0]);
|
||||
|
||||
server = priority = 0;
|
||||
rc = kvmppc_xics_get_xive(vcpu->kvm, irq, &server, &priority);
|
||||
|
|
@ -58,10 +58,10 @@ static void kvm_rtas_get_xive(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
|||
goto out;
|
||||
}
|
||||
|
||||
args->rets[1] = server;
|
||||
args->rets[2] = priority;
|
||||
args->rets[1] = cpu_to_be32(server);
|
||||
args->rets[2] = cpu_to_be32(priority);
|
||||
out:
|
||||
args->rets[0] = rc;
|
||||
args->rets[0] = cpu_to_be32(rc);
|
||||
}
|
||||
|
||||
static void kvm_rtas_int_off(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
||||
|
|
@ -69,18 +69,18 @@ static void kvm_rtas_int_off(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
|||
u32 irq;
|
||||
int rc;
|
||||
|
||||
if (args->nargs != 1 || args->nret != 1) {
|
||||
if (be32_to_cpu(args->nargs) != 1 || be32_to_cpu(args->nret) != 1) {
|
||||
rc = -3;
|
||||
goto out;
|
||||
}
|
||||
|
||||
irq = args->args[0];
|
||||
irq = be32_to_cpu(args->args[0]);
|
||||
|
||||
rc = kvmppc_xics_int_off(vcpu->kvm, irq);
|
||||
if (rc)
|
||||
rc = -3;
|
||||
out:
|
||||
args->rets[0] = rc;
|
||||
args->rets[0] = cpu_to_be32(rc);
|
||||
}
|
||||
|
||||
static void kvm_rtas_int_on(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
||||
|
|
@ -88,18 +88,18 @@ static void kvm_rtas_int_on(struct kvm_vcpu *vcpu, struct rtas_args *args)
|
|||
u32 irq;
|
||||
int rc;
|
||||
|
||||
if (args->nargs != 1 || args->nret != 1) {
|
||||
if (be32_to_cpu(args->nargs) != 1 || be32_to_cpu(args->nret) != 1) {
|
||||
rc = -3;
|
||||
goto out;
|
||||
}
|
||||
|
||||
irq = args->args[0];
|
||||
irq = be32_to_cpu(args->args[0]);
|
||||
|
||||
rc = kvmppc_xics_int_on(vcpu->kvm, irq);
|
||||
if (rc)
|
||||
rc = -3;
|
||||
out:
|
||||
args->rets[0] = rc;
|
||||
args->rets[0] = cpu_to_be32(rc);
|
||||
}
|
||||
#endif /* CONFIG_KVM_XICS */
|
||||
|
||||
|
|
@ -205,32 +205,6 @@ int kvm_vm_ioctl_rtas_define_token(struct kvm *kvm, void __user *argp)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static void kvmppc_rtas_swap_endian_in(struct rtas_args *args)
|
||||
{
|
||||
#ifdef __LITTLE_ENDIAN__
|
||||
int i;
|
||||
|
||||
args->token = be32_to_cpu(args->token);
|
||||
args->nargs = be32_to_cpu(args->nargs);
|
||||
args->nret = be32_to_cpu(args->nret);
|
||||
for (i = 0; i < args->nargs; i++)
|
||||
args->args[i] = be32_to_cpu(args->args[i]);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void kvmppc_rtas_swap_endian_out(struct rtas_args *args)
|
||||
{
|
||||
#ifdef __LITTLE_ENDIAN__
|
||||
int i;
|
||||
|
||||
for (i = 0; i < args->nret; i++)
|
||||
args->args[i] = cpu_to_be32(args->args[i]);
|
||||
args->token = cpu_to_be32(args->token);
|
||||
args->nargs = cpu_to_be32(args->nargs);
|
||||
args->nret = cpu_to_be32(args->nret);
|
||||
#endif
|
||||
}
|
||||
|
||||
int kvmppc_rtas_hcall(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct rtas_token_definition *d;
|
||||
|
|
@ -249,8 +223,6 @@ int kvmppc_rtas_hcall(struct kvm_vcpu *vcpu)
|
|||
if (rc)
|
||||
goto fail;
|
||||
|
||||
kvmppc_rtas_swap_endian_in(&args);
|
||||
|
||||
/*
|
||||
* args->rets is a pointer into args->args. Now that we've
|
||||
* copied args we need to fix it up to point into our copy,
|
||||
|
|
@ -258,13 +230,13 @@ int kvmppc_rtas_hcall(struct kvm_vcpu *vcpu)
|
|||
* value so we can restore it on the way out.
|
||||
*/
|
||||
orig_rets = args.rets;
|
||||
args.rets = &args.args[args.nargs];
|
||||
args.rets = &args.args[be32_to_cpu(args.nargs)];
|
||||
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
|
||||
rc = -ENOENT;
|
||||
list_for_each_entry(d, &vcpu->kvm->arch.rtas_tokens, list) {
|
||||
if (d->token == args.token) {
|
||||
if (d->token == be32_to_cpu(args.token)) {
|
||||
d->handler->handler(vcpu, &args);
|
||||
rc = 0;
|
||||
break;
|
||||
|
|
@ -275,7 +247,6 @@ int kvmppc_rtas_hcall(struct kvm_vcpu *vcpu)
|
|||
|
||||
if (rc == 0) {
|
||||
args.rets = orig_rets;
|
||||
kvmppc_rtas_swap_endian_out(&args);
|
||||
rc = kvm_write_guest(vcpu->kvm, args_phys, &args, sizeof(args));
|
||||
if (rc)
|
||||
goto fail;
|
||||
|
|
|
|||
|
|
@ -473,7 +473,8 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|||
if (printk_ratelimit())
|
||||
pr_err("%s: pte not present: gfn %lx, pfn %lx\n",
|
||||
__func__, (long)gfn, pfn);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg);
|
||||
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ _GLOBAL(memset)
|
|||
stb r4,0(r6)
|
||||
blr
|
||||
|
||||
_GLOBAL(memmove)
|
||||
_GLOBAL_TOC(memmove)
|
||||
cmplw 0,r3,r4
|
||||
bgt backwards_memcpy
|
||||
b memcpy
|
||||
|
|
|
|||
|
|
@ -1198,7 +1198,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
sh = regs->gpr[rb] & 0x3f;
|
||||
ival = (signed int) regs->gpr[rd];
|
||||
regs->gpr[ra] = ival >> (sh < 32 ? sh : 31);
|
||||
if (ival < 0 && (sh >= 32 || (ival & ((1 << sh) - 1)) != 0))
|
||||
if (ival < 0 && (sh >= 32 || (ival & ((1ul << sh) - 1)) != 0))
|
||||
regs->xer |= XER_CA;
|
||||
else
|
||||
regs->xer &= ~XER_CA;
|
||||
|
|
@ -1208,7 +1208,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
sh = rb;
|
||||
ival = (signed int) regs->gpr[rd];
|
||||
regs->gpr[ra] = ival >> sh;
|
||||
if (ival < 0 && (ival & ((1 << sh) - 1)) != 0)
|
||||
if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
|
||||
regs->xer |= XER_CA;
|
||||
else
|
||||
regs->xer &= ~XER_CA;
|
||||
|
|
@ -1216,7 +1216,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
|
||||
#ifdef __powerpc64__
|
||||
case 27: /* sld */
|
||||
sh = regs->gpr[rd] & 0x7f;
|
||||
sh = regs->gpr[rb] & 0x7f;
|
||||
if (sh < 64)
|
||||
regs->gpr[ra] = regs->gpr[rd] << sh;
|
||||
else
|
||||
|
|
@ -1235,7 +1235,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
sh = regs->gpr[rb] & 0x7f;
|
||||
ival = (signed long int) regs->gpr[rd];
|
||||
regs->gpr[ra] = ival >> (sh < 64 ? sh : 63);
|
||||
if (ival < 0 && (sh >= 64 || (ival & ((1 << sh) - 1)) != 0))
|
||||
if (ival < 0 && (sh >= 64 || (ival & ((1ul << sh) - 1)) != 0))
|
||||
regs->xer |= XER_CA;
|
||||
else
|
||||
regs->xer &= ~XER_CA;
|
||||
|
|
@ -1246,7 +1246,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
|
|||
sh = rb | ((instr & 2) << 4);
|
||||
ival = (signed long int) regs->gpr[rd];
|
||||
regs->gpr[ra] = ival >> sh;
|
||||
if (ival < 0 && (ival & ((1 << sh) - 1)) != 0)
|
||||
if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
|
||||
regs->xer |= XER_CA;
|
||||
else
|
||||
regs->xer &= ~XER_CA;
|
||||
|
|
|
|||
|
|
@ -390,12 +390,16 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
|
|||
case BPF_ANC | SKF_AD_VLAN_TAG:
|
||||
case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
|
||||
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
|
||||
BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000);
|
||||
|
||||
PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
|
||||
vlan_tci));
|
||||
if (code == (BPF_ANC | SKF_AD_VLAN_TAG))
|
||||
PPC_ANDI(r_A, r_A, VLAN_VID_MASK);
|
||||
else
|
||||
if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) {
|
||||
PPC_ANDI(r_A, r_A, ~VLAN_TAG_PRESENT);
|
||||
} else {
|
||||
PPC_ANDI(r_A, r_A, VLAN_TAG_PRESENT);
|
||||
PPC_SRWI(r_A, r_A, 12);
|
||||
}
|
||||
break;
|
||||
case BPF_ANC | SKF_AD_QUEUE:
|
||||
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
|
||||
|
|
|
|||
|
|
@ -1307,6 +1307,9 @@ static void power_pmu_enable(struct pmu *pmu)
|
|||
out_enable:
|
||||
pmao_restore_workaround(ebb);
|
||||
|
||||
if (ppmu->flags & PPMU_ARCH_207S)
|
||||
mtspr(SPRN_MMCR2, 0);
|
||||
|
||||
mmcr0 = ebb_switch_in(ebb, cpuhw->mmcr[0]);
|
||||
|
||||
mb();
|
||||
|
|
@ -1315,9 +1318,6 @@ static void power_pmu_enable(struct pmu *pmu)
|
|||
|
||||
write_mmcr0(cpuhw, mmcr0);
|
||||
|
||||
if (ppmu->flags & PPMU_ARCH_207S)
|
||||
mtspr(SPRN_MMCR2, 0);
|
||||
|
||||
/*
|
||||
* Enable instruction sampling if necessary
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -249,7 +249,7 @@ static void elog_work_fn(struct work_struct *work)
|
|||
|
||||
rc = opal_get_elog_size(&id, &size, &type);
|
||||
if (rc != OPAL_SUCCESS) {
|
||||
pr_err("ELOG: Opal log read failed\n");
|
||||
pr_err("ELOG: OPAL log info read failed\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -257,7 +257,7 @@ static void elog_work_fn(struct work_struct *work)
|
|||
log_id = be64_to_cpu(id);
|
||||
elog_type = be64_to_cpu(type);
|
||||
|
||||
BUG_ON(elog_size > OPAL_MAX_ERRLOG_SIZE);
|
||||
WARN_ON(elog_size > OPAL_MAX_ERRLOG_SIZE);
|
||||
|
||||
if (elog_size >= OPAL_MAX_ERRLOG_SIZE)
|
||||
elog_size = OPAL_MAX_ERRLOG_SIZE;
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@ static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa,
|
|||
}
|
||||
|
||||
of_node_set_flag(dn, OF_DYNAMIC);
|
||||
of_node_init(dn);
|
||||
|
||||
return dn;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -69,6 +69,7 @@ static int pSeries_reconfig_add_node(const char *path, struct property *proplist
|
|||
|
||||
np->properties = proplist;
|
||||
of_node_set_flag(np, OF_DYNAMIC);
|
||||
of_node_init(np);
|
||||
|
||||
np->parent = derive_parent(path);
|
||||
if (IS_ERR(np->parent)) {
|
||||
|
|
|
|||
|
|
@ -51,8 +51,8 @@ static inline int restore_fp_ctl(u32 *fpc)
|
|||
return 0;
|
||||
|
||||
asm volatile(
|
||||
"0: lfpc %1\n"
|
||||
" la %0,0\n"
|
||||
" lfpc %1\n"
|
||||
"0: la %0,0\n"
|
||||
"1:\n"
|
||||
EX_TABLE(0b,1b)
|
||||
: "=d" (rc) : "Q" (*fpc), "0" (-EINVAL));
|
||||
|
|
|
|||
|
|
@ -437,11 +437,11 @@ ENTRY(startup_kdump)
|
|||
|
||||
#if defined(CONFIG_64BIT)
|
||||
#if defined(CONFIG_MARCH_ZEC12)
|
||||
.long 3, 0xc100efea, 0xf46ce800, 0x00400000
|
||||
.long 3, 0xc100eff2, 0xf46ce800, 0x00400000
|
||||
#elif defined(CONFIG_MARCH_Z196)
|
||||
.long 2, 0xc100efea, 0xf46c0000
|
||||
.long 2, 0xc100eff2, 0xf46c0000
|
||||
#elif defined(CONFIG_MARCH_Z10)
|
||||
.long 2, 0xc100efea, 0xf0680000
|
||||
.long 2, 0xc100eff2, 0xf0680000
|
||||
#elif defined(CONFIG_MARCH_Z9_109)
|
||||
.long 1, 0xc100efc2
|
||||
#elif defined(CONFIG_MARCH_Z990)
|
||||
|
|
|
|||
|
|
@ -334,9 +334,14 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
|
|||
unsigned long mask = PSW_MASK_USER;
|
||||
|
||||
mask |= is_ri_task(child) ? PSW_MASK_RI : 0;
|
||||
if ((data & ~mask) != PSW_USER_BITS)
|
||||
if ((data ^ PSW_USER_BITS) & ~mask)
|
||||
/* Invalid psw mask. */
|
||||
return -EINVAL;
|
||||
if ((data & PSW_MASK_ASC) == PSW_ASC_HOME)
|
||||
/* Invalid address-space-control bits */
|
||||
return -EINVAL;
|
||||
if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))
|
||||
/* Invalid addressing mode bits */
|
||||
return -EINVAL;
|
||||
}
|
||||
*(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
|
||||
|
|
@ -672,9 +677,12 @@ static int __poke_user_compat(struct task_struct *child,
|
|||
|
||||
mask |= is_ri_task(child) ? PSW32_MASK_RI : 0;
|
||||
/* Build a 64 bit psw mask from 31 bit mask. */
|
||||
if ((tmp & ~mask) != PSW32_USER_BITS)
|
||||
if ((tmp ^ PSW32_USER_BITS) & ~mask)
|
||||
/* Invalid psw mask. */
|
||||
return -EINVAL;
|
||||
if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME)
|
||||
/* Invalid address-space-control bits */
|
||||
return -EINVAL;
|
||||
regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
|
||||
(regs->psw.mask & PSW_MASK_BA) |
|
||||
(__u64)(tmp & mask) << 32;
|
||||
|
|
|
|||
|
|
@ -48,13 +48,10 @@
|
|||
static LIST_HEAD(zpci_list);
|
||||
static DEFINE_SPINLOCK(zpci_list_lock);
|
||||
|
||||
static void zpci_enable_irq(struct irq_data *data);
|
||||
static void zpci_disable_irq(struct irq_data *data);
|
||||
|
||||
static struct irq_chip zpci_irq_chip = {
|
||||
.name = "zPCI",
|
||||
.irq_unmask = zpci_enable_irq,
|
||||
.irq_mask = zpci_disable_irq,
|
||||
.irq_unmask = unmask_msi_irq,
|
||||
.irq_mask = mask_msi_irq,
|
||||
};
|
||||
|
||||
static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
|
||||
|
|
@ -244,43 +241,6 @@ static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
|
|||
return rc;
|
||||
}
|
||||
|
||||
static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag)
|
||||
{
|
||||
int offset, pos;
|
||||
u32 mask_bits;
|
||||
|
||||
if (msi->msi_attrib.is_msix) {
|
||||
offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
|
||||
PCI_MSIX_ENTRY_VECTOR_CTRL;
|
||||
msi->masked = readl(msi->mask_base + offset);
|
||||
writel(flag, msi->mask_base + offset);
|
||||
} else if (msi->msi_attrib.maskbit) {
|
||||
pos = (long) msi->mask_base;
|
||||
pci_read_config_dword(msi->dev, pos, &mask_bits);
|
||||
mask_bits &= ~(mask);
|
||||
mask_bits |= flag & mask;
|
||||
pci_write_config_dword(msi->dev, pos, mask_bits);
|
||||
} else
|
||||
return 0;
|
||||
|
||||
msi->msi_attrib.maskbit = !!flag;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void zpci_enable_irq(struct irq_data *data)
|
||||
{
|
||||
struct msi_desc *msi = irq_get_msi_desc(data->irq);
|
||||
|
||||
zpci_msi_set_mask_bits(msi, 1, 0);
|
||||
}
|
||||
|
||||
static void zpci_disable_irq(struct irq_data *data)
|
||||
{
|
||||
struct msi_desc *msi = irq_get_msi_desc(data->irq);
|
||||
|
||||
zpci_msi_set_mask_bits(msi, 1, 1);
|
||||
}
|
||||
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
}
|
||||
|
|
@ -487,7 +447,10 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev)
|
|||
|
||||
/* Release MSI interrupts */
|
||||
list_for_each_entry(msi, &pdev->msi_list, list) {
|
||||
zpci_msi_set_mask_bits(msi, 1, 1);
|
||||
if (msi->msi_attrib.is_msix)
|
||||
default_msix_mask_irq(msi, 1);
|
||||
else
|
||||
default_msi_mask_irq(msi, 1, 1);
|
||||
irq_set_msi_desc(msi->irq, NULL);
|
||||
irq_free_desc(msi->irq);
|
||||
msi->msg.address_lo = 0;
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ endif
|
|||
|
||||
cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,)
|
||||
cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \
|
||||
$(call cc-option,-m2a-nofpu,)
|
||||
$(call cc-option,-m2a-nofpu,) \
|
||||
$(call cc-option,-m4-nofpu,)
|
||||
cflags-$(CONFIG_CPU_SH3) := $(call cc-option,-m3,)
|
||||
cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \
|
||||
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
|
||||
|
|
|
|||
|
|
@ -78,6 +78,7 @@ config SPARC64
|
|||
select HAVE_C_RECORDMCOUNT
|
||||
select NO_BOOTMEM
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
|
||||
config ARCH_DEFCONFIG
|
||||
string
|
||||
|
|
|
|||
|
|
@ -410,8 +410,9 @@
|
|||
#define __NR_finit_module 342
|
||||
#define __NR_sched_setattr 343
|
||||
#define __NR_sched_getattr 344
|
||||
#define __NR_renameat2 345
|
||||
|
||||
#define NR_syscalls 345
|
||||
#define NR_syscalls 346
|
||||
|
||||
/* Bitmask values returned from kern_features system call. */
|
||||
#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001
|
||||
|
|
|
|||
|
|
@ -48,6 +48,7 @@ SIGN1(sys32_futex, compat_sys_futex, %o1)
|
|||
SIGN1(sys32_recvfrom, compat_sys_recvfrom, %o0)
|
||||
SIGN1(sys32_recvmsg, compat_sys_recvmsg, %o0)
|
||||
SIGN1(sys32_sendmsg, compat_sys_sendmsg, %o0)
|
||||
SIGN2(sys32_renameat2, sys_renameat2, %o0, %o2)
|
||||
|
||||
.globl sys32_mmap2
|
||||
sys32_mmap2:
|
||||
|
|
|
|||
|
|
@ -86,3 +86,4 @@ sys_call_table:
|
|||
/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
|
||||
/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
|
||||
/*340*/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
|
||||
/*345*/ .long sys_renameat2
|
||||
|
|
|
|||
|
|
@ -87,6 +87,7 @@ sys_call_table32:
|
|||
/*330*/ .word compat_sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
|
||||
.word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
|
||||
/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
|
||||
.word sys32_renameat2
|
||||
|
||||
#endif /* CONFIG_COMPAT */
|
||||
|
||||
|
|
@ -165,3 +166,4 @@ sys_call_table:
|
|||
/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
|
||||
.word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
|
||||
/*340*/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
|
||||
.word sys_renameat2
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <mem_user.h>
|
||||
#include <os.h>
|
||||
#include <skas.h>
|
||||
#include <kern_util.h>
|
||||
|
||||
struct host_vm_change {
|
||||
struct host_vm_op {
|
||||
|
|
@ -124,6 +125,9 @@ static int add_munmap(unsigned long addr, unsigned long len,
|
|||
struct host_vm_op *last;
|
||||
int ret = 0;
|
||||
|
||||
if ((addr >= STUB_START) && (addr < STUB_END))
|
||||
return -EINVAL;
|
||||
|
||||
if (hvc->index != 0) {
|
||||
last = &hvc->ops[hvc->index - 1];
|
||||
if ((last->type == MUNMAP) &&
|
||||
|
|
@ -283,8 +287,11 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr,
|
|||
/* This is not an else because ret is modified above */
|
||||
if (ret) {
|
||||
printk(KERN_ERR "fix_range_common: failed, killing current "
|
||||
"process\n");
|
||||
"process: %d\n", task_tgid_vnr(current));
|
||||
/* We are under mmap_sem, release it such that current can terminate */
|
||||
up_write(¤t->mm->mmap_sem);
|
||||
force_sig(SIGKILL, current);
|
||||
do_signal();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -206,7 +206,7 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,
|
|||
int is_write = FAULT_WRITE(fi);
|
||||
unsigned long address = FAULT_ADDRESS(fi);
|
||||
|
||||
if (regs)
|
||||
if (!is_user && regs)
|
||||
current->thread.segv_regs = container_of(regs, struct pt_regs, regs);
|
||||
|
||||
if (!is_user && (address >= start_vm) && (address < end_vm)) {
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ static int ptrace_dump_regs(int pid)
|
|||
|
||||
void wait_stub_done(int pid)
|
||||
{
|
||||
int n, status, err, bad_stop = 0;
|
||||
int n, status, err;
|
||||
|
||||
while (1) {
|
||||
CATCH_EINTR(n = waitpid(pid, &status, WUNTRACED | __WALL));
|
||||
|
|
@ -74,8 +74,6 @@ void wait_stub_done(int pid)
|
|||
|
||||
if (((1 << WSTOPSIG(status)) & STUB_DONE_MASK) != 0)
|
||||
return;
|
||||
else
|
||||
bad_stop = 1;
|
||||
|
||||
bad_wait:
|
||||
err = ptrace_dump_regs(pid);
|
||||
|
|
@ -85,10 +83,7 @@ bad_wait:
|
|||
printk(UM_KERN_ERR "wait_stub_done : failed to wait for SIGTRAP, "
|
||||
"pid = %d, n = %d, errno = %d, status = 0x%x\n", pid, n, errno,
|
||||
status);
|
||||
if (bad_stop)
|
||||
kill(pid, SIGKILL);
|
||||
else
|
||||
fatal_sigsegv();
|
||||
fatal_sigsegv();
|
||||
}
|
||||
|
||||
extern unsigned long current_stub_stack(void);
|
||||
|
|
|
|||
|
|
@ -131,6 +131,7 @@ config X86
|
|||
select HAVE_CC_STACKPROTECTOR
|
||||
select GENERIC_CPU_AUTOPROBE
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select ARCH_SUPPORTS_ATOMIC_RMW
|
||||
|
||||
config INSTRUCTION_DECODER
|
||||
def_bool y
|
||||
|
|
|
|||
|
|
@ -91,10 +91,9 @@ bs_die:
|
|||
|
||||
.section ".bsdata", "a"
|
||||
bugger_off_msg:
|
||||
.ascii "Direct floppy boot is not supported. "
|
||||
.ascii "Use a boot loader program instead.\r\n"
|
||||
.ascii "Use a boot loader.\r\n"
|
||||
.ascii "\n"
|
||||
.ascii "Remove disk and press any key to reboot ...\r\n"
|
||||
.ascii "Remove disk and press any key to reboot...\r\n"
|
||||
.byte 0
|
||||
|
||||
#ifdef CONFIG_EFI_STUB
|
||||
|
|
@ -108,7 +107,7 @@ coff_header:
|
|||
#else
|
||||
.word 0x8664 # x86-64
|
||||
#endif
|
||||
.word 3 # nr_sections
|
||||
.word 4 # nr_sections
|
||||
.long 0 # TimeDateStamp
|
||||
.long 0 # PointerToSymbolTable
|
||||
.long 1 # NumberOfSymbols
|
||||
|
|
@ -250,6 +249,25 @@ section_table:
|
|||
.word 0 # NumberOfLineNumbers
|
||||
.long 0x60500020 # Characteristics (section flags)
|
||||
|
||||
#
|
||||
# The offset & size fields are filled in by build.c.
|
||||
#
|
||||
.ascii ".bss"
|
||||
.byte 0
|
||||
.byte 0
|
||||
.byte 0
|
||||
.byte 0
|
||||
.long 0
|
||||
.long 0x0
|
||||
.long 0 # Size of initialized data
|
||||
# on disk
|
||||
.long 0x0
|
||||
.long 0 # PointerToRelocations
|
||||
.long 0 # PointerToLineNumbers
|
||||
.word 0 # NumberOfRelocations
|
||||
.word 0 # NumberOfLineNumbers
|
||||
.long 0xc8000080 # Characteristics (section flags)
|
||||
|
||||
#endif /* CONFIG_EFI_STUB */
|
||||
|
||||
# Kernel attributes; used by setup. This is part 1 of the
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ static void usage(void)
|
|||
|
||||
#ifdef CONFIG_EFI_STUB
|
||||
|
||||
static void update_pecoff_section_header(char *section_name, u32 offset, u32 size)
|
||||
static void update_pecoff_section_header_fields(char *section_name, u32 vma, u32 size, u32 datasz, u32 offset)
|
||||
{
|
||||
unsigned int pe_header;
|
||||
unsigned short num_sections;
|
||||
|
|
@ -164,10 +164,10 @@ static void update_pecoff_section_header(char *section_name, u32 offset, u32 siz
|
|||
put_unaligned_le32(size, section + 0x8);
|
||||
|
||||
/* section header vma field */
|
||||
put_unaligned_le32(offset, section + 0xc);
|
||||
put_unaligned_le32(vma, section + 0xc);
|
||||
|
||||
/* section header 'size of initialised data' field */
|
||||
put_unaligned_le32(size, section + 0x10);
|
||||
put_unaligned_le32(datasz, section + 0x10);
|
||||
|
||||
/* section header 'file offset' field */
|
||||
put_unaligned_le32(offset, section + 0x14);
|
||||
|
|
@ -179,6 +179,11 @@ static void update_pecoff_section_header(char *section_name, u32 offset, u32 siz
|
|||
}
|
||||
}
|
||||
|
||||
static void update_pecoff_section_header(char *section_name, u32 offset, u32 size)
|
||||
{
|
||||
update_pecoff_section_header_fields(section_name, offset, size, size, offset);
|
||||
}
|
||||
|
||||
static void update_pecoff_setup_and_reloc(unsigned int size)
|
||||
{
|
||||
u32 setup_offset = 0x200;
|
||||
|
|
@ -203,9 +208,6 @@ static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)
|
|||
|
||||
pe_header = get_unaligned_le32(&buf[0x3c]);
|
||||
|
||||
/* Size of image */
|
||||
put_unaligned_le32(file_sz, &buf[pe_header + 0x50]);
|
||||
|
||||
/*
|
||||
* Size of code: Subtract the size of the first sector (512 bytes)
|
||||
* which includes the header.
|
||||
|
|
@ -220,6 +222,22 @@ static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)
|
|||
update_pecoff_section_header(".text", text_start, text_sz);
|
||||
}
|
||||
|
||||
static void update_pecoff_bss(unsigned int file_sz, unsigned int init_sz)
|
||||
{
|
||||
unsigned int pe_header;
|
||||
unsigned int bss_sz = init_sz - file_sz;
|
||||
|
||||
pe_header = get_unaligned_le32(&buf[0x3c]);
|
||||
|
||||
/* Size of uninitialized data */
|
||||
put_unaligned_le32(bss_sz, &buf[pe_header + 0x24]);
|
||||
|
||||
/* Size of image */
|
||||
put_unaligned_le32(init_sz, &buf[pe_header + 0x50]);
|
||||
|
||||
update_pecoff_section_header_fields(".bss", file_sz, bss_sz, 0, 0);
|
||||
}
|
||||
|
||||
static int reserve_pecoff_reloc_section(int c)
|
||||
{
|
||||
/* Reserve 0x20 bytes for .reloc section */
|
||||
|
|
@ -259,6 +277,8 @@ static void efi_stub_entry_update(void)
|
|||
static inline void update_pecoff_setup_and_reloc(unsigned int size) {}
|
||||
static inline void update_pecoff_text(unsigned int text_start,
|
||||
unsigned int file_sz) {}
|
||||
static inline void update_pecoff_bss(unsigned int file_sz,
|
||||
unsigned int init_sz) {}
|
||||
static inline void efi_stub_defaults(void) {}
|
||||
static inline void efi_stub_entry_update(void) {}
|
||||
|
||||
|
|
@ -310,7 +330,7 @@ static void parse_zoffset(char *fname)
|
|||
|
||||
int main(int argc, char ** argv)
|
||||
{
|
||||
unsigned int i, sz, setup_sectors;
|
||||
unsigned int i, sz, setup_sectors, init_sz;
|
||||
int c;
|
||||
u32 sys_size;
|
||||
struct stat sb;
|
||||
|
|
@ -376,7 +396,9 @@ int main(int argc, char ** argv)
|
|||
buf[0x1f1] = setup_sectors-1;
|
||||
put_unaligned_le32(sys_size, &buf[0x1f4]);
|
||||
|
||||
update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz));
|
||||
update_pecoff_text(setup_sectors * 512, i + (sys_size * 16));
|
||||
init_sz = get_unaligned_le32(&buf[0x260]);
|
||||
update_pecoff_bss(i + (sys_size * 16), init_sz);
|
||||
|
||||
efi_stub_entry_update();
|
||||
|
||||
|
|
|
|||
|
|
@ -129,7 +129,7 @@ static inline notrace unsigned long arch_local_irq_save(void)
|
|||
|
||||
#define PARAVIRT_ADJUST_EXCEPTION_FRAME /* */
|
||||
|
||||
#define INTERRUPT_RETURN iretq
|
||||
#define INTERRUPT_RETURN jmp native_iret
|
||||
#define USERGS_SYSRET64 \
|
||||
swapgs; \
|
||||
sysretq;
|
||||
|
|
|
|||
|
|
@ -841,7 +841,6 @@ static int apm_do_idle(void)
|
|||
u32 eax;
|
||||
u8 ret = 0;
|
||||
int idled = 0;
|
||||
int polling;
|
||||
int err = 0;
|
||||
|
||||
if (!need_resched()) {
|
||||
|
|
|
|||
|
|
@ -370,6 +370,17 @@ static void init_intel(struct cpuinfo_x86 *c)
|
|||
*/
|
||||
detect_extended_topology(c);
|
||||
|
||||
if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
|
||||
/*
|
||||
* let's use the legacy cpuid vector 0x1 and 0x4 for topology
|
||||
* detection.
|
||||
*/
|
||||
c->x86_max_cores = intel_num_cpu_cores(c);
|
||||
#ifdef CONFIG_X86_32
|
||||
detect_ht(c);
|
||||
#endif
|
||||
}
|
||||
|
||||
l2 = init_intel_cacheinfo(c);
|
||||
if (c->cpuid_level > 9) {
|
||||
unsigned eax = cpuid_eax(10);
|
||||
|
|
@ -438,17 +449,6 @@ static void init_intel(struct cpuinfo_x86 *c)
|
|||
set_cpu_cap(c, X86_FEATURE_P3);
|
||||
#endif
|
||||
|
||||
if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
|
||||
/*
|
||||
* let's use the legacy cpuid vector 0x1 and 0x4 for topology
|
||||
* detection.
|
||||
*/
|
||||
c->x86_max_cores = intel_num_cpu_cores(c);
|
||||
#ifdef CONFIG_X86_32
|
||||
detect_ht(c);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Work around errata */
|
||||
srat_detect_node(c);
|
||||
|
||||
|
|
|
|||
|
|
@ -730,6 +730,18 @@ unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c)
|
|||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_HT
|
||||
/*
|
||||
* If cpu_llc_id is not yet set, this means cpuid_level < 4 which in
|
||||
* turns means that the only possibility is SMT (as indicated in
|
||||
* cpuid1). Since cpuid2 doesn't specify shared caches, and we know
|
||||
* that SMT shares all caches, we can unconditionally set cpu_llc_id to
|
||||
* c->phys_proc_id.
|
||||
*/
|
||||
if (per_cpu(cpu_llc_id, cpu) == BAD_APICID)
|
||||
per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
|
||||
#endif
|
||||
|
||||
c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
|
||||
|
||||
return l2;
|
||||
|
|
|
|||
|
|
@ -2451,6 +2451,12 @@ static __init int mcheck_init_device(void)
|
|||
for_each_online_cpu(i) {
|
||||
err = mce_device_create(i);
|
||||
if (err) {
|
||||
/*
|
||||
* Register notifier anyway (and do not unreg it) so
|
||||
* that we don't leave undeleted timers, see notifier
|
||||
* callback above.
|
||||
*/
|
||||
__register_hotcpu_notifier(&mce_cpu_notifier);
|
||||
cpu_notifier_register_done();
|
||||
goto err_device_create;
|
||||
}
|
||||
|
|
@ -2471,10 +2477,6 @@ static __init int mcheck_init_device(void)
|
|||
err_register:
|
||||
unregister_syscore_ops(&mce_syscore_ops);
|
||||
|
||||
cpu_notifier_register_begin();
|
||||
__unregister_hotcpu_notifier(&mce_cpu_notifier);
|
||||
cpu_notifier_register_done();
|
||||
|
||||
err_device_create:
|
||||
/*
|
||||
* We didn't keep track of which devices were created above, but
|
||||
|
|
|
|||
|
|
@ -118,6 +118,9 @@ static int x86_pmu_extra_regs(u64 config, struct perf_event *event)
|
|||
continue;
|
||||
if (event->attr.config1 & ~er->valid_mask)
|
||||
return -EINVAL;
|
||||
/* Check if the extra msrs can be safely accessed*/
|
||||
if (!er->extra_msr_access)
|
||||
return -ENXIO;
|
||||
|
||||
reg->idx = er->idx;
|
||||
reg->config = event->attr.config1;
|
||||
|
|
|
|||
|
|
@ -295,14 +295,16 @@ struct extra_reg {
|
|||
u64 config_mask;
|
||||
u64 valid_mask;
|
||||
int idx; /* per_xxx->regs[] reg index */
|
||||
bool extra_msr_access;
|
||||
};
|
||||
|
||||
#define EVENT_EXTRA_REG(e, ms, m, vm, i) { \
|
||||
.event = (e), \
|
||||
.msr = (ms), \
|
||||
.config_mask = (m), \
|
||||
.valid_mask = (vm), \
|
||||
.idx = EXTRA_REG_##i, \
|
||||
.event = (e), \
|
||||
.msr = (ms), \
|
||||
.config_mask = (m), \
|
||||
.valid_mask = (vm), \
|
||||
.idx = EXTRA_REG_##i, \
|
||||
.extra_msr_access = true, \
|
||||
}
|
||||
|
||||
#define INTEL_EVENT_EXTRA_REG(event, msr, vm, idx) \
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue