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OMAP: DSS2: HDMI: Use dss_device clock configuration for HDMI PLL parameters

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Move some of the configurable HDMI PLL parameters to dssdev.clock struct.
Cleanup the function hdmi_compute_pll() by using the parameters defined in the
board file and do some cosmetic modifications.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Archit Taneja 2011-04-12 13:52:25 +05:30 committed by Tomi Valkeinen
parent e888166247
commit 6cb07b256a
3 changed files with 27 additions and 14 deletions
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9
arch/arm/mach-omap2/board-4430sdp.c
View file

@ -680,6 +680,15 @@ static struct omap_dss_device sdp4430_hdmi_device = {
.name = "hdmi",
.driver_name = "hdmi_panel",
.type = OMAP_DISPLAY_TYPE_HDMI,
.clocks = {
.dispc = {
.dispc_fclk_src = OMAP_DSS_CLK_SRC_FCK,
},
.hdmi = {
.regn = 15,
.regm2 = 1,
},
},
.platform_enable = sdp4430_panel_enable_hdmi,
.platform_disable = sdp4430_panel_disable_hdmi,
.channel = OMAP_DSS_CHANNEL_DIGIT,

27
drivers/video/omap2/dss/hdmi.c
View file

@ -1052,25 +1052,26 @@ static void update_hdmi_timings(struct hdmi_config *cfg,
cfg->timings.hsync_pol = cea_vesa_timings[code].hsync_pol;
}
static void hdmi_compute_pll(unsigned long clkin, int phy,
int n, struct hdmi_pll_info *pi)
static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy,
struct hdmi_pll_info *pi)
{
unsigned long refclk;
unsigned long clkin, refclk;
u32 mf;
clkin = dss_clk_get_rate(DSS_CLK_SYSCK) / 10000;
/*
* Input clock is predivided by N + 1
* out put of which is reference clk
*/
refclk = clkin / (n + 1);
pi->regn = n;
pi->regn = dssdev->clocks.hdmi.regn;
refclk = clkin / (pi->regn + 1);
/*
* multiplier is pixel_clk/ref_clk
* Multiplying by 100 to avoid fractional part removal
*/
pi->regm = (phy * 100/(refclk))/100;
pi->regm2 = 1;
pi->regm = (phy * 100 / (refclk)) / 100;
pi->regm2 = dssdev->clocks.hdmi.regm2;
/*
* fractional multiplier is remainder of the difference between
@ -1078,14 +1079,14 @@ static void hdmi_compute_pll(unsigned long clkin, int phy,
* multiplied by 2^18(262144) divided by the reference clock
*/
mf = (phy - pi->regm * refclk) * 262144;
pi->regmf = mf/(refclk);
pi->regmf = mf / (refclk);
/*
* Dcofreq should be set to 1 if required pixel clock
* is greater than 1000MHz
*/
pi->dcofreq = phy > 1000 * 100;
pi->regsd = ((pi->regm * clkin / 10) / ((n + 1) * 250) + 5) / 10;
pi->regsd = ((pi->regm * clkin / 10) / ((pi->regn + 1) * 250) + 5) / 10;
DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf);
DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd);
@ -1106,7 +1107,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
int r, code = 0;
struct hdmi_pll_info pll_data;
struct omap_video_timings *p;
int clkin, n, phy;
unsigned long phy;
hdmi_enable_clocks(1);
@ -1126,11 +1127,9 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
dssdev->panel.timings = cea_vesa_timings[code].timings;
update_hdmi_timings(&hdmi.cfg, p, code);
clkin = 3840; /* 38.4 MHz */
n = 15; /* this is a constant for our math */
phy = p->pixel_clock;
hdmi_compute_pll(clkin, phy, n, &pll_data);
hdmi_compute_pll(dssdev, phy, &pll_data);
hdmi_wp_video_start(0);
@ -1160,7 +1159,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
* dynamically by user. This can be moved to single location , say
* Boardfile.
*/
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
/* bypass TV gamma table */
dispc_enable_gamma_table(0);

5
include/video/omapdss.h
View file

@ -438,6 +438,11 @@ struct omap_dss_device {
u16 lp_clk_div;
enum omap_dss_clk_source dsi_fclk_src;
} dsi;
struct {
u16 regn;
u16 regm2;
} hdmi;
} clocks;
struct {