regulator: Add support for stm32 power regulators
Add support for 1V1 1V8 USB3V3 power regulators. Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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c29687c354
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@ -840,6 +840,13 @@ config REGULATOR_STM32_VREFBUF
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This driver can also be built as a module. If so, the module
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will be called stm32-vrefbuf.
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config REGULATOR_STM32_PWR
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bool "STMicroelectronics STM32 PWR"
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depends on ARCH_STM32 || COMPILE_TEST
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help
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This driver supports internal regulators (1V1, 1V8, 3V3) in the
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STMicroelectronics STM32 chips.
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config REGULATOR_STPMIC1
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tristate "STMicroelectronics STPMIC1 PMIC Regulators"
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depends on MFD_STPMIC1
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@ -105,6 +105,7 @@ obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
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obj-$(CONFIG_REGULATOR_SC2731) += sc2731-regulator.o
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obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o
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obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
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obj-$(CONFIG_REGULATOR_STM32_PWR) += stm32-pwr.o
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obj-$(CONFIG_REGULATOR_STPMIC1) += stpmic1_regulator.o
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obj-$(CONFIG_REGULATOR_STW481X_VMMC) += stw481x-vmmc.o
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obj-$(CONFIG_REGULATOR_SY8106A) += sy8106a-regulator.o
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190
drivers/regulator/stm32-pwr.c
Normal file
190
drivers/regulator/stm32-pwr.c
Normal file
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@ -0,0 +1,190 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) STMicroelectronics 2019
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// Authors: Gabriel Fernandez <gabriel.fernandez@st.com>
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// Pascal Paillet <p.paillet@st.com>.
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/of_regulator.h>
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/*
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* Registers description
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*/
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#define REG_PWR_CR3 0x0C
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#define USB_3_3_EN BIT(24)
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#define USB_3_3_RDY BIT(26)
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#define REG_1_8_EN BIT(28)
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#define REG_1_8_RDY BIT(29)
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#define REG_1_1_EN BIT(30)
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#define REG_1_1_RDY BIT(31)
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/* list of supported regulators */
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enum {
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PWR_REG11,
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PWR_REG18,
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PWR_USB33,
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STM32PWR_REG_NUM_REGS
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};
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u32 ready_mask_table[STM32PWR_REG_NUM_REGS] = {
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[PWR_REG11] = REG_1_1_RDY,
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[PWR_REG18] = REG_1_8_RDY,
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[PWR_USB33] = USB_3_3_RDY,
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};
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struct stm32_pwr_reg {
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void __iomem *base;
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const struct regulator_desc *desc;
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u32 ready_mask;
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};
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int stm32_pwr_reg_is_ready(struct regulator_dev *rdev)
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{
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struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev);
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u32 val;
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val = readl_relaxed(priv->base + REG_PWR_CR3);
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return (val & priv->ready_mask);
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}
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int stm32_pwr_reg_is_enabled(struct regulator_dev *rdev)
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{
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struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev);
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u32 val;
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val = readl_relaxed(priv->base + REG_PWR_CR3);
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return (val & priv->desc->enable_mask);
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}
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static int stm32_pwr_reg_enable(struct regulator_dev *rdev)
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{
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struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev);
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int ret;
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u32 val;
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val = readl_relaxed(priv->base + REG_PWR_CR3);
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val |= priv->desc->enable_mask;
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writel_relaxed(val, priv->base + REG_PWR_CR3);
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/* use an arbitrary timeout of 20ms */
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ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, val,
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100, 20 * 1000);
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if (ret)
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dev_err(&rdev->dev, "regulator enable timed out!\n");
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return ret;
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}
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static int stm32_pwr_reg_disable(struct regulator_dev *rdev)
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{
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struct stm32_pwr_reg *priv = rdev_get_drvdata(rdev);
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int ret;
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u32 val;
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val = readl_relaxed(priv->base + REG_PWR_CR3);
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val &= ~priv->desc->enable_mask;
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writel_relaxed(val, priv->base + REG_PWR_CR3);
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/* use an arbitrary timeout of 20ms */
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ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, !val,
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100, 20 * 1000);
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if (ret)
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dev_err(&rdev->dev, "regulator disable timed out!\n");
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return ret;
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}
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static const struct regulator_ops stm32_pwr_reg_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = stm32_pwr_reg_enable,
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.disable = stm32_pwr_reg_disable,
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.is_enabled = stm32_pwr_reg_is_enabled,
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};
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#define PWR_REG(_id, _name, _volt, _en, _supply) \
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[_id] = { \
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.id = _id, \
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.name = _name, \
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.of_match = of_match_ptr(_name), \
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.n_voltages = 1, \
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.type = REGULATOR_VOLTAGE, \
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.min_uV = _volt, \
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.fixed_uV = _volt, \
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.ops = &stm32_pwr_reg_ops, \
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.enable_mask = _en, \
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.owner = THIS_MODULE, \
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.supply_name = _supply, \
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} \
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static const struct regulator_desc stm32_pwr_desc[] = {
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PWR_REG(PWR_REG11, "reg11", 1100000, REG_1_1_EN, "vdd"),
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PWR_REG(PWR_REG18, "reg18", 1800000, REG_1_8_EN, "vdd"),
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PWR_REG(PWR_USB33, "usb33", 3300000, USB_3_3_EN, "vdd_3v3_usbfs"),
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};
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static int stm32_pwr_regulator_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct stm32_pwr_reg *priv;
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void __iomem *base;
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struct regulator_dev *rdev;
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struct regulator_config config = { };
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int i, ret = 0;
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base = of_iomap(np, 0);
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if (IS_ERR(base)) {
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dev_err(&pdev->dev, "Unable to map IO memory\n");
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return PTR_ERR(base);
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}
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config.dev = &pdev->dev;
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for (i = 0; i < STM32PWR_REG_NUM_REGS; i++) {
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priv = devm_kzalloc(&pdev->dev, sizeof(struct stm32_pwr_reg),
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GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base = base;
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priv->desc = &stm32_pwr_desc[i];
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priv->ready_mask = ready_mask_table[i];
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config.driver_data = priv;
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rdev = devm_regulator_register(&pdev->dev,
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&stm32_pwr_desc[i],
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&config);
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if (IS_ERR(rdev)) {
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ret = PTR_ERR(rdev);
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dev_err(&pdev->dev,
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"Failed to register regulator: %d\n", ret);
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break;
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}
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}
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return ret;
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}
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static const struct of_device_id stm32_pwr_of_match[] = {
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{ .compatible = "st,stm32mp1,pwr-reg", },
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_pwr_of_match);
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static struct platform_driver stm32_pwr_driver = {
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.probe = stm32_pwr_regulator_probe,
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.driver = {
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.name = "stm32-pwr-regulator",
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.of_match_table = of_match_ptr(stm32_pwr_of_match),
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},
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};
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module_platform_driver(stm32_pwr_driver);
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MODULE_DESCRIPTION("STM32MP1 PWR voltage regulator driver");
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MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
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MODULE_LICENSE("GPL v2");
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