Merge branch 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: ALSA: hda - Read buffer overflow ALSA: hda: Correct EAPD for Dell Inspiron 1525 ALSA: hda: warn on spurious response ALSA: hda: remember last command for each codec ALSA: hda: read CORBWP inside reg_lock ALSA: hda: take reg_lock in azx_init_cmd_io/azx_free_cmd_io ALSA: hda: take cmd_mutex in probe_codec() ALSA: hda: track CIRB/CORB command/response states for each codec ALSA: hda - Fix quirk for Toshiba Satellite A135-S4527
This commit is contained in:
commit
6ce90c430b
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@ -174,7 +174,7 @@ static int codec_exec_verb(struct hda_codec *codec, unsigned int cmd,
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mutex_lock(&bus->cmd_mutex);
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err = bus->ops.command(bus, cmd);
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if (!err && res)
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*res = bus->ops.get_response(bus);
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*res = bus->ops.get_response(bus, codec->addr);
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mutex_unlock(&bus->cmd_mutex);
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snd_hda_power_down(codec);
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if (res && *res == -1 && bus->rirb_error) {
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@ -568,7 +568,7 @@ struct hda_bus_ops {
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/* send a single command */
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int (*command)(struct hda_bus *bus, unsigned int cmd);
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/* get a response from the last command */
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unsigned int (*get_response)(struct hda_bus *bus);
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unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
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/* free the private data */
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void (*private_free)(struct hda_bus *);
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/* attach a PCM stream */
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@ -253,7 +253,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
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/* STATESTS int mask: S3,SD2,SD1,SD0 */
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#define AZX_MAX_CODECS 4
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#define STATESTS_INT_MASK 0x0f
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#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1)
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/* SD_CTL bits */
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#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
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@ -361,8 +361,8 @@ struct azx_rb {
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dma_addr_t addr; /* physical address of CORB/RIRB buffer */
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/* for RIRB */
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unsigned short rp, wp; /* read/write pointers */
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int cmds; /* number of pending requests */
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u32 res; /* last read value */
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int cmds[AZX_MAX_CODECS]; /* number of pending requests */
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u32 res[AZX_MAX_CODECS]; /* last read value */
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};
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struct azx {
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@ -418,7 +418,7 @@ struct azx {
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unsigned int probing :1; /* codec probing phase */
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/* for debugging */
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unsigned int last_cmd; /* last issued command (to sync) */
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unsigned int last_cmd[AZX_MAX_CODECS];
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/* for pending irqs */
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struct work_struct irq_pending_work;
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@ -513,6 +513,7 @@ static int azx_alloc_cmd_io(struct azx *chip)
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static void azx_init_cmd_io(struct azx *chip)
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{
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spin_lock_irq(&chip->reg_lock);
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/* CORB set up */
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chip->corb.addr = chip->rb.addr;
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chip->corb.buf = (u32 *)chip->rb.area;
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@ -531,7 +532,8 @@ static void azx_init_cmd_io(struct azx *chip)
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/* RIRB set up */
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chip->rirb.addr = chip->rb.addr + 2048;
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chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
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chip->rirb.wp = chip->rirb.rp = chip->rirb.cmds = 0;
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chip->rirb.wp = chip->rirb.rp = 0;
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memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds));
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azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
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azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
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@ -543,30 +545,60 @@ static void azx_init_cmd_io(struct azx *chip)
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azx_writew(chip, RINTCNT, 1);
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/* enable rirb dma and response irq */
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azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN);
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spin_unlock_irq(&chip->reg_lock);
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}
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static void azx_free_cmd_io(struct azx *chip)
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{
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spin_lock_irq(&chip->reg_lock);
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/* disable ringbuffer DMAs */
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azx_writeb(chip, RIRBCTL, 0);
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azx_writeb(chip, CORBCTL, 0);
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spin_unlock_irq(&chip->reg_lock);
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}
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static unsigned int azx_command_addr(u32 cmd)
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{
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unsigned int addr = cmd >> 28;
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if (addr >= AZX_MAX_CODECS) {
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snd_BUG();
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addr = 0;
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}
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return addr;
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}
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static unsigned int azx_response_addr(u32 res)
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{
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unsigned int addr = res & 0xf;
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if (addr >= AZX_MAX_CODECS) {
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snd_BUG();
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addr = 0;
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}
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return addr;
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}
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/* send a command */
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static int azx_corb_send_cmd(struct hda_bus *bus, u32 val)
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{
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struct azx *chip = bus->private_data;
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unsigned int addr = azx_command_addr(val);
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unsigned int wp;
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spin_lock_irq(&chip->reg_lock);
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/* add command to corb */
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wp = azx_readb(chip, CORBWP);
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wp++;
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wp %= ICH6_MAX_CORB_ENTRIES;
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spin_lock_irq(&chip->reg_lock);
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chip->rirb.cmds++;
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chip->rirb.cmds[addr]++;
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chip->corb.buf[wp] = cpu_to_le32(val);
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azx_writel(chip, CORBWP, wp);
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spin_unlock_irq(&chip->reg_lock);
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return 0;
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@ -578,6 +610,7 @@ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val)
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static void azx_update_rirb(struct azx *chip)
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{
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unsigned int rp, wp;
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unsigned int addr;
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u32 res, res_ex;
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wp = azx_readb(chip, RIRBWP);
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@ -592,18 +625,24 @@ static void azx_update_rirb(struct azx *chip)
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rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
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res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
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res = le32_to_cpu(chip->rirb.buf[rp]);
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addr = azx_response_addr(res_ex);
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if (res_ex & ICH6_RIRB_EX_UNSOL_EV)
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snd_hda_queue_unsol_event(chip->bus, res, res_ex);
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else if (chip->rirb.cmds) {
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chip->rirb.res = res;
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else if (chip->rirb.cmds[addr]) {
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chip->rirb.res[addr] = res;
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smp_wmb();
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chip->rirb.cmds--;
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}
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chip->rirb.cmds[addr]--;
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} else
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snd_printk(KERN_ERR SFX "spurious response %#x:%#x, "
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"last cmd=%#08x\n",
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res, res_ex,
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chip->last_cmd[addr]);
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}
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}
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/* receive a response */
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static unsigned int azx_rirb_get_response(struct hda_bus *bus)
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static unsigned int azx_rirb_get_response(struct hda_bus *bus,
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unsigned int addr)
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{
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struct azx *chip = bus->private_data;
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unsigned long timeout;
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@ -616,10 +655,10 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus)
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azx_update_rirb(chip);
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spin_unlock_irq(&chip->reg_lock);
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}
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if (!chip->rirb.cmds) {
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if (!chip->rirb.cmds[addr]) {
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smp_rmb();
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bus->rirb_error = 0;
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return chip->rirb.res; /* the last value */
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return chip->rirb.res[addr]; /* the last value */
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}
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if (time_after(jiffies, timeout))
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break;
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@ -633,7 +672,8 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus)
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if (chip->msi) {
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snd_printk(KERN_WARNING SFX "No response from codec, "
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"disabling MSI: last cmd=0x%08x\n", chip->last_cmd);
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"disabling MSI: last cmd=0x%08x\n",
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chip->last_cmd[addr]);
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free_irq(chip->irq, chip);
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chip->irq = -1;
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pci_disable_msi(chip->pci);
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@ -648,7 +688,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus)
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if (!chip->polling_mode) {
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snd_printk(KERN_WARNING SFX "azx_get_response timeout, "
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"switching to polling mode: last cmd=0x%08x\n",
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chip->last_cmd);
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chip->last_cmd[addr]);
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chip->polling_mode = 1;
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goto again;
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}
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@ -672,7 +712,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus)
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snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, "
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"switching to single_cmd mode: last cmd=0x%08x\n",
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chip->last_cmd);
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chip->last_cmd[addr]);
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chip->single_cmd = 1;
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bus->response_reset = 0;
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/* re-initialize CORB/RIRB */
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*/
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/* receive a response */
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static int azx_single_wait_for_response(struct azx *chip)
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static int azx_single_wait_for_response(struct azx *chip, unsigned int addr)
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{
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int timeout = 50;
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/* check IRV busy bit */
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if (azx_readw(chip, IRS) & ICH6_IRS_VALID) {
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/* reuse rirb.res as the response return value */
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chip->rirb.res = azx_readl(chip, IR);
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chip->rirb.res[addr] = azx_readl(chip, IR);
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return 0;
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}
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udelay(1);
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if (printk_ratelimit())
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snd_printd(SFX "get_response timeout: IRS=0x%x\n",
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azx_readw(chip, IRS));
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chip->rirb.res = -1;
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chip->rirb.res[addr] = -1;
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return -EIO;
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}
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@ -716,6 +756,7 @@ static int azx_single_wait_for_response(struct azx *chip)
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static int azx_single_send_cmd(struct hda_bus *bus, u32 val)
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{
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struct azx *chip = bus->private_data;
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unsigned int addr = azx_command_addr(val);
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int timeout = 50;
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bus->rirb_error = 0;
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@ -728,7 +769,7 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val)
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azx_writel(chip, IC, val);
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azx_writew(chip, IRS, azx_readw(chip, IRS) |
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ICH6_IRS_BUSY);
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return azx_single_wait_for_response(chip);
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return azx_single_wait_for_response(chip, addr);
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}
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udelay(1);
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}
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@ -739,10 +780,11 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val)
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}
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/* receive a response */
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static unsigned int azx_single_get_response(struct hda_bus *bus)
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static unsigned int azx_single_get_response(struct hda_bus *bus,
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unsigned int addr)
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{
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struct azx *chip = bus->private_data;
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return chip->rirb.res;
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return chip->rirb.res[addr];
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}
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/*
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@ -757,7 +799,7 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val)
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{
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struct azx *chip = bus->private_data;
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chip->last_cmd = val;
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chip->last_cmd[azx_command_addr(val)] = val;
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if (chip->single_cmd)
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return azx_single_send_cmd(bus, val);
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else
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@ -765,13 +807,14 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val)
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}
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/* get a response */
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static unsigned int azx_get_response(struct hda_bus *bus)
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static unsigned int azx_get_response(struct hda_bus *bus,
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unsigned int addr)
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{
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struct azx *chip = bus->private_data;
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if (chip->single_cmd)
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return azx_single_get_response(bus);
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return azx_single_get_response(bus, addr);
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else
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return azx_rirb_get_response(bus);
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return azx_rirb_get_response(bus, addr);
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}
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#ifdef CONFIG_SND_HDA_POWER_SAVE
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@ -1243,10 +1286,12 @@ static int probe_codec(struct azx *chip, int addr)
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(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
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unsigned int res;
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mutex_lock(&chip->bus->cmd_mutex);
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chip->probing = 1;
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azx_send_cmd(chip->bus, cmd);
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res = azx_get_response(chip->bus);
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res = azx_get_response(chip->bus, addr);
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chip->probing = 0;
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mutex_unlock(&chip->bus->cmd_mutex);
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if (res == -1)
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return -EIO;
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snd_printdd(SFX "codec #%d probed OK\n", addr);
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@ -559,7 +559,7 @@ static int alc_pin_mode_get(struct snd_kcontrol *kcontrol,
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/* Find enumerated value for current pinctl setting */
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i = alc_pin_mode_min(dir);
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while (alc_pin_mode_values[i] != pinctl && i <= alc_pin_mode_max(dir))
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while (i <= alc_pin_mode_max(dir) && alc_pin_mode_values[i] != pinctl)
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i++;
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*valp = i <= alc_pin_mode_max(dir) ? i: alc_pin_mode_min(dir);
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return 0;
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@ -15157,7 +15157,7 @@ static struct snd_pci_quirk alc861vd_cfg_tbl[] = {
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SND_PCI_QUIRK(0x10de, 0x03f0, "Realtek ALC660 demo", ALC660VD_3ST),
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SND_PCI_QUIRK(0x1179, 0xff00, "Toshiba A135", ALC861VD_LENOVO),
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/*SND_PCI_QUIRK(0x1179, 0xff00, "DALLAS", ALC861VD_DALLAS),*/ /*lenovo*/
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SND_PCI_QUIRK(0x1179, 0xff01, "DALLAS", ALC861VD_DALLAS),
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SND_PCI_QUIRK(0x1179, 0xff01, "Toshiba A135", ALC861VD_LENOVO),
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SND_PCI_QUIRK(0x1179, 0xff03, "Toshiba P205", ALC861VD_LENOVO),
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SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_DALLAS),
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SND_PCI_QUIRK(0x1565, 0x820d, "Biostar NF61S SE", ALC861VD_6ST_DIG),
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@ -2266,7 +2266,7 @@ static struct snd_pci_quirk stac927x_cfg_tbl[] = {
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
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SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
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@ -5645,6 +5645,13 @@ static int patch_stac927x(struct hda_codec *codec)
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/* GPIO2 High = Enable EAPD */
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spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
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spec->gpio_data = 0x04;
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switch (codec->subsystem_id) {
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case 0x1028022f:
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/* correct EAPD to be GPIO0 */
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spec->eapd_mask = spec->gpio_mask = 0x01;
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spec->gpio_dir = spec->gpio_data = 0x01;
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break;
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};
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spec->dmic_nids = stac927x_dmic_nids;
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spec->num_dmics = STAC927X_NUM_DMICS;
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