MLK-16371-1 arm64: dts: imx8qxp: add the rpmsg support

add the rpmsg support for imx8qxp.
Based on intmux, the int31 of mu0_a0 of m4 side is
used by rpmsg.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

Documentation/devicetree/bindings/rpmsg/imx-rpmsg.txt

@@ -1,11 +1,25 @@
 i.MX RPMSG platform implementations
 
 Required properties:
-- compatible : "fsl,imx7d-rpmsg", "fsl,imx6sx-rpmsg"
+- compatible : "fsl,imx7d-rpmsg", "fsl,imx6sx-rpmsg".
+  "fsl,rpmsg-bus", "simple-bus", "fsl,imx8qxp-rpmsg".
 - vdev-nums : The number of the remote virtual devices.
 - reg : The reserved DDR phisical memory used to store
   vring descriptors.
 
+
+=====================================================================
+message unit module for RPMSG
+
+- mu_rpmsg : The message unit module used to do the communications
+  between the asymmetric cores.
+- compatible : "fsl,imx8-mu", "fsl,imx6sx-mu"
+- reg : Should contain MU registers location and length.
+- interrupts : interrupt mapping for RPMSG MU IRQ
+- interrupt-parent : A single value that points to the interrupt
+  parent to which the child domain is being mapped.
+  Value must be "&intmux_cm40"
+
 Example:
 rpmsg: rpmsg{
 	compatible = "fsl,imx6sx-rpmsg";
@@ -17,3 +31,23 @@ rpmsg: rpmsg{
 	reg = <0xbfff0000 0x10000>;
 	status = "okay";
 };
+
+imx_rpmsg: imx_rpmsg {
+	compatible = "fsl,rpmsg-bus", "simple-bus";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges;
+
+	mu_rpmsg: mu_rpmsg@37440000 {
+		compatible = "fsl,imx8-mu", "fsl,imx6sx-mu";
+		reg = <0x0 0x37440000 0x0 0x10000>;
+		interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-parent = <&intmux_cm40>;
+		status = "okay";
+	};
+
+	rpmsg: rpmsg{
+		compatible = "fsl,imx8qxp-rpmsg";
+		status = "disabled";
+	};
+};

arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts

@@ -607,3 +607,17 @@
 	extcon = <&typec_ptn5150>;
 	status = "okay";
 };
+
+&intmux_cm40 {
+	status = "okay";
+};
+
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 * --0xb8000000~0xb800ffff: pingpong
+	 */
+	vdev-nums = <1>;
+	reg = <0x0 0xb8000000 0x0 0x10000>;
+	status = "okay";
+};

arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek.dts

@@ -518,3 +518,13 @@
 &imx8_gpu_ss {
 	status = "okay";
 };
+
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 * --0xb8000000~0xb800ffff: pingpong
+	 */
+	vdev-nums = <1>;
+	reg = <0x0 0xb8000000 0x0 0x10000>;
+	status = "okay";
+};

arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi

@@ -2084,6 +2084,26 @@
 		cpu-base-addr = <0x80000000>;
 		status = "disabled";
 	};
+
+	imx_rpmsg: imx_rpmsg {
+		compatible = "fsl,rpmsg-bus", "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		mu_rpmsg: mu_rpmsg@37440000 {
+			compatible = "fsl,imx8-mu", "fsl,imx6sx-mu";
+			reg = <0x0 0x37440000 0x0 0x10000>;
+			interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-parent = <&intmux_cm40>;
+			status = "okay";
+		};
+
+		rpmsg: rpmsg{
+			compatible = "fsl,imx8qxp-rpmsg";
+			status = "disabled";
+		};
+	};
 };
 
 &A35_0 {