ARM: OMAP: GPIO de-bounce clocks don't affect module idle state
GPIO de-bounce clocks don't have any impact on the module idle state, so the clock code should not wait for the module to enable after the de-bounce clocks are enabled. Problem found by Kevin Hilman <khilman@deeprootsystems.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
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static struct clk gpio1_dbck = {
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.name = "gpio1_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &wkup_32k_fck,
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.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO1_SHIFT,
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@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
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static struct clk gpio6_dbck = {
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.name = "gpio6_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO6_SHIFT,
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@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
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static struct clk gpio5_dbck = {
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.name = "gpio5_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO5_SHIFT,
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@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
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static struct clk gpio4_dbck = {
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.name = "gpio4_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO4_SHIFT,
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@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
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static struct clk gpio3_dbck = {
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.name = "gpio3_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO3_SHIFT,
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@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
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static struct clk gpio2_dbck = {
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.name = "gpio2_dbck",
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.ops = &clkops_omap2_dflt_wait,
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.ops = &clkops_omap2_dflt,
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.parent = &per_32k_alwon_fck,
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.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
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.enable_bit = OMAP3430_EN_GPIO2_SHIFT,
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