net/smsc911x: Fix delays in the PHY enable/disable routines
Increased delay in the smsc911x_phy_disable_energy_detect (from 1ms to 2ms). Dropped delays in the smsc911x_phy_enable_energy_detect (100ms and 1ms). The patch affect SMSC LAN generation 4 chips with integrated PHY (LAN9221). I saw problems with soft reset due to wrong udelay timings. After I fixed udelay, I measured the time needed to bring integrated PHY from power-down to operational mode (the time beetween clearing EDPWRDOWN bit and soft reset complete event). I got 1ms (measured using ktime_get). The value is equal to the current value (1ms) used in the smsc911x_phy_disable_energy_detect. It is near the upper bound and in order to avoid rare soft reset faults it is doubled (2ms). I don't know official timing for bringing up integrated PHY as specs doesn't clarify this (or may be I didn't found). It looks safe to drop delays before and after setting EDPWRDOWN bit (enable PHY power-down mode). I didn't saw any regressions with the patch. The patch was reviewed by Steve Glendinning and Microchip Team. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Steve Glendinning <steve.glendinning@shawell.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1366,8 +1366,8 @@ static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
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SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
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return rc;
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}
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mdelay(1);
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/* Allow PHY to wakeup */
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mdelay(2);
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}
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return 0;
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@ -1389,7 +1389,6 @@ static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
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/* Only enable if energy detect mode is already disabled */
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if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
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mdelay(100);
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/* Enable energy detect mode for this SMSC Transceivers */
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rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
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rc | MII_LAN83C185_EDPWRDOWN);
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@ -1398,8 +1397,6 @@ static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
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SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
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return rc;
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}
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mdelay(1);
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}
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return 0;
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}
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