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Merge master.kernel.org:/home/rmk/linux-2.6-arm

Browse source 
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6205/1: perf: ensure counter delta is treated as unsigned
  ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220
  ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
  ARM: 6195/1: OMAP3: pmu: make CPU_HAS_PMU dependent on OMAP3_EMU
  ARM: 6194/1: change definition of cpu_relax() for ARM11MPCore
  ARM: 6193/1: RealView: Align the machine_desc.phys_io to 1MB section
  ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
  ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
  ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
  ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
  ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
  [ARM] mmp: fix build failure due to IRQ_PMU depends on ARCH_PXA
  [ARM] pxa/mioa701: fix camera regression
  [ARM] pxa/z2: fix flash layout to final version
  [ARM] pxa/z2: fix missing include in battery driver
  [ARM] pxa: fix incorrect gpio type in udc_pxa2xx.h
This commit is contained in:
Linus Torvalds 2010-07-04 20:21:39 -07:00
parent 3f7d7b4bde 446a5a8b1e
commit 71665963af
20 changed files with 113 additions and 61 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/Kconfig
View file

@ -955,7 +955,8 @@ config XSCALE_PMU
default y
config CPU_HAS_PMU
depends on CPU_V6 || CPU_V7 || XSCALE_PMU
depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
(!ARCH_OMAP3 || OMAP3_EMU)
default y
bool

4
arch/arm/include/asm/mach/udc_pxa2xx.h
View file

@ -21,8 +21,8 @@ struct pxa2xx_udc_mach_info {
* here. Note that sometimes the signals go through inverters...
*/
bool gpio_vbus_inverted;
u16 gpio_vbus; /* high == vbus present */
int gpio_vbus; /* high == vbus present */
bool gpio_pullup_inverted;
u16 gpio_pullup; /* high == pullup activated */
int gpio_pullup; /* high == pullup activated */
};

4
arch/arm/include/asm/processor.h
View file

@ -91,7 +91,11 @@ extern void release_thread(struct task_struct *);
unsigned long get_wchan(struct task_struct *p);
#if __LINUX_ARM_ARCH__ == 6
#define cpu_relax() smp_mb()
#else
#define cpu_relax() barrier()
#endif
/*
* Create a new kernel thread

2
arch/arm/kernel/perf_event.c
View file

@ -201,7 +201,7 @@ armpmu_event_update(struct perf_event *event,
{
int shift = 64 - 32;
s64 prev_raw_count, new_raw_count;
s64 delta;
u64 delta;
again:
prev_raw_count = atomic64_read(&hwc->prev_count);

33
arch/arm/mach-mx3/mach-mx31lilly.c
View file

@ -115,6 +115,8 @@ static struct platform_device physmap_flash_device = {
/* USB */
#if defined(CONFIG_USB_ULPI)
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
@ -244,10 +246,20 @@ static struct mxc_usbh_platform_data usbh2_pdata = {
.flags = MXC_EHCI_POWER_PINS_ENABLED,
};
static struct platform_device *devices[] __initdata = {
&smsc91x_device,
&physmap_flash_device,
};
static void lilly1131_usb_init(void)
{
usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_usbh1, &usbh1_pdata);
mxc_register_device(&mxc_usbh2, &usbh2_pdata);
}
#else
static inline void lilly1131_usb_init(void) {}
#endif /* CONFIG_USB_ULPI */
/* SPI */
@ -279,6 +291,11 @@ static struct spi_board_info mc13783_dev __initdata = {
.platform_data = &mc13783_pdata,
};
static struct platform_device *devices[] __initdata = {
&smsc91x_device,
&physmap_flash_device,
};
static int mx31lilly_baseboard;
core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
@ -321,13 +338,7 @@ static void __init mx31lilly_board_init(void)
platform_add_devices(devices, ARRAY_SIZE(devices));
/* USB */
usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_usbh1, &usbh1_pdata);
mxc_register_device(&mxc_usbh2, &usbh2_pdata);
lilly1131_usb_init();
}
static void __init mx31lilly_timer_init(void)

2
arch/arm/mach-pxa/mioa701.c
View file

@ -697,7 +697,7 @@ static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
};
/* Board I2C devices. */
static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
static struct i2c_board_info mioa701_i2c_devices[] = {
{
I2C_BOARD_INFO("mt9m111", 0x5d),
},

26
arch/arm/mach-pxa/z2.c
View file

@ -3,8 +3,9 @@
*
* Support for the Zipit Z2 Handheld device.
*
* Author: Ken McGuire
* Created: Jan 25, 2009
* Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
*
* Based on research and code by: Ken McGuire
* Based on mainstone.c as modified for the Zipit Z2.
*
* This program is free software; you can redistribute it and/or modify
@ -157,21 +158,14 @@ static struct mtd_partition z2_flash_parts[] = {
{
.name = "U-Boot Bootloader",
.offset = 0x0,
.size = 0x20000,
},
{
.name = "Linux Kernel",
.offset = 0x20000,
.size = 0x220000,
},
{
.name = "Filesystem",
.offset = 0x240000,
.size = 0x5b0000,
},
{
.size = 0x40000,
}, {
.name = "U-Boot Environment",
.offset = 0x7f0000,
.offset = 0x40000,
.size = 0x60000,
}, {
.name = "Flash",
.offset = 0x60000,
.size = MTDPART_SIZ_FULL,
},
};

2
arch/arm/mach-realview/Kconfig
View file

@ -18,6 +18,7 @@ config REALVIEW_EB_ARM11MP
bool "Support ARM11MPCore tile"
depends on MACH_REALVIEW_EB
select CPU_V6
select ARCH_HAS_BARRIERS if SMP
help
Enable support for the ARM11MPCore tile on the Realview platform.
@ -35,6 +36,7 @@ config MACH_REALVIEW_PB11MP
select CPU_V6
select ARM_GIC
select HAVE_PATA_PLATFORM
select ARCH_HAS_BARRIERS if SMP
help
Include support for the ARM(R) RealView MPCore Platform Baseboard.
PB11MPCore is a platform with an on-board ARM11MPCore and has

8
arch/arm/mach-realview/include/mach/barriers.h Normal file
View file

@ -0,0 +1,8 @@
/*
* Barriers redefined for RealView ARM11MPCore platforms with L220 cache
* controller to work around hardware errata causing the outer_sync()
* operation to deadlock the system.
*/
#define mb() dsb()
#define rmb() dmb()
#define wmb() mb()

3
arch/arm/mach-realview/realview_eb.c
View file

@ -32,6 +32,7 @@
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/localtimer.h>
@ -457,7 +458,7 @@ static void __init realview_eb_init(void)
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_EB_UART0_BASE,
.phys_io = REALVIEW_EB_UART0_BASE & SECTION_MASK,
.io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,

3
arch/arm/mach-realview/realview_pb1176.c
View file

@ -32,6 +32,7 @@
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
@ -351,7 +352,7 @@ static void __init realview_pb1176_init(void)
MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PB1176_UART0_BASE,
.phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_pb1176_fixup,

3
arch/arm/mach-realview/realview_pb11mp.c
View file

@ -32,6 +32,7 @@
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/localtimer.h>
@ -373,7 +374,7 @@ static void __init realview_pb11mp_init(void)
MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PB11MP_UART0_BASE,
.phys_io = REALVIEW_PB11MP_UART0_BASE & SECTION_MASK,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,

3
arch/arm/mach-realview/realview_pba8.c
View file

@ -31,6 +31,7 @@
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
@ -323,7 +324,7 @@ static void __init realview_pba8_init(void)
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PBA8_UART0_BASE,
.phys_io = REALVIEW_PBA8_UART0_BASE & SECTION_MASK,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,

3
arch/arm/mach-realview/realview_pbx.c
View file

@ -31,6 +31,7 @@
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/smp_twd.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
@ -409,7 +410,7 @@ static void __init realview_pbx_init(void)
MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
.phys_io = REALVIEW_PBX_UART0_BASE,
.phys_io = REALVIEW_PBX_UART0_BASE & SECTION_MASK,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_pbx_fixup,

3
arch/arm/mach-vexpress/ct-ca9x4.c
View file

@ -10,6 +10,7 @@
#include <linux/amba/clcd.h>
#include <asm/clkdev.h>
#include <asm/pgtable.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
@ -236,7 +237,7 @@ static void ct_ca9x4_init(void)
}
MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
.phys_io = V2M_UART0,
.phys_io = V2M_UART0 & SECTION_MASK,
.io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100,
.map_io = ct_ca9x4_map_io,

21
arch/arm/mm/Kconfig
View file

@ -735,6 +735,25 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
Forget about fast user space cmpxchg support.
It is just not possible.
config DMA_CACHE_RWFO
bool "Enable read/write for ownership DMA cache maintenance"
depends on CPU_V6 && SMP
default y
help
The Snoop Control Unit on ARM11MPCore does not detect the
cache maintenance operations and the dma_{map,unmap}_area()
functions may leave stale cache entries on other CPUs. By
enabling this option, Read or Write For Ownership in the ARMv6
DMA cache maintenance functions is performed. These LDR/STR
instructions change the cache line state to shared or modified
so that the cache operation has the desired effect.
Note that the workaround is only valid on processors that do
not perform speculative loads into the D-cache. For such
processors, if cache maintenance operations are not broadcast
in hardware, other workarounds are needed (e.g. cache
maintenance broadcasting in software via FIQ).
config OUTER_CACHE
bool
@ -794,6 +813,8 @@ config ARM_L1_CACHE_SHIFT
config ARM_DMA_MEM_BUFFERABLE
bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7
depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \
MACH_REALVIEW_PB11MP)
default y if CPU_V6 || CPU_V7
help
Historically, the kernel has used strongly ordered mappings to

18
arch/arm/mm/cache-v6.S
View file

@ -211,8 +211,9 @@ v6_dma_inv_range:
mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
#endif
1:
#ifdef CONFIG_SMP
str r0, [r0] @ write for ownership
#ifdef CONFIG_DMA_CACHE_RWFO
ldr r2, [r0] @ read for ownership
str r2, [r0] @ write for ownership
#endif
#ifdef HARVARD_CACHE
mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
@ -234,7 +235,7 @@ v6_dma_inv_range:
v6_dma_clean_range:
bic r0, r0, #D_CACHE_LINE_SIZE - 1
1:
#ifdef CONFIG_SMP
#ifdef CONFIG_DMA_CACHE_RWFO
ldr r2, [r0] @ read for ownership
#endif
#ifdef HARVARD_CACHE
@ -257,7 +258,7 @@ v6_dma_clean_range:
ENTRY(v6_dma_flush_range)
bic r0, r0, #D_CACHE_LINE_SIZE - 1
1:
#ifdef CONFIG_SMP
#ifdef CONFIG_DMA_CACHE_RWFO
ldr r2, [r0] @ read for ownership
str r2, [r0] @ write for ownership
#endif
@ -283,9 +284,13 @@ ENTRY(v6_dma_map_area)
add r1, r1, r0
teq r2, #DMA_FROM_DEVICE
beq v6_dma_inv_range
#ifndef CONFIG_DMA_CACHE_RWFO
b v6_dma_clean_range
#else
teq r2, #DMA_TO_DEVICE
beq v6_dma_clean_range
b v6_dma_flush_range
#endif
ENDPROC(v6_dma_map_area)
/*
@ -295,6 +300,11 @@ ENDPROC(v6_dma_map_area)
* - dir - DMA direction
*/
ENTRY(v6_dma_unmap_area)
#ifndef CONFIG_DMA_CACHE_RWFO
add r1, r1, r0
teq r2, #DMA_TO_DEVICE
bne v6_dma_inv_range
#endif
mov pc, lr
ENDPROC(v6_dma_unmap_area)

18
arch/arm/mm/dma-mapping.c
View file

@ -24,15 +24,6 @@
#include <asm/tlbflush.h>
#include <asm/sizes.h>
/* Sanity check size */
#if (CONSISTENT_DMA_SIZE % SZ_2M)
#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
#endif
#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
static u64 get_coherent_dma_mask(struct device *dev)
{
u64 mask = ISA_DMA_THRESHOLD;
@ -123,6 +114,15 @@ static void __dma_free_buffer(struct page *page, size_t size)
}
#ifdef CONFIG_MMU
/* Sanity check size */
#if (CONSISTENT_DMA_SIZE % SZ_2M)
#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
#endif
#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
/*
* These are the page tables (2MB each) covering uncached, DMA consistent allocations
*/

3
arch/arm/plat-pxa/Makefile
View file

@ -2,8 +2,9 @@
# Makefile for code common across different PXA processor families
#
obj-y := dma.o pmu.o
obj-y := dma.o
obj-$(CONFIG_ARCH_PXA) += pmu.o
obj-$(CONFIG_GENERIC_GPIO) += gpio.o
obj-$(CONFIG_PXA3xx) += mfp.o
obj-$(CONFIG_ARCH_MMP) += mfp.o

12
drivers/power/z2_battery.c
View file

@ -9,19 +9,13 @@
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/i2c.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/power_supply.h>
#include <linux/slab.h>
#include <linux/z2_battery.h>
#define Z2_DEFAULT_NAME "Z2"