tg3: Move per-int rx members to per-int struct
This patch moves the rx_rcb, rx_rcb_mapping, and rx_rcb_ptr return ring device members to a per-interrupt structure. It also adds a new return ring consumer mailbox register member (consmbox) and converts the code to use it rather than a preprocessor constant. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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898a56f8d8
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723344820a
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@ -657,7 +657,7 @@ static inline unsigned int tg3_has_work(struct tg3_napi *tnapi)
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}
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}
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/* check for RX/TX work to do */
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/* check for RX/TX work to do */
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if (sblk->idx[0].tx_consumer != tp->tx_cons ||
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if (sblk->idx[0].tx_consumer != tp->tx_cons ||
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sblk->idx[0].rx_producer != tp->rx_rcb_ptr)
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sblk->idx[0].rx_producer != tnapi->rx_rcb_ptr)
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work_exists = 1;
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work_exists = 1;
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return work_exists;
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return work_exists;
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@ -4480,7 +4480,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
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{
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{
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struct tg3 *tp = tnapi->tp;
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struct tg3 *tp = tnapi->tp;
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u32 work_mask, rx_std_posted = 0;
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u32 work_mask, rx_std_posted = 0;
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u32 sw_idx = tp->rx_rcb_ptr;
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u32 sw_idx = tnapi->rx_rcb_ptr;
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u16 hw_idx;
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u16 hw_idx;
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int received;
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int received;
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struct tg3_rx_prodring_set *tpr = &tp->prodring[0];
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struct tg3_rx_prodring_set *tpr = &tp->prodring[0];
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@ -4494,7 +4494,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
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work_mask = 0;
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work_mask = 0;
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received = 0;
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received = 0;
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while (sw_idx != hw_idx && budget > 0) {
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while (sw_idx != hw_idx && budget > 0) {
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struct tg3_rx_buffer_desc *desc = &tp->rx_rcb[sw_idx];
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struct tg3_rx_buffer_desc *desc = &tnapi->rx_rcb[sw_idx];
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unsigned int len;
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unsigned int len;
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struct sk_buff *skb;
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struct sk_buff *skb;
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dma_addr_t dma_addr;
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dma_addr_t dma_addr;
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@ -4622,8 +4622,8 @@ next_pkt_nopost:
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}
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}
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/* ACK the status ring. */
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/* ACK the status ring. */
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tp->rx_rcb_ptr = sw_idx;
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tnapi->rx_rcb_ptr = sw_idx;
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tw32_rx_mbox(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, sw_idx);
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tw32_rx_mbox(tnapi->consmbox, sw_idx);
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/* Refill RX ring(s). */
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/* Refill RX ring(s). */
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if (work_mask & RXD_OPAQUE_RING_STD) {
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if (work_mask & RXD_OPAQUE_RING_STD) {
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@ -4678,7 +4678,7 @@ static int tg3_poll_work(struct tg3_napi *tnapi, int work_done, int budget)
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* All RX "locking" is done by ensuring outside
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* All RX "locking" is done by ensuring outside
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* code synchronizes with tg3->napi.poll()
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* code synchronizes with tg3->napi.poll()
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*/
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*/
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if (sblk->idx[0].rx_producer != tp->rx_rcb_ptr)
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if (sblk->idx[0].rx_producer != tnapi->rx_rcb_ptr)
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work_done += tg3_rx(tnapi, budget - work_done);
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work_done += tg3_rx(tnapi, budget - work_done);
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return work_done;
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return work_done;
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@ -4768,7 +4768,7 @@ static irqreturn_t tg3_msi_1shot(int irq, void *dev_id)
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struct tg3 *tp = tnapi->tp;
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struct tg3 *tp = tnapi->tp;
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prefetch(tnapi->hw_status);
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prefetch(tnapi->hw_status);
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prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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if (likely(!tg3_irq_sync(tp)))
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if (likely(!tg3_irq_sync(tp)))
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napi_schedule(&tnapi->napi);
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napi_schedule(&tnapi->napi);
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@ -4786,7 +4786,7 @@ static irqreturn_t tg3_msi(int irq, void *dev_id)
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struct tg3 *tp = tnapi->tp;
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struct tg3 *tp = tnapi->tp;
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prefetch(tnapi->hw_status);
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prefetch(tnapi->hw_status);
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prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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/*
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/*
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* Writing any value to intr-mbox-0 clears PCI INTA# and
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* Writing any value to intr-mbox-0 clears PCI INTA# and
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* chip-internal interrupt pending events.
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* chip-internal interrupt pending events.
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@ -4837,7 +4837,7 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id)
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goto out;
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goto out;
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sblk->status &= ~SD_STATUS_UPDATED;
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sblk->status &= ~SD_STATUS_UPDATED;
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if (likely(tg3_has_work(tnapi))) {
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if (likely(tg3_has_work(tnapi))) {
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prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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napi_schedule(&tnapi->napi);
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napi_schedule(&tnapi->napi);
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} else {
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} else {
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/* No work, shared interrupt perhaps? re-enable
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/* No work, shared interrupt perhaps? re-enable
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@ -4894,7 +4894,7 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id)
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if (tg3_irq_sync(tp))
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if (tg3_irq_sync(tp))
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goto out;
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goto out;
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prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
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prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]);
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napi_schedule(&tnapi->napi);
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napi_schedule(&tnapi->napi);
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@ -5745,13 +5745,17 @@ static void tg3_free_rings(struct tg3 *tp)
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*/
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*/
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static int tg3_init_rings(struct tg3 *tp)
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static int tg3_init_rings(struct tg3 *tp)
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{
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{
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struct tg3_napi *tnapi = &tp->napi[0];
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/* Free up all the SKBs. */
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/* Free up all the SKBs. */
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tg3_free_rings(tp);
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tg3_free_rings(tp);
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/* Zero out all descriptors. */
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/* Zero out all descriptors. */
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memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
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memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
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memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
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tnapi->rx_rcb_ptr = 0;
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memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
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return tg3_rx_prodring_alloc(tp, &tp->prodring[0]);
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return tg3_rx_prodring_alloc(tp, &tp->prodring[0]);
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}
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}
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@ -5765,16 +5769,16 @@ static void tg3_free_consistent(struct tg3 *tp)
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kfree(tp->tx_buffers);
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kfree(tp->tx_buffers);
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tp->tx_buffers = NULL;
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tp->tx_buffers = NULL;
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if (tp->rx_rcb) {
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pci_free_consistent(tp->pdev, TG3_RX_RCB_RING_BYTES(tp),
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tp->rx_rcb, tp->rx_rcb_mapping);
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tp->rx_rcb = NULL;
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}
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if (tp->tx_ring) {
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if (tp->tx_ring) {
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pci_free_consistent(tp->pdev, TG3_TX_RING_BYTES,
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pci_free_consistent(tp->pdev, TG3_TX_RING_BYTES,
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tp->tx_ring, tp->tx_desc_mapping);
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tp->tx_ring, tp->tx_desc_mapping);
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tp->tx_ring = NULL;
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tp->tx_ring = NULL;
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}
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}
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if (tnapi->rx_rcb) {
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pci_free_consistent(tp->pdev, TG3_RX_RCB_RING_BYTES(tp),
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tnapi->rx_rcb, tnapi->rx_rcb_mapping);
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tnapi->rx_rcb = NULL;
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}
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if (tnapi->hw_status) {
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if (tnapi->hw_status) {
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pci_free_consistent(tp->pdev, TG3_HW_STATUS_SIZE,
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pci_free_consistent(tp->pdev, TG3_HW_STATUS_SIZE,
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tnapi->hw_status,
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tnapi->hw_status,
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@ -5805,11 +5809,6 @@ static int tg3_alloc_consistent(struct tg3 *tp)
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if (!tp->tx_buffers)
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if (!tp->tx_buffers)
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goto err_out;
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goto err_out;
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tp->rx_rcb = pci_alloc_consistent(tp->pdev, TG3_RX_RCB_RING_BYTES(tp),
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&tp->rx_rcb_mapping);
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if (!tp->rx_rcb)
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goto err_out;
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tp->tx_ring = pci_alloc_consistent(tp->pdev, TG3_TX_RING_BYTES,
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tp->tx_ring = pci_alloc_consistent(tp->pdev, TG3_TX_RING_BYTES,
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&tp->tx_desc_mapping);
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&tp->tx_desc_mapping);
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if (!tp->tx_ring)
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if (!tp->tx_ring)
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@ -5823,6 +5822,14 @@ static int tg3_alloc_consistent(struct tg3 *tp)
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memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
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memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
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tnapi->rx_rcb = pci_alloc_consistent(tp->pdev,
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TG3_RX_RCB_RING_BYTES(tp),
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&tnapi->rx_rcb_mapping);
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if (!tnapi->rx_rcb)
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goto err_out;
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memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
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tp->hw_stats = pci_alloc_consistent(tp->pdev,
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tp->hw_stats = pci_alloc_consistent(tp->pdev,
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sizeof(struct tg3_hw_stats),
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sizeof(struct tg3_hw_stats),
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&tp->stats_mapping);
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&tp->stats_mapping);
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@ -7109,11 +7116,10 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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}
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}
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}
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}
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tp->rx_rcb_ptr = 0;
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tw32_rx_mbox(tp->napi[0].consmbox, 0);
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tw32_rx_mbox(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, 0);
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tg3_set_bdinfo(tp, NIC_SRAM_RCV_RET_RCB,
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tg3_set_bdinfo(tp, NIC_SRAM_RCV_RET_RCB,
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tp->rx_rcb_mapping,
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tp->napi[0].rx_rcb_mapping,
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(TG3_RX_RCB_RING_SIZE(tp) <<
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(TG3_RX_RCB_RING_SIZE(tp) <<
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BDINFO_FLAGS_MAXLEN_SHIFT),
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BDINFO_FLAGS_MAXLEN_SHIFT),
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0);
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0);
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@ -9956,7 +9962,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
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if (rx_idx != rx_start_idx + num_pkts)
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if (rx_idx != rx_start_idx + num_pkts)
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goto out;
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goto out;
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desc = &tp->rx_rcb[rx_start_idx];
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desc = &rnapi->rx_rcb[rx_start_idx];
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desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
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desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
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opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
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opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
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if (opaque_key != RXD_OPAQUE_RING_STD)
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if (opaque_key != RXD_OPAQUE_RING_STD)
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@ -13413,6 +13419,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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tp->napi[0].tp = tp;
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tp->napi[0].tp = tp;
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tp->napi[0].int_mbox = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
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tp->napi[0].int_mbox = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
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tp->napi[0].consmbox = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
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netif_napi_add(dev, &tp->napi[0].napi, tg3_poll, 64);
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netif_napi_add(dev, &tp->napi[0].napi, tg3_poll, 64);
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dev->ethtool_ops = &tg3_ethtool_ops;
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dev->ethtool_ops = &tg3_ethtool_ops;
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dev->watchdog_timeo = TG3_TX_TIMEOUT;
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dev->watchdog_timeo = TG3_TX_TIMEOUT;
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@ -2497,8 +2497,13 @@ struct tg3_napi {
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u32 last_tag;
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u32 last_tag;
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u32 last_irq_tag;
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u32 last_irq_tag;
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u32 int_mbox;
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u32 int_mbox;
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u32 consmbox;
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u32 rx_rcb_ptr;
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struct tg3_rx_buffer_desc *rx_rcb;
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dma_addr_t status_mapping;
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dma_addr_t status_mapping;
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dma_addr_t rx_rcb_mapping;
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};
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};
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struct tg3 {
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struct tg3 {
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@ -2570,7 +2575,6 @@ struct tg3 {
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struct tg3_napi napi[TG3_IRQ_MAX_VECS];
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struct tg3_napi napi[TG3_IRQ_MAX_VECS];
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void (*write32_rx_mbox) (struct tg3 *, u32,
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void (*write32_rx_mbox) (struct tg3 *, u32,
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u32);
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u32);
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u32 rx_rcb_ptr;
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u32 rx_pending;
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u32 rx_pending;
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u32 rx_jumbo_pending;
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u32 rx_jumbo_pending;
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u32 rx_std_max_post;
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u32 rx_std_max_post;
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@ -2579,9 +2583,6 @@ struct tg3 {
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struct vlan_group *vlgrp;
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struct vlan_group *vlgrp;
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#endif
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#endif
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struct tg3_rx_buffer_desc *rx_rcb;
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dma_addr_t rx_rcb_mapping;
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struct tg3_rx_prodring_set prodring[1];
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struct tg3_rx_prodring_set prodring[1];
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