Merge back earlier 'pm-cpufreq' material.
This commit is contained in:
commit
72e2adcdcb
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@ -181,7 +181,8 @@ config CPU_FREQ_GOV_CONSERVATIVE
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config GENERIC_CPUFREQ_CPU0
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tristate "Generic CPU0 cpufreq driver"
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depends on HAVE_CLK && REGULATOR && PM_OPP && OF
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depends on HAVE_CLK && REGULATOR && OF
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select PM_OPP
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help
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This adds a generic cpufreq driver for CPU0 frequency management.
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It supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
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@ -4,7 +4,8 @@
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config ARM_BIG_LITTLE_CPUFREQ
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tristate "Generic ARM big LITTLE CPUfreq driver"
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depends on ARM_CPU_TOPOLOGY && PM_OPP && HAVE_CLK
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depends on ARM && ARM_CPU_TOPOLOGY && HAVE_CLK
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select PM_OPP
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help
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This enables the Generic CPUfreq driver for ARM big.LITTLE platforms.
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@ -54,7 +55,8 @@ config ARM_EXYNOS5250_CPUFREQ
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config ARM_EXYNOS5440_CPUFREQ
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bool "SAMSUNG EXYNOS5440"
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depends on SOC_EXYNOS5440
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depends on HAVE_CLK && PM_OPP && OF
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depends on HAVE_CLK && OF
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select PM_OPP
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default y
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help
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This adds the CPUFreq driver for Samsung EXYNOS5440
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@ -44,7 +44,7 @@ static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
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int ret;
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freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
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if (freq_Hz < 0)
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if (freq_Hz <= 0)
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freq_Hz = freq_table[index].frequency * 1000;
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freq_exact = freq_Hz;
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@ -35,6 +35,7 @@
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#define SAMPLE_COUNT 3
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#define BYT_RATIOS 0x66a
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#define BYT_VIDS 0x66b
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#define FRAC_BITS 8
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#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
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@ -64,6 +65,12 @@ struct pstate_data {
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int turbo_pstate;
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};
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struct vid_data {
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int32_t min;
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int32_t max;
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int32_t ratio;
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};
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struct _pid {
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int setpoint;
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int32_t integral;
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@ -82,10 +89,9 @@ struct cpudata {
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struct timer_list timer;
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struct pstate_data pstate;
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struct vid_data vid;
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struct _pid pid;
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int min_pstate_count;
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u64 prev_aperf;
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u64 prev_mperf;
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int sample_ptr;
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@ -106,7 +112,8 @@ struct pstate_funcs {
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int (*get_max)(void);
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int (*get_min)(void);
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int (*get_turbo)(void);
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void (*set)(int pstate);
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void (*set)(struct cpudata*, int pstate);
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void (*get_vid)(struct cpudata *);
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};
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struct cpu_defaults {
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@ -358,6 +365,42 @@ static int byt_get_max_pstate(void)
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return (value >> 16) & 0xFF;
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}
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static void byt_set_pstate(struct cpudata *cpudata, int pstate)
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{
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u64 val;
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int32_t vid_fp;
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u32 vid;
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val = pstate << 8;
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if (limits.no_turbo)
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val |= (u64)1 << 32;
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vid_fp = cpudata->vid.min + mul_fp(
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int_tofp(pstate - cpudata->pstate.min_pstate),
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cpudata->vid.ratio);
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vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
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vid = fp_toint(vid_fp);
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val |= vid;
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wrmsrl(MSR_IA32_PERF_CTL, val);
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}
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static void byt_get_vid(struct cpudata *cpudata)
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{
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u64 value;
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rdmsrl(BYT_VIDS, value);
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cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
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cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
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cpudata->vid.ratio = div_fp(
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cpudata->vid.max - cpudata->vid.min,
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int_tofp(cpudata->pstate.max_pstate -
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cpudata->pstate.min_pstate));
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}
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static int core_get_min_pstate(void)
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{
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u64 value;
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@ -384,7 +427,7 @@ static int core_get_turbo_pstate(void)
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return ret;
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}
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static void core_set_pstate(int pstate)
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static void core_set_pstate(struct cpudata *cpudata, int pstate)
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{
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u64 val;
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@ -425,7 +468,8 @@ static struct cpu_defaults byt_params = {
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.get_max = byt_get_max_pstate,
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.get_min = byt_get_min_pstate,
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.get_turbo = byt_get_max_pstate,
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.set = core_set_pstate,
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.set = byt_set_pstate,
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.get_vid = byt_get_vid,
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},
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};
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@ -462,7 +506,7 @@ static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
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cpu->pstate.current_pstate = pstate;
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pstate_funcs.set(pstate);
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pstate_funcs.set(cpu, pstate);
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}
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static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
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@ -488,6 +532,9 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
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cpu->pstate.max_pstate = pstate_funcs.get_max();
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cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
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if (pstate_funcs.get_vid)
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pstate_funcs.get_vid(cpu);
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/*
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* goto max pstate so we don't slow up boot if we are built-in if we are
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* a module we will take care of it during normal operation
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@ -568,15 +615,6 @@ static void intel_pstate_timer_func(unsigned long __data)
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intel_pstate_sample(cpu);
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intel_pstate_adjust_busy_pstate(cpu);
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if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
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cpu->min_pstate_count++;
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if (!(cpu->min_pstate_count % 5)) {
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intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
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}
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} else
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cpu->min_pstate_count = 0;
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intel_pstate_set_sample_time(cpu);
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}
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@ -781,6 +819,7 @@ static void copy_cpu_funcs(struct pstate_funcs *funcs)
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pstate_funcs.get_min = funcs->get_min;
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pstate_funcs.get_turbo = funcs->get_turbo;
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pstate_funcs.set = funcs->set;
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pstate_funcs.get_vid = funcs->get_vid;
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}
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#if IS_ENABLED(CONFIG_ACPI)
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@ -138,7 +138,7 @@ static int spear_cpufreq_target(struct cpufreq_policy *policy,
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}
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newfreq = clk_round_rate(srcclk, newfreq * mult);
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if (newfreq < 0) {
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if (newfreq <= 0) {
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pr_err("clk_round_rate failed for cpu src clock\n");
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return newfreq;
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}
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