drm/i915: Clean up VLV rps code a bit
Always print both the MHz value and raw register value for rps stuff. Also kill a somewhat pointless local 'rpe' variable and just use dev_priv->rps.rpe_delay. While at it clean up the caps in "GPU" and "Punit" debug messages. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -3080,10 +3080,11 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
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WARN_ON(val > dev_priv->rps.max_delay);
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WARN_ON(val < dev_priv->rps.min_delay);
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DRM_DEBUG_DRIVER("gpu freq request from %d to %d\n",
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DRM_DEBUG_DRIVER("GPU freq request from %d MHz (%u) to %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.cur_delay),
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vlv_gpu_freq(dev_priv->mem_freq, val));
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dev_priv->rps.cur_delay,
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vlv_gpu_freq(dev_priv->mem_freq, val), val);
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if (val == dev_priv->rps.cur_delay)
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return;
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@ -3101,8 +3102,9 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
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pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
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if ((pval >> 8) != val)
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DRM_DEBUG_DRIVER("punit overrode freq: %d requested, but got %d\n",
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val, pval >> 8);
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DRM_DEBUG_DRIVER("Punit overrode GPU freq: %d MHz (%u) requested, but got %d Mhz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq, val), val,
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vlv_gpu_freq(dev_priv->mem_freq, pval >> 8), pval >> 8);
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/* Make sure we continue to get interrupts
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* until we hit the minimum or maximum frequencies.
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@ -3496,7 +3498,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_ring_buffer *ring;
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u32 gtfifodbg, val, rpe;
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u32 gtfifodbg, val;
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int i;
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WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
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@ -3557,31 +3559,39 @@ static void valleyview_enable_rps(struct drm_device *dev)
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DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
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DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
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DRM_DEBUG_DRIVER("current GPU freq: %d\n",
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vlv_gpu_freq(dev_priv->mem_freq, (val >> 8) & 0xff));
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dev_priv->rps.cur_delay = (val >> 8) & 0xff;
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DRM_DEBUG_DRIVER("current GPU freq: %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.cur_delay),
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dev_priv->rps.cur_delay);
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dev_priv->rps.max_delay = valleyview_rps_max_freq(dev_priv);
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dev_priv->rps.hw_max = dev_priv->rps.max_delay;
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DRM_DEBUG_DRIVER("max GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.max_delay));
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DRM_DEBUG_DRIVER("max GPU freq: %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.max_delay),
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dev_priv->rps.max_delay);
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rpe = valleyview_rps_rpe_freq(dev_priv);
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DRM_DEBUG_DRIVER("RPe GPU freq: %d\n",
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vlv_gpu_freq(dev_priv->mem_freq, rpe));
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dev_priv->rps.rpe_delay = rpe;
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dev_priv->rps.rpe_delay = valleyview_rps_rpe_freq(dev_priv);
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DRM_DEBUG_DRIVER("RPe GPU freq: %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.rpe_delay),
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dev_priv->rps.rpe_delay);
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val = valleyview_rps_min_freq(dev_priv);
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DRM_DEBUG_DRIVER("min GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
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val));
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dev_priv->rps.min_delay = val;
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dev_priv->rps.min_delay = valleyview_rps_min_freq(dev_priv);
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DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.min_delay),
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dev_priv->rps.min_delay);
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DRM_DEBUG_DRIVER("setting GPU freq to %d\n",
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vlv_gpu_freq(dev_priv->mem_freq, rpe));
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DRM_DEBUG_DRIVER("setting GPU freq to %d MHz (%u)\n",
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vlv_gpu_freq(dev_priv->mem_freq,
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dev_priv->rps.rpe_delay),
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dev_priv->rps.rpe_delay);
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INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
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valleyview_set_rps(dev_priv->dev, rpe);
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valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
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/* requires MSI enabled */
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I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
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